Commit Graph

1 Commits

Author SHA1 Message Date
gnn
acf511e4d0 Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor.
Add macros for properly accessing coprocessor 0 registers that
support performance counters.

Reviewed by:	jkoshy rpaulo fabien imp
MFC after:	1 month
2010-03-03 15:05:58 +00:00