817 Commits

Author SHA1 Message Date
nwhitehorn
99449144ea Kernel support for the Vector-Scalar eXtension (VSX) found on the POWER7
and POWER8. This instruction set unifies the 32 64-bit scalar floating
point registers with the 32 128-bit vector registers into a single bank
of 64 128-bit registers. Kernel support mostly amounts to saving and
restoring the wider version of the floating point registers and making
sure that both scalar FP and vector registers are enabled once a VSX
instruction is executed. get_mcontext() and friends currently cannot
see the high bits, which will require a little more work.

As the system compiler (GCC 4.2) does not support VSX, making use of this
from userland requires either newer GCC or clang.

Relnotes:	yes
Sponsored by:	FreeBSD Foundation
2015-02-22 21:40:27 +00:00
rpaulo
49dd1c9d72 Remove FreeBSD/wii.
This port failed to gain traction and probably only a couple Wii consoles
ran FreeBSD all the way to single user mode with an md(4). IPC
support was never implemented, so it was impossible to use any peripheral

Any further development, if any, will happen at https://github.com/rpaulo/wii.

Discussed with:	nathanw (a long time ago), jhibbits
2015-02-10 06:35:16 +00:00
nwhitehorn
1e4a004e9c Set thread priorities on multithreaded CPUs so that threads holding a
spinlock are high-priority and threads waiting for a spinlock are set to
low priority.
2015-02-10 00:55:42 +00:00
nwhitehorn
9b3f5b1200 Simplify trapcode setup by placing a copy of the generic trap handler at
every possible trap address by default. This also makes sure the kernel
notices (and panics at) traps from newer CPUs that the kernel was not
expecting rather than executing gibberish memory.
2015-02-09 02:12:38 +00:00
nwhitehorn
ee74081aba Fix typo in r277561. 2015-01-24 01:58:15 +00:00
nwhitehorn
73fdd2ded8 Use relocation-safe methods to determine the sizes of the exception handlers.
A "size" symbol with its address set to the length of handler would be
shifted forward with all other addresses when relocations are processed.
Instead, just note the end and do the subtraction at runtime.
2015-01-23 07:36:51 +00:00
nwhitehorn
67dd11691f Add POWER7+ and POWER8 to the list of CPUs with 32 SLB slots. This is
mostly a no-op since all currently-supported instances of these CPUs give
the number of SLB slots in the device tree, but keep it here as well just
in case.
2015-01-21 19:11:15 +00:00
nwhitehorn
6978841146 Make sure to relocate tmpstk with everything else and avoid processing
non-relative relocations that the UART code makes for absent modules.
2015-01-21 19:09:15 +00:00
nwhitehorn
cfd22197a3 Make 64-bit AIM trap handlers relocatable by changing all absolute branch
instructions to call through pointers instead. In general, these are set
implicitly through relocation processing. One has to be set explicitly in
machdep.c, however, to fit one handler in the tiny (8 instruction) space
available.

Reviewed by:	andreast
Differential revision:	D1554
Tested on:	UP and SMP G5, Cell, POWER5+
2015-01-21 19:07:45 +00:00
nwhitehorn
301885260e On 64-bit PowerPC, use more native forms of the PPC 970 HID restore
sequences, like are used to read the HIDs. This is both easier to read
and avoids a miscompilation by GCC in certain circumstances. Also avoid
double restoration of HID4 and HID5.

MFC after:	2 weeks
2015-01-21 02:57:54 +00:00
nwhitehorn
27a273f284 Zero BSS explicitly if not started by loader(8). Add a check for the magic
values that ePAPR-compliant loaders (like skiboot) put in the register
loader uses for the metadata pointer to avoid confusing them.
2015-01-20 05:28:03 +00:00
nwhitehorn
fb73b4e2f2 Add some initial infrastructure for relocating the kernel in place.
MFC after:	2 months
Differential revision:	D1554
2015-01-19 17:58:01 +00:00
nwhitehorn
989d372488 Provide a tunable (machdep.moea64_bpvo_pool_size) to set the bootstrap
PVO pool size. The default errs on the exceedingly large side, so absent
any intelligent automatic tuning, at least let the user set it to save
RAM on memory-constrained systems.

MFC after:	2 weeks
2015-01-19 05:14:07 +00:00
nwhitehorn
27bc0854ec Use TOC to look up all kernel globals on powerpc64 instead of doing the
non-relocatable lis @ha, ori @l dance and hoping they are below 4 GB.

MFC after:	2 months
2015-01-18 20:00:33 +00:00
nwhitehorn
3511827a80 Refactor PowerPC (especially AIM) init sequence to be less baroque.
MFC after:	2 months
2015-01-18 18:32:43 +00:00
nwhitehorn
8b5c197449 Do not remap Open Firmware mappings covered by the direct map. It's
pointless and wastes resources.

MFC after:	1 week
2015-01-14 02:18:29 +00:00
markj
7e7e145818 Factor out duplicated code from dumpsys() on each architecture into generic
code in sys/kern/kern_dump.c. Most dumpsys() implementations are nearly
identical and simply redefine a number of constants and helper subroutines;
a generic implementation will make it easier to implement features around
kernel core dumps. This change does not alter any minidump code and should
have no functional impact.

PR:		193873
Differential Revision:	https://reviews.freebsd.org/D904
Submitted by:	Conrad Meyer <conrad.meyer@isilon.com>
Reviewed by:	jhibbits (earlier version)
Sponsored by:	EMC / Isilon Storage Division
2015-01-07 01:01:39 +00:00
nwhitehorn
96234b61c4 Allow booting with both a real Open Firmware tree and a flattened version of
the Open Firmware, as provided by petitboot, for example. Note that this is
not quite complete, since RTAS instantiation still depends on callable
firmware.

MFC after:	2 weeks
2015-01-01 22:26:12 +00:00
markj
7ea63e4fb4 Restore the trap type argument to the DTrace trap hook, removed in r268600.
It's redundant at the moment since it can be obtained from the trapframe
on the architectures where DTrace is supported, but this won't be the case
with ARM.
2014-12-23 15:38:19 +00:00
andreast
21fe7bd4ce Fix build for powerpc(32|64) kernels. 2014-12-10 18:13:14 +00:00
jhibbits
56d5238825 Add support for dtrace:fbt on modules for PowerPC
Summary:
Revert the initial FBT-with-KDB changes for trap_subr*.S, and instead use the
db_trap filter function to handle dtrace trap filtering.  With this, the MMU is
enabled by the support code, simplifying the codepath altogether.

Test Plan: Tested on my G4 PowerBook

Reviewers: #powerpc, nwhitehorn

Reviewed By: nwhitehorn

Differential Revision: https://reviews.freebsd.org/D1207

MFC after:	3 weeks
2014-11-29 20:54:33 +00:00
jhibbits
b86c0e362d cpudep_ap_early_bootstrap() takes no arguments, so no need to give it one.
MFC after:	3 weeks
2014-11-20 06:32:47 +00:00
davide
e88bd26b3f Follow up to r225617. In order to maximize the re-usability of kernel code
in userland rename in-kernel getenv()/setenv() to kern_setenv()/kern_getenv().
This fixes a namespace collision with libc symbols.

Submitted by:   kmacy
Tested by:      make universe
2014-10-16 18:04:43 +00:00
royger
494dc32ba6 ddb: allow specifying the exact address of the symtab and strtab
When the FreeBSD kernel is loaded from Xen the symtab and strtab are
not loaded the same way as the native boot loader. This patch adds
three new global variables to ddb that can be used to specify the
exact position and size of those tables, so they can be directly used
as parameters to db_add_symbol_table. A new helper is introduced, so callers
that used to set ksym_start and ksym_end can use this helper to set the new
variables.

It also adds support for loading them from the Xen PVH port, that was
previously missing those tables.

Sponsored by: Citrix Systems R&D
Reviewed by:	kib

ddb/db_main.c:
 - Add three new global variables: ksymtab, kstrtab, ksymtab_size that
   can be used to specify the position and size of the symtab and
   strtab.
 - Use those new variables in db_init in order to call db_add_symbol_table.
 - Move the logic in db_init to db_fetch_symtab in order to set ksymtab,
   kstrtab, ksymtab_size from ksym_start and ksym_end.

ddb/ddb.h:
 - Add prototype for db_fetch_ksymtab.
 - Declate the extern variables ksymtab, kstrtab and ksymtab_size.

x86/xen/pv.c:
 - Add support for finding the symtab and strtab when booted as a Xen
   PVH guest. Since Xen loads the symtab and strtab as NetBSD expects
   to find them we have to adapt and use the same method.

amd64/amd64/machdep.c:
arm/arm/machdep.c:
i386/i386/machdep.c:
mips/mips/machdep.c:
pc98/pc98/machdep.c:
powerpc/aim/machdep.c:
powerpc/booke/machdep.c:
sparc64/sparc64/machdep.c:
 - Use the newly introduced db_fetch_ksymtab in order to set ksymtab,
   kstrtab and ksymtab_size.
2014-09-25 08:28:10 +00:00
nwhitehorn
fa7d47bc3e We should have an isync after switching MSR[SF] in bootstrap.
Submitted by:	Mark Millard
MFC after:	3 days
2014-09-23 04:13:21 +00:00
kib
094158b3f2 Change pmap_enter(9) interface to take flags parameter and superpage
mapping size (currently unused).  The flags includes the fault access
bits, wired flag as PMAP_ENTER_WIRED, and a new flag
PMAP_ENTER_NOSLEEP to indicate that pmap should not sleep.

For powerpc aim both 32 and 64 bit, fix implementation to ensure that
the requested mapping is created when PMAP_ENTER_NOSLEEP is not
specified, in particular, wait for the available memory required to
proceed.

In collaboration with:	alc
Tested by:	nwhitehorn (ppc aim32 and booke)
Sponsored by:	The FreeBSD Foundation and EMC / Isilon Storage Division
MFC after:	2 weeks
2014-08-08 17:12:03 +00:00
jhibbits
02be90fac3 Set the si_code appropriately for exception-caused signals.
LLDB checks the si_code, and aborts if a code isn't known.

MFC after:	2 weeks
Relnotes:	yes
2014-08-08 06:22:32 +00:00
alc
38b6c535da Retire pmap_change_wiring(). We have never used it to wire virtual pages.
We continue to use pmap_enter() for that.  For unwiring virtual pages, we
now use pmap_unwire(), which unwires a range of virtual addresses instead
of a single virtual page.

Sponsored by:	EMC / Isilon Storage Division
2014-08-03 20:40:51 +00:00
alc
741bd8905a Simplify the selection of the pvo_head and pvo allocation zone in
moea_enter_locked() and moea64_enter().

Eliminate an unused variable from moea64_enter().
2014-08-01 17:09:50 +00:00
alc
0fddfcfca3 Retire PVO_EXECUTABLE. It's neither used nor set correctly. 2014-08-01 04:53:35 +00:00
alc
2672e2483d Correct a long-standing problem in moea{,64}_pvo_enter() that was revealed
by the combination of r268591 and r269134: When we attempt to add the
wired attribute to an existing mapping, moea{,64}_pvo_enter() do nothing.
(They only set the wired attribute on newly created mappings.)

Tested by:	andreast
2014-08-01 01:48:41 +00:00
alc
64de6aa22c Correct a defect in r268591. In the implementation of the new function
pmap_unwire(), the call to MOEA64_PVO_TO_PTE() must be performed before
any changes are made to the PVO.  Otherwise, MOEA64_PVO_TO_PTE() will
panic.

Reported by:	andreast
2014-07-31 16:17:30 +00:00
nwhitehorn
afb6ef5a71 Allow mappings of memory not previously direct-mapped by the kernel when
calling mmap on /dev/mem and add a handler for the possible userland
machine checks that may result. Remove some pointless and wrong copy/paste
that has been in here for a decade as well.

This results in a /dev/mem with identical semantics to the x86 version.

MFC after:	1 week
2014-07-19 15:11:58 +00:00
markj
880dd1a983 Invoke the DTrace trap handler before calling trap() on amd64. This matches
the upstream implementation and helps ensure that a trap induced by tracing
fbt::trap:entry is handled without recursively generating another trap.

This makes it possible to run most (but not all) of the DTrace tests under
common/safety/ without triggering a kernel panic.

Submitted by:	Anton Rang <anton.rang@isilon.com> (original version)
Phabric:	D95
2014-07-14 04:38:17 +00:00
alc
c6e2079985 Eliminate an unused variable. Refresh two comments. 2014-07-13 17:52:07 +00:00
alc
1c51afe84c Implement pmap_unwire(). See r268327 for the motivation behind this change. 2014-07-13 16:27:57 +00:00
alc
a8e6c0a707 Correct the accounting code for wired mappings. The wrong field of the PVO
entry was being tested.  We were incrementing and decrementing the pmap's
wired mapping count based on whether the physical page being mapped or
unmapped was cache coherent, not whether it was a wired mapping.

Reviewed by:	nwhitehorn
2014-07-10 20:55:38 +00:00
markj
4c818572b7 Commit the rest of the changes that were intended to be part of r266826.
X-MFC-with:	r266826
2014-05-29 01:42:22 +00:00
jhibbits
c6555fad83 oea64 uses 4k pages, too.
MFC after:	1 week
X-MFC-with:	r266116
2014-05-15 15:17:44 +00:00
jhibbits
214a5da32e A page mask size is 12-bits, not 11.
MFC after:	1 week
2014-05-15 04:18:06 +00:00
bdrewery
6fcf6199a4 Rename global cnt to vm_cnt to avoid shadowing.
To reduce the diff struct pcu.cnt field was not renamed, so
PCPU_OP(cnt.field) is still used. pc_cnt and pcpu are also used in
kvm(3) and vmstat(8). The goal was to not affect externally used KPI.

Bump __FreeBSD_version_ in case some out-of-tree module/code relies on the
the global cnt variable.

Exp-run revealed no ports using it directly.

No objection from:	arch@
Sponsored by:	EMC / Isilon Storage Division
2014-03-22 10:26:09 +00:00
emaste
dfd2dcdc01 Update NetBSD Foundation copyrights to 2-clause BSD
The NetBSD Foundation states "Third parties are encouraged to change the
license on any files which have a 4-clause license contributed to the
NetBSD Foundation to a 2-clause license."

This change removes clauses 3 and 4 from copyright / license blocks that
list The NetBSD Foundation as the only copyright holder.

Sponsored by:	The FreeBSD Foundation
2014-03-18 01:40:25 +00:00
jhibbits
b57e260317 Unbreak non-SMP builds. This was broken by r259284. Also, reorganize the
code introduced in that revision a bit.

Reviewed by:	nwhitehorn
MFC after:	3 weeks
2014-01-31 03:55:34 +00:00
jhibbits
d106d865ac Use a loop of dcbz, instead of calling bzero() to zero a page. This matches
what is done in mmu_oea64.c.

MFC after:	1 month
2014-01-29 05:58:08 +00:00
jhibbits
72b0bd154f Save r3 before using it for the trap check, else we end up saving the new r3,
containing the trap instruction encoding (0x7c810808), and restoring it back
with the frame on return.  This caused it to panic on my ppc32 machine, but
somehow my ppc64 machine overlooked it, because I was using such a simple
dtrace probe.

X-MFC-with:	r259245
MFC after:	2 weeks
2013-12-15 18:07:25 +00:00
jhibbits
7a0c976f7e Add PMU-based CPU frequency scaling. This method is used on most Titanium
PowerBooks.

MFC after:	1 month
2013-12-13 02:37:35 +00:00
jhibbits
2ff1272b66 FBT now does work fully on PowerPC.
MFC after:	2 weeks
2013-12-12 04:12:19 +00:00
nwhitehorn
95789e5736 The kernel stack guard pages are only below the stack pointer, not above.
Prevent erroneous detection of stack overflows on legitimate faults on the
page after this thread's stack.

MFC after:	3 days
2013-12-01 17:28:28 +00:00
nwhitehorn
b777ab82ba badaddr() is used only in the grackle PCI driver, so move its definition
there. Clean up a spurious setfault() declaration as well.
2013-11-27 22:01:09 +00:00
attilio
7ee4e910ce - For kernel compiled only with KDTRACE_HOOKS and not any lock debugging
option, unbreak the lock tracing release semantic by embedding
  calls to LOCKSTAT_PROFILE_RELEASE_LOCK() direclty in the inlined
  version of the releasing functions for mutex, rwlock and sxlock.
  Failing to do so skips the lockstat_probe_func invokation for
  unlocking.
- As part of the LOCKSTAT support is inlined in mutex operation, for
  kernel compiled without lock debugging options, potentially every
  consumer must be compiled including opt_kdtrace.h.
  Fix this by moving KDTRACE_HOOKS into opt_global.h and remove the
  dependency by opt_kdtrace.h for all files, as now only KDTRACE_FRAMES
  is linked there and it is only used as a compile-time stub [0].

[0] immediately shows some new bug as DTRACE-derived support for debug
in sfxge is broken and it was never really tested.  As it was not
including correctly opt_kdtrace.h before it was never enabled so it
was kept broken for a while.  Fix this by using a protection stub,
leaving sfxge driver authors the responsibility for fixing it
appropriately [1].

Sponsored by:	EMC / Isilon storage division
Discussed with:	rstone
[0] Reported by:	rstone
[1] Discussed with:	philip
2013-11-25 07:38:45 +00:00