755 Commits

Author SHA1 Message Date
adrian
f2b5d7ad5d Enable setting the short-GI bit when TX'ing HT rates but only if the
hardware supports it.

Since ni->ni_htcap in hostap mode is what the remote end has advertised,
not what has been negotiated/decided, we need to check ourselves what
the current channel width is and what the hardware supports before
enabling short-GI.

It's important that short-GI isn't enabled when it isn't negotiated
and when the hardware doesn't support it (ie, short-gi for 20mhz channels
on any chip < AR9287.)

I've quickly verified this on the AR9285 in 11n mode.
2011-05-30 15:06:57 +00:00
adrian
696ed40549 Set default A-MPDU density/size. 2011-05-30 14:57:00 +00:00
adrian
123be71bc4 Teach if_ath about devices which have short-GI in 20MHz channel modes.
This has been disabled until now because there hasn't been any supported
device which has this feature. Since the AR9287 is the first device to
support it, and since now the HAL has functional AR9287+11n support,
flip this on.
2011-05-29 00:17:13 +00:00
adrian
1acac1b8bf Fix AR9287 operation when >1 TX chain is enabled.
I didn't pick this up with the initial commit because I was only testing
with 11bg.
2011-05-28 15:43:56 +00:00
adrian
34ca846f6f Fix a macro name - it's currently unused in this file however, but
keep it consistent with ar9280.c.
2011-05-26 20:22:10 +00:00
adrian
ec7d537a68 Revert this erroneous commit and re-disable the AR9285 combined antenna
diversity.
2011-05-26 20:17:59 +00:00
adrian
d59ac47d9e Remove the three-chain scaled power check for the AR9287 - it isn't
needed.
2011-05-26 16:59:42 +00:00
adrian
c2b7c664f9 Make sure only two chains are calibrated for the AR9287. 2011-05-26 16:55:44 +00:00
adrian
6b0df643e2 Add some open-loop TX power debugging for AR9287. 2011-05-26 16:52:37 +00:00
adrian
5b0ca88c44 Bring over the AR5416 per-rate TX power code, modified to use the
AR9287 EEPROM layout.

The AR9287 only supports 2ghz, so I've removed the 5ghz code (but left
the 5ghz edge flags in there for now) and hard-coded the 2ghz-only
path.

Whilst I'm there, fix a typo (ar9285->ar9287.)

This meets basic TX throughput testing - iperf TX tests == 27-28mbit in 11g,
matching the rest of my 11g kit.
2011-05-26 15:55:27 +00:00
adrian
65d5c14b8c Flesh out ar9287SetTransmitPower() based on the AR9285 routine.
Hard-code the per-rate TX power at 5dBm for now so testing can be done.

This passes initial TX testing in 11g mode (but, obviously, at 5dBm.)
2011-05-26 15:01:37 +00:00
adrian
f9522af8ab Flesh out the TX power calibration for the AR9287.
I'm assuming for now that the AR9287 is only open-loop TX power control
(as mine is) so I've hard-coded the attach path to fail if the NIC is
not open-loop.

This greatly simplifies the TX calibration path and the amount of code
which needs to be ported over.

This still isn't complete - the rate calculation code still needs to be
ported and it all needs to be glued together.

Obtained from:	Linux ath9k
2011-05-26 14:29:05 +00:00
adrian
1f9f57c803 Add the AR9287 chip identification string. 2011-05-26 09:27:58 +00:00
adrian
f5312f1dd5 Fix a bad merge from a previous commit. 2011-05-26 09:22:59 +00:00
adrian
f19d897997 Merlin -> Kiwi 2011-05-26 09:16:09 +00:00
adrian
083eb04e61 Bring over my AR9287 work in progress.
It isn't linked into the build because it's missing the TX power
and PDADC programming code.

This code is mostly based on the ath9k codebase, compared against
the Atheros codebase as appropriate.

What's implemented:

* probe/attach
* EEPROM board value programming
* RX initial calibration
* radio channel programming
* general MAC / baseband setup
* async fifo setup
* open-loop tx power calibration

What's missing before it can be enabled by default:

* TX power / calibration setting code
* closed-loop tx power calibration routines
* TSF2 handling
* generic timer support from ath9k

Obtained from:	Atheros, ath9k
2011-05-26 09:15:33 +00:00
adrian
5641392816 AR9287 prep work:
* Add PCI/PCIE devids
* Add AR9287/Kiwi version check macros
* AR_SREV_9287 -> AR_SREV_KIWI

Obtained from:	Atheros, ath9k
2011-05-26 08:35:47 +00:00
adrian
bf843df5ef Add temp sense to the EEPROM variable list;
Export the temperature sense variables to ah_eeprom_9287.c
2011-05-26 08:20:14 +00:00
adrian
8d83c99db3 The current ANI capability information uses a different set of
values for the commands, compared to the internal command values
(HAL_ANI_CMD.)

My eventual aim is to make the HAL_ANI_CMD internal enum match
the public API and then remove all this messiness.

This now allows HAL_CAP_INTMIT users to use a public HAL_CAP_INTMIT_
enum rather than magic constants.

The only magic constants currently used by if_ath are "enable" and
"present". Some local tools of mine allow for direct, manual fiddling
of the ANI variables and I'll convert these to use the public enum API
before I commit them.
2011-05-25 07:34:49 +00:00
adrian
2fcf5609ae Tidy up the ANI API in preparation for looking to expose some more
of the ANI statistics and committing some tools which use these.

* Change HAL_ANI_* commands _back_ to be numerical, rather than a
  bitmap;
* modify access to the ANI control bitmap to convert a command to
  a bitmap;
* Fix the ANI noise immunity fiddling for CCK errors - it wasn't
  checking whether noise immunity was disabled or not.
2011-05-25 07:19:19 +00:00
adrian
3ab4bcdcc6 The ANI control for the AR5416 and later chips was calling ar5212AniControl(),
which did AR5212 specific initialisation. This would cause some slight
silliness when enabling/disabling ANI.

Just to be completely correct - and to ensure the phy error mask/RX filter
register isn't incorrectly played with - make the ANI control function a
method, have it set appropriately for AR5212/AR5416, and call that from the
ANI control interface.
2011-05-24 18:25:40 +00:00
adrian
593db502aa Use the new per-series antenna and TPC definitions when setting ctl8->11.
This should hopefully make it clearer to developers what is going on
and when TPC is being hacked on, make it obvious why it isn't working for
series 1, 2, 3.

I won't flip on setting TX power for TX series 1, 2, 3 until I've done
some further testing with Kite to ensure it doesn't break anything.
(Before people ask - yes, TPC is only needed for 5ghz regdomains and
yes, Kite is a 2.4ghz only chip, but there are potential use cases
for 2ghz TPC. I just need to sit down and ensure it's supported and
functional.)
2011-05-24 05:49:02 +00:00
adrian
4184989e51 Add in descriptions for TX descriptor fields ctl8-11 - these fields
control the antenna control bits for the four TX series and the
TPC settings for TX series 1, 2, 3.

The specifics:

* The TPC setting for TX series 0 is handled in ctl0.

* TPC is currently disabled, so the per-packet TX power is
  set via the global per-rate TX power register, not per packet.

* The antenna control bits don't matter for AR5416 and later
  so they should stay 0 (which they currently do); they may
  be set for Kite but as there's no TX diversity supported
  at the moment (it requires the NIC to be built with an
  external antenna switch, matching how antenna diversity
  is done on legacy NICs), so again keep them 0.

This is in preparation for supporting per-rate TPC on the
AR5416 and later. The Kite (and soon to come Kiwi) code
sets ctl8-11 to 0x0, which doesn't have any effect at
the moment. When TPC is enabled it would result in the
second, third and fourth TX series attmpts to be done with
a TX power of 0. This commit doesn't change that; it'll
be followed up with some commits to properly set the TPC
registers appropriately.
2011-05-24 05:34:45 +00:00
adrian
1f45be52d9 The Merlin analog register bank is from 0x7800 -> 0x78fc; fix the code
to reflect this.
2011-05-21 09:23:18 +00:00
adrian
dbbccdc36f This isn't needed any longer, it's defined in ah_internal.h. 2011-05-18 11:28:23 +00:00
adrian
ee7fc96df8 Modify the sample rate control algorithm to only select/sample HT
rates for HT nodes.
2011-05-18 07:20:30 +00:00
adrian
fa1f34db89 Fix the debugging code path to correctly support HAL_DEBUG_UNMASKABLE. 2011-05-17 16:30:34 +00:00
adrian
2b2725eecd Fix case, introduced in my previous commit.
Pointy hat goes to:	adrian, for having multiple build screens
			open and checking the wrong one.
2011-05-17 15:03:39 +00:00
adrian
d227408372 Use the halMcastKeySrchSupport capability bit to selectively enable/disable
the multicast key search support for AR5212, AR5416 and later.

The general HAL routine ath_hal_getcapability() implement checking this
but it's overridden by a check in ar5212_misc:ar5212GetCapability().
This restores the later functionality in case it's found to be broken
in any of the 11n chipsets.
2011-05-17 11:56:50 +00:00
adrian
9de5255895 Set this HAL capabilities flag correctly even though it isn't currently
being used.
2011-05-17 11:52:53 +00:00
adrian
f3617a6eef * Add some more TX descriptor error counters; this'll be helpful when
implementing TX aggregation
* Whilst I'm there, comment some RX error counters
2011-05-15 15:54:34 +00:00
adrian
ca9749fa32 Fix NF calibration breakage introduced by me in a past commit.
Since the returned NF will be -ve, checking for <= 0 is not good
enough. For now, check whether it equals 0 or -1; a future commit
will tidy this mess up and have it return HAL_BOOL instead.
2011-05-15 07:59:33 +00:00
adrian
3ca0f8edfc Fix the Merlin 5ghz fast-clock EEPROM fetch to return the correct value.
The eeprom Get method should return HAL_OK if fastclock is enabled in the
EEPROM. It was returning the opposite of what it should have.

Submitted by:	Matthew Fleming <mdf356@gmail.com>
2011-05-14 15:24:15 +00:00
adrian
160e8cb859 Fix the eeprom set API method to return HAL_STATUS.
The code assumed it could return HAL_OK, HAL_EINVAL and other
HAL_STATUS types; so it shouldn't be declared as returning HAL_BOOL.

This commit was brought to you by the Clang compiler.

Submitted by:	Matthew Fleming <mdf356@gmail.com>
2011-05-14 15:12:02 +00:00
adrian
d8ffb23a02 Import initial EEPROM code for Kite (AR9287).
I've tested this locally and it does indeed read and attach to an AR9287
EEPROM. But a lot more code needs to be ported over to the HAL before
the AR9287 is functional.

I'm importing this separate from the rest of the codebase (and unlinked from
the build for now) in case someone wishes to begin fiddling with porting
the rest of the code over from Linux ath9k.

Obtained from:	Linux ath9k
2011-05-14 14:25:15 +00:00
adrian
c3c15582fd When disabling RIFS for Sowl (AR9160) and Howl (AR9130), make sure RIFS
is totally disabled.

The Atheros HAL code does this for Sowl/Howl but not for Owl (AR5416) where
RIFS is disabled by default.

This seems to quieten the occasional baseband hang I've been seeing with
the AR9160 in STA mode under constant heavy traffic load.

Obtained from:	Atheros
2011-05-14 05:43:33 +00:00
adrian
baf1247717 Major fix: when doing open-loop TX power calibration, adjust
the correct CCK rates rather than adjusting the first handful.
This may have affected some AR9280 based NICs.

Minor fix: merlin check update
2011-05-14 04:17:16 +00:00
adrian
000c7ea1de Fixes from the Atheros HAL - formatting; update Merlin checks to be consistent.
Nothing functional should change with this commit.
2011-05-14 04:05:23 +00:00
attilio
96139278ce Disconnect sun4v architecture from the three.
Some files keep the SUN4V tags as a code reference, for the future,
if any rewamped sun4v support wants to be added again.

Reviewed by:	marius
Tested by:	sbruno
Approved by:	re
2011-05-14 01:53:38 +00:00
adrian
882abde07a Even though initial calibrations aren't done (yet), add this so we're
consistent with the Atheros HAL.
2011-05-14 01:41:36 +00:00
adrian
fdf2456eee Only do open loop power control and temperature compensation
for the AR9280 based NICs if it's actually enabled.

Some of the OLC code was erroneously called during setup
and calibration. This may have caused some incorrect behaviour.
2011-05-13 14:33:45 +00:00
adrian
78eaf5d431 Remove duplicate code - add a function which calculates the ratesArray[]
table which contains the per-rate target TX power.

This code is shared between the v14 eeprom board setup (AR5416, AR9160,
AR9280) and will also be used by the upcoming Kite (AR9287) support.
2011-05-13 10:36:38 +00:00
adrian
0541c8dd0d Some diversity changes relating to AR9285.
* grab the main, alt and selected LNA config
* add some optional / disabled logging code
* add a check to reject packets with an invalid main rssi too,
  in case the alt is the active receive chain and main is -ve.

Note: The software-controlled combined diversity code is still disabled.
2011-05-13 09:57:12 +00:00
adrian
2572f17fb8 Now that the devices with functioning ps-poll hardware support have
been enumerated (merlin and later), flick this on.
2011-05-12 14:03:29 +00:00
adrian
f47d00001a Break out the AR9285 analog registers from ar5416/ar5416phy.h and put
them in a new header file, ar9002/ar9285_an.h.

Shuffle the AR9280 analog registers in ar5416/ar541phy.h into a contiguous
spot.
2011-05-12 10:11:24 +00:00
adrian
3fe0beec0e Fix the half/quater rate PLL setup for AR5416, AR9160 and
(beta?) AR9280 chips.

Note: This doesn't "fix" half/quarter rate support for these
chips; it merely fixes an oversight.

Obtained from:	Atheros
2011-05-12 03:25:24 +00:00
adrian
ed33f6206b Fixes from Atheros:
* If AR9130, give the chip extra time to reset
* If AR5416, don't shutdown the chip during reset
2011-05-12 03:15:21 +00:00
adrian
51b81d320e Make the NF calibration logic (hopefully!) more resistive to noisy
environments.

In setups where NF calibration can take a while, don't load the CCA
and kick off a new NF calibration if the previous one hasn't yet
completed. This shouldn't happen unless the environment is noisy but
those exist (hi phk!).

Here, if the previous NF hasn't completed when ar5416LoadNf() is run
(which reads the NF), it skips updating the history buffer, loading
the NF CCA array and kicking off the next NF cal. It's hoped it'll
occur in the next long calibration interval.

Obtained from:	Atheros, ath9k, my local HAL
2011-05-11 13:40:13 +00:00
adrian
83c864fab3 Always log if the NF CCA load fails; so users with debugging enabled
can see they're likely in a very noisy environment.
2011-05-11 13:25:43 +00:00
adrian
c7c34734f4 Make sure the chip is awake before writing to it to finally detach
it.

Obtained from:	Atheros
2011-05-11 13:24:17 +00:00