85131 Commits

Author SHA1 Message Date
alc
9e6c312311 Eliminate duplication of the fake page code and zone by the device and sg
pagers.

Reviewed by:	jhb
2011-03-11 07:07:48 +00:00
adrian
d268e58dd4 Bring over the same fix from the AR5416 PDADC calibration code.
The ath9k driver has a unified boundary/pdadc function, whereas
ours is split into two (one for each EEPROM type.) This is why
the AR9280 check is done here where we could safely assume it'll
always be AR9280 or later.
2011-03-11 04:31:00 +00:00
adrian
9e1a253852 Don't call ar5416SetTransmitPower() directly from ar5416SetTxPowerLimit();
this is incorrect for Kite (AR9285) and any future chipsets that
override the EEPROM related routines.

It meant that a direct call to set the TX power would call the v14 EEPROM
AR5416/AR9280 calibration routines, rather than the v4k EEPROM routines
for the AR9285. It thus read the incorrect values from the EEPROM and
programmed garbage PDADC and TX power values into the hardware.
2011-03-11 03:46:27 +00:00
jkim
7df55dcdeb Add a tunable "machdep.disable_tsc" to turn off TSC. Specifically, it turns
off boot-time CPU frequency calibration, DELAY(9) with TSC, and using TSC as
a CPU ticker.  Note tsc_present does not change by this tunable.
2011-03-11 00:44:32 +00:00
mjacob
c922219ced Add support QLE220 card- an 2500 lookalike.
Obtained mostly from:	Roman && Konstantin
MFC after:	1 week
2011-03-10 23:53:01 +00:00
jkim
a52b39f6a4 Turn off pointless P-state invariant TSC detection based on CPU model
on a virtual machine.
2011-03-10 23:06:13 +00:00
mdf
675238071f Use MAXPATHLEN rather than the size of an extern array when copying the
kernel name.  Also consistenly use strlcpy().

Suggested by:	Warner Losh
2011-03-10 22:56:00 +00:00
jkim
4d0b0c3ea7 Detect NSC/AMD Geode SC1100 properly, not just Stepping 0. Although it is
unclear that "TSC stops ticking with HLT instruction" problem is present
with other steppings, it is limited to Stepping 0 for now.
2011-03-10 22:20:11 +00:00
jkim
98d68ca741 Deprecate rarely used tsc_is_broken. Instead, we zero out tsc_freq because
it is almost always used with tsc_freq any way.
2011-03-10 20:02:58 +00:00
jhb
faa7c47cee Remove now-obsolete comment.
Submitted by:	netchild
MFC after:	1 week
2011-03-10 19:50:12 +00:00
jkim
e18a22e828 Remove alpha reminiscence from altq. 2011-03-10 19:04:18 +00:00
jkim
aeb17da5dc Consistently add TSC support for amd64. 2011-03-10 18:58:40 +00:00
jkim
d695e38057 Remove support for FreeBSD 4.x and below. 2011-03-10 18:49:15 +00:00
bschmidt
3d57f75785 Complete the MCS rate table based on the final 802.11n std. While here
adjust the IEEE80211_HTRATE_MAXSIZE constant, only MCS0 - 76 are valid
the other bits in the mcsset IE (77 - 127) are either reserved or used
for TX parameters.
2011-03-10 18:17:24 +00:00
rdivacky
f386257f6a Some more shrinking.
o    bunch of variables are turned into uint8_t

   o    initial setting of namep[] in lookup() is removed
        as it's only overwritten a few lines down

   o    kname is explicitly initialized in main() as BSS
        in boot2 is not zeroed

   o    the setting and reading of "fmt" in load() is removed

   o    buf in printf() is made static to save space

Reviewed by:    jhb
Tested by:      me and Fabian Keil <freebsd-listen fabiankeil de>
2011-03-10 16:40:13 +00:00
adrian
f26cdc3b9a Kite is a 1x1 stream device. 2011-03-10 11:23:43 +00:00
adrian
86836f9cf2 Now that the power curve adjustment code is in, disable the error check
I introduced earlier, and turn it into debugging output.
2011-03-10 06:09:55 +00:00
adrian
8b9dc53a57 Port over the v14 eeprom PDADC curve changes from ath9k.
It looks like these apply in both open and closed loop TX power control,
but the only merlin boards i have either have OL -or- a non-default power
offset, not both.
2011-03-10 06:08:24 +00:00
adrian
713a1e3163 Merlin fix - first pdadc gain index is 0 - minpwr/2 .
Obtained from:	Linux ath9k
2011-03-10 06:06:26 +00:00
adrian
74e9b1999e Migrate the regulatory database definitions into separate header files
to both make things clearer, and to make it easier to write userland
code which pulls in these definitions without needing to pull in the
rest of the HAL.

This stuff should be deprecated at some point in the future once
the net80211 regulatory domain support encapsulates all of the
defintions here.
2011-03-10 03:13:56 +00:00
adrian
2bd8cf3534 Introduce the Merlin PWDCLKIND workaround.
This is something bus clock related from what I can gather. It is needed for
the AR9220 based Ubiquiti SR71-12 and SR71-15 Mini-PCI NICs.

(Note: those NICs don't work right now because of earlier changes to handle
power table offset correctly. That'll be resolved in a follow-up commit.)
2011-03-10 02:09:06 +00:00
np
21e47fa1c9 Display holdoff timers and packet counts as a list of numbers.
MFC after:	1 week
2011-03-09 21:07:09 +00:00
julian
144fd87db2 Add a small change to the comment in the GENRIC config files that include udbp
Submitted by:	Chris Forgron, cforgeron at acsi dot ca
MFC after:	1 week
2011-03-09 17:15:11 +00:00
jkim
a023421583 Remove custom interrupt dispatcher. This is a pointless micro-optimization
and it may cause problems if SS and SP are modified by real-mode code.

MFC after:	1 month
2011-03-09 16:16:38 +00:00
nwhitehorn
748d7e5e85 Fix whitespace nit. 2011-03-09 15:03:42 +00:00
dchagin
83dbcc9afd Indeed, remove bogus since r219405 check of the Linux ABI.
Pointed out:	jhb

MFC after:	2 Week
2011-03-09 05:59:33 +00:00
adrian
3fb3a9435d For chips that are full reset in ar5416ChipReset(), save and restore the TSF.
Merlin (ar9280) and later were full-reset if they're doing open-loop TX
power control but the TSF wasn't being saved/restored.

Add ar5212SetTsf64() which sets the 64 bit TSF appropriately.
2011-03-09 04:39:35 +00:00
yongari
8a28fc08af Rearrange dc_tx_underrun() a bit to correctly set TX FIFO threshold
value. Controllers that always require "store and forward" mode(
Davicom and PNIC 82C168) have no way to recover from TX underrun
except completely reinitializing hardware. Previously only Davicom
was reinitialized and the TX FIFO threshold was changed not to use
"store and forward" mode after reinitialization since the default
FIFO threshold value was 0. This effectively disabled Davicom
controller's "store and forward" mode once it encountered TX
underruns. In theory, this can cause watchodg timeouts.

Intel 21143 controller requires TX MAC should be idle before
changing TX FIFO threshold. So driver tried to disable TX MAC and
checked whether it saw the idle state of TX MAC. Driver should
perform full hardware reinitialization on failing to enter to idle
state and it should not touch TX MAC again once it performed full
reinitialization.

While I'm here remove resetting TX FIFO threshold to 0 when
interface is put into down state. If driver ever encountered TX
underrun, it's likely to trigger TX underrun again whenever
interface is brought to up again. Keeping old/learned TX FIFO
threshold value shall reduce the chance of seeing TX underrns in
next run.
2011-03-08 19:49:16 +00:00
dchagin
dbea1b3e68 Bump __FreeBSD_version for struct sysvec (sv_schedtail) changes. 2011-03-08 19:05:14 +00:00
dchagin
69b8756d3d Extend struct sysvec with new method sv_schedtail, which is used for an
explicit process at fork trampoline path instead of eventhadler(schedtail)
invocation for each child process.

Remove eventhandler(schedtail) code and change linux ABI to use newly added
sysvec method.

While here replace explicit comparing of module sysentvec structure with the
newly created process sysentvec to detect the linux ABI.

Discussed with:	kib

MFC after:	2 Week
2011-03-08 19:01:45 +00:00
pjd
a223afb5ea Correct readdir over ZFS handling.
Reported by:	Pierre Beyssac <pb@fasterix.frmug.org>
MFC after:	1 month
2011-03-08 18:39:41 +00:00
sobomax
e356b9f82b Some linux distros put mount point into the ext2fs labels, such as '/', or
'/boot', which confuses the devfs code and can cause userland programs to
fail reading /dev/ext2fs directory with weird error code, such as any
program that uses pwlib.

Strip any leading slashes before feeding the label to the geom_label code.

Sponsored by:	Sippy Software, Inc.

MFC after:	1 week
2011-03-08 17:00:31 +00:00
jhb
269e1daa8f When constructing a new cpuset, apply the parent cpuset's mask to the new
set's mask rather than the root mask.  This was causing the root mask to
be modified incorrectly.

Reviewed by:	jeff
MFC after:	1 week
2011-03-08 14:18:21 +00:00
rrs
1188e1f085 Tunes and fixes the new DC-CC to seem to hit the
right mix.  Still may need some tweaks but it
appears to almost not give away too much to an
RFC2581 flow, but can really minimize the amount of
buffers used in the net.

MFC after:	3 months
2011-03-08 11:58:25 +00:00
kib
4d0733e0f8 Do not assert buffer lock in VFS_STRATEGY() when kernel already paniced.
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2011-03-08 11:50:59 +00:00
hselasky
08018ce267 - Bugfix: Root HUBs do not support re-enumeration.
MFC after:	14 days
Approved by:	thompsa (mentor)
2011-03-08 08:02:39 +00:00
adrian
e3b6f08eb6 Break out the ath regulatory domain structures into a separate header file. 2011-03-08 07:42:09 +00:00
adrian
c0c76118d8 Implement open-loop TX power control (OLC) for Merlin (AR9280) and
generally tidy up the TX power programming code.

Enforce that the TX power offset for Merlin is -5 dBm, rather than
any other value programmable in the EEPROM. This requires some
further code to be ported over from ath9k, so until that is done
and tested, fail to attach NICs whose TX power offset isn't -5
dBm.

This improves both legacy and HT transmission on my merlin board.
It allows for stable MCS TX up to MCS15.

Specifics:

* Refactor out a bunch of the TX power calibration code -
  setting/obtaining the power detector / gain boundaries,
  programming the PDADC
* Take the -5 dBm TX power offset into account on Merlin -
  "0" in the per-rate TX power register means -5 dBm, not
  0 dBm
* When doing OLC
* Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling
  with the TX power, to avoid the TX power values from wrapping
  when low.
* Implement the 1 dBm cck power offset when doing OLC
* Implement temperature compensation for 2.4ghz mode when doing OLC
* Implement an AR9280 specific TX power calibration routine which
  includes the OLC twiddles, leaving the earlier chipset path
  (AR5416, AR9160) alone

Whilst here, use these refactored routines for the AR9285 TX power
calibration/programming code and enforce correct overflow/underflow
handling when fiddling with TX power values.

Obtained from:	linux ath9k
2011-03-08 06:59:59 +00:00
np
2877ec2362 cxgbe shouldn't directly know of the UMA zones where network buffers
come from.

MFC after:	1 week
2011-03-08 03:04:07 +00:00
kib
c0ee0d94dd Simplify uses of the web of pointers.
Reviewed by:	mckusick
MFC after:	1 week
2011-03-07 22:36:11 +00:00
jhb
d219d97f45 The UFS dirhash code was attempting to update shared state in the dirhash
from multiple threads while holding a shared lock during a lookup operation.
This could result in incorrect ENOENT failures which could then be
permanently stored in the name cache.

Specifically, the dirhash code optimizes the case that a single thread is
walking a directory sequentially opening (or stat'ing) each file.  It uses
state in the dirhash structure to determine if a given lookup is using the
optimization.  If the optimization fails, it disables it and restarts the
lookup.  The problem arises when two threads both attempt the optimization
and fail.  The first thread will restart the loop, but the second thread
will incorrectly think that it did not try the optimization and will only
examine a subset of the directory entires in its hash chain.  As a result,
it may fail to find its directory entry and incorrectly fail with ENOENT.

To make this safe for use with shared locks, simplify the state stored in
the dirhash and move some of the state (the part that determines if the
current thread is trying the optimization) into a local variable.  One
result is that we will now try the optimization more often.  We still
update the value under the shared lock, but it is a single atomic store
similar to i_diroff that is stored in UFS directory i-nodes for the
non-dirhash lookup.

Reviewed by:	kib
MFC after:	1 week
2011-03-07 18:33:29 +00:00
dchagin
52fbc3b17d Remove dead code.
MFC after:	1 Week
2011-03-07 08:12:07 +00:00
kib
f3c6442b93 The execution of the shebang script requires putting interpreter path,
possible option and script path in the place of argv[0] supplied to
execve(2).  It is possible and valid for the substitution to be shorter
then the argv[0].

Avoid signed underflow in this case.

Submitted by:	Devon H. O'Dell <devon.odell gmail com>
PR:	kern/155321
MFC after:	1 week
2011-03-06 22:59:30 +00:00
trasz
0d90d0ceb0 Temporarily revert r219272; it breaks acl_is_trivial_np(3). 2011-03-06 20:12:09 +00:00
mav
2868a01f09 Add some more IDs of HighPoint RocketRAID 64x. 2011-03-06 16:10:39 +00:00
marius
2830ede5b8 - With the addition of TLS support binutils started to make the addend
values for resolved symbols relative to relocbase instead of sections
  so detect this case and handle as appropriate, which allows using
  kernel modules linked with affected versions of binutils. Actually I
  think this is a bug in binutils but given that apparently nobody
  complained for nearly six years and powerpc has basically the same
  workaround I decided to put it in for the sparc64 kernel, too.
- Fix R_SPARC_HIX22 relocations. Apparently these are hardly ever used.
2011-03-06 15:20:11 +00:00
marius
3e53ebd576 - Consistently abbreviate the names of the relocations.
- End sentences with dots.
- Fix whitespace.
2011-03-06 13:25:46 +00:00
marius
8549269265 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:08:25 +00:00
marius
e2cad91205 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:06:41 +00:00
marius
c4b1dac511 - Allocate the DMA memory used for the work area as coherent as at least
the ataahci(4) and atamarvell(4) drivers share it between the host and
  the controller.
- Spell some zeros as BUS_DMA_WAITOK when used as bus_dmamem_alloc() flags.

MFC after:	2 weeks
2011-03-06 12:54:00 +00:00