Commit Graph

1235 Commits

Author SHA1 Message Date
marcel
7774881025 Enable the cfi(4) driver. 2008-10-25 06:25:15 +00:00
marcel
b40a52a5c2 Add a driver for the Local Bus Controller.
Obtained from:	Juniper Networks, Inc.
2008-10-25 06:03:40 +00:00
marcel
caaefb5c1f Assign 0xff800000-0xffffffff to the LBC controller. That's where
the NOR flash lives by default.
2008-10-25 05:57:36 +00:00
marcel
c854de7273 In mmu_booke_mapdev(), handle mappings that cannot be represented
by a single TLB entry. The boot ROM on the MPC85555CDS is 8MB, for
example, and in order to map that we need 2 4MB TLB entries.
2008-10-25 03:36:21 +00:00
nwhitehorn
e5b69cb78e Prevent the OF syscons module from trying to attach to real devices on the
nexus by only attaching to a device with no OF node.
2008-10-15 03:38:03 +00:00
nwhitehorn
0d091e41de Convert PowerPC AIM PCI and nexus busses to standard OFW bus interface. This
simplifies certain device attachments (Kauai ATA, for instance), and makes
possible others on new hardware.

On G5 systems, there are several otherwise standard PCI devices
(Serverworks SATA) that will not allow their interrupt properties to be
written, so this information must be supplied directly from Open Firmware.

Obtained from:	sparc64
2008-10-14 14:54:14 +00:00
marius
a1ec700ce8 Remove ipi_all() and ipi_self() as the former hasn't been used at
all to date and the latter also is only used in ia64 and powerpc
code which no longer serves a real purpose after bring-up and just
can be removed as well. Note that architectures like sun4u also
provide no means of implementing IPI'ing a CPU itself natively
in the first place.

Suggested by:	jhb
Reviewed by:	arch, grehan, jhb
2008-09-28 18:34:14 +00:00
nwhitehorn
5b4acc89f4 Unbreak support for G4s without an L3 cache. L3 cache support was introduced
with, and limited to, the Motorola/Freescale 745x family.

Reported by:	Marco Trillo
2008-09-28 15:12:43 +00:00
nwhitehorn
e873cabccd Expand the DBDMA API to allow setting device-dependent control bits. While
here, clean up and document this a little.

Submitted by:	Marco Trillo
MFC after:	1 week
2008-09-27 15:41:16 +00:00
nwhitehorn
b44c49966f Add DMA support for Apple built-in ATA controllers.
Tested by:	grehan, marcotrillo@gmail.com
MFC after:	1 month
2008-09-27 15:13:44 +00:00
ed
4efdef565f Replace all calls to minor() with dev2unit().
After I removed all the unit2minor()/minor2unit() calls from the kernel
yesterday, I realised calling minor() everywhere is quite confusing.
Character devices now only have the ability to store a unit number, not
a minor number. Remove the confusion by using dev2unit() everywhere.

This commit could also be considered as a bug fix. A lot of drivers call
minor(), while they should actually be calling dev2unit(). In -CURRENT
this isn't a problem, but it turns out we never had any problem reports
related to that issue in the past. I suspect not many people connect
more than 256 pieces of the same hardware.

Reviewed by:	kib
2008-09-27 08:51:18 +00:00
kib
c500808674 Change the static struct sysentvec and struct Elf_Brandinfo initializers
to the C99 style. At least, it is easier to read sysent definitions
that way, and search for the actual instances of sigcode etc.

Explicitely initialize sysentvec.sv_maxssiz that was missed in most
sysvecs.

No objection from:	jhb
MFC after:	1 month
2008-09-24 10:14:37 +00:00
nwhitehorn
2a5e536b9e Allow the cacheline size on PowerPC to be set at runtime. This is essential for
supporting 64-bit CPUs, which often have 128-byte cache lines instead of the
standard 32.
2008-09-24 00:28:46 +00:00
sobomax
f49c21865d Improve rev 183168, so that if /chosen/stdout is connected to the serial
port by OF the syscons won't take over console. Only attach syscons to "screen"
if /chosen/stdout is not connected, which could be the case when loader(8)
is booted directly from the OF. This fixes Marcel's Xserver.

Reported by:	marcel
2008-09-23 22:16:23 +00:00
nwhitehorn
d5de411ace In preparation for PowerPC G5 support, allow PVO objects to contain page
table entries for both the 32-bit and 64-bit AIM MMUs.
2008-09-23 03:02:57 +00:00
nwhitehorn
4c77244de0 Change the DBDMA API to allow DBDMA registers in a subregion of a resource. This is necessary to allow future support of DMA for the various Apple on-board ATA controllers.
MFC after:	1 week
2008-09-23 02:12:47 +00:00
nwhitehorn
455aa296ae Unbreak G3 support. G3 processors don't have an L3 cache, so we shouldn't try to program it.
Approved by:	marcel (mentor)
2008-09-22 03:21:02 +00:00
sobomax
3cfd06d1a5 When attaching framebuffer to "/chosen/stdout" node fails, try attaching
to "screen" node directly. The problem is that by default OF on some (all?)
Macs either doesn't provide "/chosen/stdout" or redirects it somewhere,
unless you boot in manual mode via CMD-ALT-O-F. It's nice to see normal
FreeBSD boot output instead of blank gray screen.
2008-09-19 03:22:47 +00:00
marcel
5657e9d778 o When not making a translation cache-inhibit and guarded (PTE_I|PTE_G)
make it memory-coherency enforced (PTE_M). This is required for SMP
   to work.
o  Serialize tlbie operations and implement the tlbie operation in a
   function called tlbie(). Hardware can end up in a live-lock if
   between the tlbsync and subsequent sync on one processor another
   processor executes a tlbie or tlbsync.
o  Eliminate the following defines:
	TLBIE, TLBSYNC, SYNC and EIEIO
   Use either inline assembly statements or inline functions defined
   in <machine/cpufunc.h>
2008-09-16 19:16:33 +00:00
marcel
c304425191 Rewrite cpudep_ap_bootstrap(). We now enable L3, L2, L1D and L1I
caches if not yet enabed. This is required for coherency and
atomic operations to work, not to mention performance. We use the
L2 and L3 cache settings of the BSP to configure the APs caches.
Can't be bad.

Program NAP and not DOZE. DOZE is present only on earlier CPUs
and the bit is reserved on the MPC7441 & MPC7451. NAP will do
bus snooping to keep caches coherent.

Program the PIR with the cpuid. This may not be necessary...
2008-09-16 17:22:16 +00:00
marcel
79892756cd o In decr_get_timecount() only read the low timebase register.
We're only returning a 32-bit counter.
o  In decr_intr(), manually perform LICM, so that we don't test
   a loop invariant condition inside a loop.
o  Include <machine/smp.h>
2008-09-16 17:11:33 +00:00
marcel
be22078803 Set pcpup->pc_curthread and pcpup->pc_curpcb before calling
pmap_activate. While pmap_activate doesn't need either, we
do need a valid curthread if we enable KTR_PMAP.
2008-09-16 17:03:52 +00:00
marcel
9ed4f7cf04 o Synchronize the APs timebase and decrementer values with the BSP.
o  Don't set/get the PIR register. It's CPU dependent.
o  Also initialize pcpup->pc_curpcb, in case it's dereferenced.
2008-09-16 16:33:36 +00:00
marcel
30ff2246e9 In powerpc_get_pcpup(), make the inline assembly statement
volatile so that the compiler won't perform CSE. For SMP,
this may result in us accessing the wrong PCPU and as such
results in a bogus curthread value.

Note that getting curthread is not quite MP-safe in the sense
that it requires two instructions that aren't performed
atomically. The first instruction gets the address of the PCPU
structure and the second instruction dereferences that pointer
to get curthread. If a thread is switched-out in between these
instructions and switched-in on a different CPU, we still get
the wrong curthread.
2008-09-16 16:28:51 +00:00
marcel
1e7ba9e4d7 Remove the tracing from the AP startup. The AP is known
to start and the tracing can interfere with AP startup.
Instead, use the available space in the reset vector
for the initial stack.
2008-09-16 01:05:54 +00:00
marcel
1beb54fb0c o Remove SPR_TSR & SPR_TCR for AIM.
o  Remove SPR_HID2.
o  Add more SPR_L3CR bit definitions.
2008-09-15 02:51:07 +00:00
marcel
d328b9fcc7 Dont worry about PSL_RI (restartable interrupt indicator) in
common PowerPC code when all we want to achieve is to enable
external interrupts. We can set PSL_RI at any time before we
allow interrupts and/or exceptions, so move it to the AIM
specific initialization and do it when we also set PSL_ME
(machine check enable).
2008-09-15 01:03:16 +00:00
marcel
1c94c73568 Rename cpu_config_l2cr() to cpu_print_cacheinfo(). We're not
configuring the L2 cache on the BSP. Nor the L3 cache. We
merely print the settings.

Save the L2 and L3 cache configuration in global values so
that we know how to configure the cache on APs.
2008-09-15 00:59:49 +00:00
marcel
ec85df75b4 Remove debugging code. 2008-09-14 21:30:01 +00:00
marcel
7f570176d9 Trace interrupts with KTR_INTR. 2008-08-31 23:54:22 +00:00
marcel
b32a4520ea Remove redundant KTR statements. 2008-08-31 20:55:31 +00:00
marcel
970ea61218 Trace all PMAP calls using KTR_PMAP. 2008-08-31 20:08:13 +00:00
marcel
6745d3f73c Remove restore_intr(). We have intr_restore()... 2008-08-31 02:25:20 +00:00
marcel
1a41b28f5c In db_show_mdpcpu(), print MD fields. 2008-08-30 18:50:11 +00:00
marcel
e5965698d4 Whitespace fixes. 2008-08-30 18:48:17 +00:00
marcel
68d75b49c2 Call powerpc_sync() instead of using an asm statement. 2008-08-30 18:39:29 +00:00
marcel
7cf0ef569d Add powerpc_sync() as an inline function. 2008-08-30 18:38:37 +00:00
marcel
906dabe5ad Don't clear PSL_RI. Disabling external interrupts
doesn't make exceptions unrecoverable.
2008-08-30 18:37:55 +00:00
raj
4946f9aaa7 Move initialization of tlb0, ptbl_bufs and kernel_pdir regions after we are
100% sure that TLB1 mapping covers for them; previously we could lock the CPU
with an untranslated references.

Obtained from:	Semihalf
2008-08-28 07:38:08 +00:00
raj
f016db7e16 Improve kernel stack handling on e500.
- Allocate thread0.td_kstack in pmap_bootstrap(), provide guard page
- Switch to thread0.td_kstack as soon as possible i.e. right after return
  from e500_init() and before mi_startup() happens
- Clean up temp stack area
- Other minor cosmetics in machdep.c

Obtained from:	Semihalf
2008-08-26 17:07:37 +00:00
ed
cc3116a938 Integrate the new MPSAFE TTY layer to the FreeBSD operating system.
The last half year I've been working on a replacement TTY layer for the
FreeBSD kernel. The new TTY layer was designed to improve the following:

- Improved driver model:

  The old TTY layer has a driver model that is not abstract enough to
  make it friendly to use. A good example is the output path, where the
  device drivers directly access the output buffers. This means that an
  in-kernel PPP implementation must always convert network buffers into
  TTY buffers.

  If a PPP implementation would be built on top of the new TTY layer
  (still needs a hooks layer, though), it would allow the PPP
  implementation to directly hand the data to the TTY driver.

- Improved hotplugging:

  With the old TTY layer, it isn't entirely safe to destroy TTY's from
  the system. This implementation has a two-step destructing design,
  where the driver first abandons the TTY. After all threads have left
  the TTY, the TTY layer calls a routine in the driver, which can be
  used to free resources (unit numbers, etc).

  The pts(4) driver also implements this feature, which means
  posix_openpt() will now return PTY's that are created on the fly.

- Improved performance:

  One of the major improvements is the per-TTY mutex, which is expected
  to improve scalability when compared to the old Giant locking.
  Another change is the unbuffered copying to userspace, which is both
  used on TTY device nodes and PTY masters.

Upgrading should be quite straightforward. Unlike previous versions,
existing kernel configuration files do not need to be changed, except
when they reference device drivers that are listed in UPDATING.

Obtained from:		//depot/projects/mpsafetty/...
Approved by:		philip (ex-mentor)
Discussed:		on the lists, at BSDCan, at the DevSummit
Sponsored by:		Snow B.V., the Netherlands
dcons(4) fixed by:	kan
2008-08-20 08:31:58 +00:00
jhb
d90774443d Export 'struct pcpu' to userland w/o requiring _KERNEL. A few ports
already define _KERNEL to get to this and I'm about to add hooks to
libkvm to access per-CPU data.

MFC after:	1 week
2008-08-19 19:53:52 +00:00
ed
7237d2d9a2 Disconnect drivers that haven't been ported to MPSAFE TTY yet.
As clearly mentioned on the mailing lists, there is a list of drivers
that have not been ported to the MPSAFE TTY layer yet. Remove them from
the kernel configuration files. This means people can now still use
these drivers if they explicitly put them in their kernel configuration
file, which is good.

People should keep in mind that after August 10, these drivers will not
work anymore. Even though owners of the hardware are capable of getting
these drivers working again, I will see if I can at least get them to a
compilable state (if time permits).
2008-08-03 10:32:17 +00:00
delphij
cb283fcdf7 Add HWPMC_HOOKS to GENERIC kernels, this makes hwpmc.ko work out
of the box.
2008-07-07 22:55:11 +00:00
ed
60aa8a602b Remove the unused M_MEMDEV from the kernel.
The M_MEMDEV memory allocation pool does not seem to be used. We can
live without it.

Approved by:	philip (mentor)
2008-06-25 07:52:10 +00:00
ed
4d6a9685e8 Remove the unused major/minor numbers from iodev and memdev.
Now that st_rdev is being automatically generated by the kernel, there
is no need to define static major/minor numbers for the iodev and
memdev. We still need the minor numbers for the memdev, however, to
distinguish between /dev/mem and /dev/kmem.

Approved by:	philip (mentor)
2008-06-25 07:45:31 +00:00
kevlo
c35e6ad2fb Return an error code rather than ENXIO when both rman_init() and
rman_manage_region() failed.

Reviewed by:	marcel
2008-06-12 02:28:58 +00:00
wkoszek
df2f759279 Fix a typo in a comment. 2008-06-11 20:05:25 +00:00
marcel
6e1dea357c Move bm(4) from the sys/conf/NOTES to sys/powerpc/conf/NOTES.
The driver applies to PowerPC only.
2008-06-08 01:58:11 +00:00
marcel
50176cfd31 Add support for the Apple Big Mac (BMAC) Ethernet controller,
found on various Apple G3 models.

Submitted by:	Nathan Whitehorn
2008-06-07 22:58:32 +00:00