9537 Commits

Author SHA1 Message Date
nyan
a54c0d973e Fix LINT 2003-11-04 14:02:13 +00:00
nyan
9a0462c2a3 Fix to support pc98. 2003-11-04 13:13:04 +00:00
nyan
52ef645f2c Split pc98 support into pc98/pc98/nmi.c. 2003-11-04 13:01:41 +00:00
peter
001816b2ac Make this compile with PAE. 2003-11-04 01:07:04 +00:00
jhb
cf6dec8a88 Remove old APIC header. 2003-11-03 23:10:34 +00:00
jhb
65dadc1a3a Remove remaining bits of old interrupt and APIC code. 2003-11-03 22:51:25 +00:00
jhb
8dcebebfbc Remove the SMP kernel config as SMP is now enabled in GENERIC. 2003-11-03 22:49:51 +00:00
jhb
d426070135 Remove references to SMP and APIC_IO since GENERIC (which this file
includes) already has those enabled by default.
2003-11-03 22:49:19 +00:00
jhb
967ae7515a - Enable SMP and 'device apic' by default.
- Compile 'device acpi' into GENERIC by default as well.  Note that
  the beastie loader menu item to disable ACPI still works if ACPI is
  compiled into the kernel.
2003-11-03 22:48:25 +00:00
jhb
6d6987f0a8 Replace APIC_IO with 'device apic'. 2003-11-03 22:47:19 +00:00
jhb
72b80b4f65 Update includes for new interrupt code. 2003-11-03 22:38:00 +00:00
jhb
c91a0dffde Catch up to interrupt code changes. 2003-11-03 22:37:28 +00:00
jhb
2a63f6f972 - Always allocate the maximum size for the IRQ resource manager. Ideally
we would manage this better by having the interrupt code add each
  interrupt vector to the resource map when each source is registered.
- Use the new interrupt code API for registering and tearing down interrupt
  handlers.
2003-11-03 22:36:43 +00:00
jhb
b9072d94e6 Catch up to i386 interrupt and SMP code changes. 2003-11-03 22:34:53 +00:00
jhb
7aa75d514a New i386 SMP code:
- The MP code no longer knows anything specific about an MP Table.
  Instead, the local APIC code adds CPUs via the cpu_add() function when
  a local APIC is enumerated by an APIC enumerator.
- Don't divide the argument to mp_bootaddress() by 1024 just so that we
  can turn around and mulitply it by 1024 again.
- We no longer panic if SMP is enabled but we are booted on a UP machine.
- init_secondary(), the asm code between init_secondary() and ap_init()
  in mpboot.s and ap_init() have all been merged together in C into
  init_secondary().
- We now use the cpuid feature bits to determine if we should enable
  PSE, PGE, or VME on each AP.
- Due to the change in the implementation of critical sections, acquire
  the SMP TLB mutex around a slightly larger chunk of code for TLB
  shootdowns.
- Remove some of the debug code from the original SMP implementation
  that is no longer used or no longer applies to the new APIC code.
- Use a temporary hack to disable the ACPI module until the SMP code has
  been further reorganized to allow ACPI to work as a module again.
- Add a DDB command to dump the interesting contents of the IDT.
2003-11-03 22:32:04 +00:00
jhb
e566bb589b Don't probe PnP BIOS devices for PICs for now to avoid problems with those
devices claiming resources that they don't actually use.  The PIC drivers
only register valid interrupt sources, so we don't need to rely on these
drivers to claim invalid IRQs to prevent their use by other drivers.
2003-11-03 22:22:04 +00:00
jhb
35c1473f49 - Remove explicit enabling of the BSP's APIC in the APIC_IO case and the
slave pin on the master PIC in the !APIC_IO case.  The PIC drivers now
  manage these details internally.
- Remove an spl0() that hasn't done anything since SMPng was first
  committed.
- Update some comments that have rotted since SMPng.
2003-11-03 22:20:50 +00:00
jhb
84abbca28e - Update includes.
- Use intr_suspend/resume() callouts to the interrupt code layer which
  suspends and resumes all the known interrupt sources instead of calling
  icu_reinit() directly.
2003-11-03 22:18:57 +00:00
jhb
327da31882 Add the ACPI MADT table APIC enumerator. This code uses the ACPI Multiple
APIC Descriptor Table to enumerate both I/O APICs and local APICs.  ACPI
does not embed PCI interrupt routing information in the MADT like the MP
Table does.  Instead, ACPI stores the PCI interrupt routing information
in the _PRT object under each PCI bus device.  The MADT table simply
provides hints about which interrupt vectors map to which I/O APICs.  Thus
when using ACPI, the existing ACPI PCI bridge drivers are sufficient to
route PCI interrupts.
2003-11-03 22:17:44 +00:00
jhb
bbc9fed833 Add the MP Table APIC enumerator. This code uses the BIOS MP Table to
enumerate I/O APICs as well as local APICs.  It also provides Host-PCI
and PCI-PCI bridge drivers to use the MP Table to route PCI interrupts.
2003-11-03 22:12:37 +00:00
jhb
a7c1f412b0 - Export doreti as a global symbol.
- Don't include isa/vector.s.  Each PIC driver's entry points now live in
  their own standalone files.
2003-11-03 22:08:52 +00:00
jhb
88594488f5 Update names of entry points for interrupt frames. 2003-11-03 22:07:21 +00:00
jhb
dcec7e1907 New APIC support code:
- The apic interrupt entry points have been rewritten so that each entry
  point can serve 32 different vectors.  When the entry is executed, it
  uses one of the 32-bit ISR registers to determine which vector in its
  assigned range was triggered.  Thus, the apic code can support 159
  different interrupt vectors with only 5 entry points.
- We now always to disable the local APIC to work around an errata in
  certain PPros and then re-enable it again if we decide to use the APICs
  to route interrupts.
- We no longer map IO APICs or local APICs using special page table
  entries.  Instead, we just use pmap_mapdev().  We also no longer
  export the virtual address of the local APIC as a global symbol to
  the rest of the system, but only in local_apic.c.  To aid this, the
  APIC ID of each CPU is exported as a per-CPU variable.
- Interrupt sources are provided for each intpin on each IO APIC.
  Currently, each source is given a unique interrupt vector meaning that
  PCI interrupts are not shared on most machines with an I/O APIC.
  That mapping for interrupt sources to interrupt vectors is up to the
  APIC enumerator driver however.
- We no longer probe to see if we need to use mixed mode to route IRQ 0,
  instead we always use mixed mode to route IRQ 0 for now.  This can be
  disabled via the 'NO_MIXED_MODE' kernel option.
- The npx(4) driver now always probes to see if a built-in FPU is present
  since this test can now be performed with the new APIC code.  However,
  an SMP kernel will panic if there is more than one CPU and a built-in
  FPU is not found.
- PCI interrupts are now properly routed when using APICs to route
  interrupts, so remove the hack to psuedo-route interrupts when the
  intpin register was read.
- The apic.h header was moved to apicreg.h and a new apicvar.h header
  that declares the APIs used by the new APIC code was added.
2003-11-03 21:53:38 +00:00
jhb
aac4b7181c Add the new atpic(4) driver for the 8259A master and slave PICs. By
default we provide 16 interrupt sources for IRQs 0 through 15.  However,
if the I/O APIC driver has already registered sources for any of those IRQs
then we will silently fail to register our own source for that IRQ.

Note that i386/isa/icu.h is now specific to the 8259A and no longer
contains any info relevant to APICs.  Also note that fast interrupts no
longer use a separate entry point.  Instead, both fast and threaded
interrupts share the same entry point which merely looks up the appropriate
source and passes control to intr_execute_handlers().
2003-11-03 21:34:45 +00:00
jhb
2eeede4b8b Add a per-thread variable for saving the state of eflags to support the
critical section code.
2003-11-03 21:30:00 +00:00
jhb
2971f930e6 Allocate space for the intrcnt array. This array is managed in the
interrupt code layer as interrupt sources are added and handlers added
to those sources.
2003-11-03 21:28:54 +00:00
jhb
d85aa501e2 New device interrupt code. This defines an interrupt source abstraction
that provides methods via a PIC driver to do things like mask a source,
unmask a source, enable it when the first interrupt handler is added, etc.
The interrupt code provides a table of interrupt sources indexed by IRQ
numbers, or vectors.  These vectors are what new-bus uses for its IRQ
resources and for bus_setup_intr()/bus_teardown_intr().  The interrupt
code then maps that vector a given interrupt source object.  When an
interrupt comes in, the low-level interrupt code looks up the interrupt
source for the source that triggered the interrupt and hands it off to
this code to execute the appropriate handlers.

By having an interrupt source abstraction, this allows us to have different
types of interrupt source providers within the shared IRQ address space.
For example, IRQ 0 may map to pin 0 of the master 8259A PIC, IRQs 1
through 60 may map to pins on various I/O APICs, and IRQs 120 through
128 may map to MSI interrupts for various PCI devices.
2003-11-03 21:25:52 +00:00
jhb
7ed7a0db1d - Always use 256 IDT entries since it is now a runtime decison as to how
many entries we use.
- Add a constant IDT_IO_INTS for the first IDT entry used for device
  interrupts.
2003-11-03 21:12:04 +00:00
jhb
6ad174af9d Move the NMI handling code out to its own file. 2003-11-03 21:10:17 +00:00
jhb
1b6c1e8859 Define IDTVEC() and TRAP() assembly macros so that they can be shared
with several files.
2003-11-03 21:09:17 +00:00
jhb
cb9d92d08a Revert the critical section implementation to disable interrupts via
cli/sti now that we support many more than 32 interrupt sources.
2003-11-03 21:06:54 +00:00
jhb
d4fb13c8f3 Remove soon to be obsolete file to break kernel build while the new
interrupt code comes in.
2003-11-03 21:00:34 +00:00
obrien
52cdb57ae0 Add AMD Features NX and LM. 2003-11-03 14:59:05 +00:00
phk
1333a1f77f Change /dev/soekris-errled to be /dev/led/error and make it conditional
on CPU_SOEKRIS.

Note the subtle change in semantfics for 'f%d' flash instruction and the
new morse facility (see details in dev/led/led.c)
2003-11-03 11:03:40 +00:00
phk
88abb8f31b Introduce new CPU_SOEKRIS option to tell soekris hardware from other
hardware based on similar chipsets.
2003-11-03 10:34:40 +00:00
phk
ea16f6fe64 Free major#100 2003-11-03 10:19:33 +00:00
njl
a7ed426851 Fix the logic to match the new name of the tunable.
Pointed out by:	iwasaki
2003-11-01 01:05:53 +00:00
njl
b98ee2e97a Change the reset video option to be positive (hw.acpi.reset_video).
Requested by:	jhb

Initialize the real mode stack.  This is needed at least for the return
address from the lcall.
Requested by:	takawata

Fix style bugs in acpi_wakecode.S
Requested by:	bde

Remove the kernel option now that we have the tunable.
2003-11-01 00:18:29 +00:00
jhb
117cccb841 For physical address regions between 0 and KERNLOAD, allow pmap_mapdev()
to use the direct mapped KVA at KERNBASE to service the request.  This also
allows pmap_mapdev() to be used for such addresses very early during the
boot process and might provide some small savings on KVA.

Reviewed by:	peter
2003-10-31 21:02:04 +00:00
jhb
0d85f27845 Lower the priority of the legacy host to pci bridge driver so that other
non-ACPI host-bridge drivers can preempt this driver.
2003-10-31 21:00:37 +00:00
brooks
f1e94c6f29 Replace the if_name and if_unit members of struct ifnet with new members
if_xname, if_dname, and if_dunit. if_xname is the name of the interface
and if_dname/unit are the driver name and instance.

This change paves the way for interface renaming and enhanced pseudo
device creation and configuration symantics.

Approved By:	re (in principle)
Reviewed By:	njl, imp
Tested On:	i386, amd64, sparc64
Obtained From:	NetBSD (if_xname)
2003-10-31 18:32:15 +00:00
jhb
5865debe46 - Finish externing of r_idt in the f00f hack code.
- Miscellaneous style fixes in the f00f hack code and some nearby code.

Submitted by:	bde
2003-10-31 14:24:28 +00:00
peter
e08504bacf Change the pmap_invalidate_xxx() functions so they test against
pmap == kernel_pmap rather than pmap->pm_active == -1.  gcc's inliner
can remove more code that way.  Only kernel_pmap has a pm_active of -1.
2003-10-30 22:15:22 +00:00
jhb
631c81dbef Include "opt_pmap.h" so that the DISABLE_P* options are honored. 2003-10-30 21:42:44 +00:00
jhb
17278d122d Always export r_gdt and r_idt and give them extern declarations in
machine/segments.h.
2003-10-30 21:42:17 +00:00
brooks
38e31120fc There is no way to enter the attach routine twice with the same softc
without a detach call in between so don't try to deal with that
possiability.

This is a diff-reduction commit for the upcoming if_xname conversion.
2003-10-30 19:45:58 +00:00
iwasaki
d959b1ec08 Add sysctl MIB and loader tunable `hw.acpi.no_reset_video' as
the same effect as ACPI_NO_RESET_VIDEO kernel option.
2003-10-30 16:14:55 +00:00
davidxu
91407731e5 Try to fetch thread mailbox address in page fault trap, so when thread
blocks in page fault hanlder, and upcall thread can be scheduled. It is
useful if process is doing lots of mmap based I/O.
2003-10-30 02:55:43 +00:00
iwasaki
8c1d6750c9 Alphabetical order for ACPI options broken by adding ACPI_NO_RESET_VIDEO.
Add short comment about ACPI_NO_RESET_VIDEO into NOTES.

Pointed-out by:	njl
2003-10-29 14:22:09 +00:00
iwasaki
143f8d89ab Add kernel option ACPI_NO_RESET_VIDEO as workaround for problems
(e.g. LCD white-out after resume) on some machine cased by
re-initialize video BIOS code in acpi_wakecode.
2003-10-29 03:30:45 +00:00