Commit Graph

368 Commits

Author SHA1 Message Date
obrien
c63dab466c Use __FBSDID().
Also some minor style cleanups.
2003-08-24 17:55:58 +00:00
imp
c23aaeeba4 Prefer new location of pci include files (which have only been in the
tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.
2003-08-22 05:54:52 +00:00
scottl
4d495abb9d Mega busdma API commit.
Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg.
Lockfunc allows a driver to provide a function for managing its locking
semantics while using busdma.  At the moment, this is used for the
asynchronous busdma_swi and callback mechanism.  Two lockfunc implementations
are provided: busdma_lock_mutex() performs standard mutex operations on the
mutex that is specified from lockfuncarg.  dftl_lock() is a panic
implementation and is defaulted to when NULL, NULL are passed to
bus_dma_tag_create().  The only time that NULL, NULL should ever be used is
when the driver ensures that bus_dmamap_load() will not be deferred.
Drivers that do not provide their own locking can pass
busdma_lock_mutex,&Giant args in order to preserve the former behaviour.

sparc64 and powerpc do not provide real busdma_swi functions, so this is
largely a noop on those platforms.  The busdma_swi on is64 is not properly
locked yet, so warnings will be emitted on this platform when busdma
callback deferrals happen.

If anyone gets panics or warnings from dflt_lock() being called, please
let me know right away.

Reviewed by:	tmm, gibbs
2003-07-01 15:52:06 +00:00
gibbs
708665d743 Fix a race condition in the flushing of commands that
have completed across the bus but not to the host before
processing of an exception condition (busfree, bus reset,
etc.).  When flushing the controller of completed commands,
we also look for packetized commands that have completed
with good status and are stored in the "good status fifo".
The hardware will post to the good status fifo even if
data for that command is still active in a FIFO.  In
one particular failure case, a command outstanding on the
bus reconnected, transferred data into a FIFO, and provided
good status while the host driver was processing an expected
busfree event (PPR message negotiation).  This resulted in
an entry in the good status fifo that we completed, but
since the sequencer was paused, the data in the data FIFO
for this command had never been transferred to the host.
Once the busfree processing was complete, the sequencer
was unpaused, and the data completed its transfer to the
host.  In some instances, the client for the data was notified
of the completion and attempted to view the data before
it arrived.  This case only occurred during FreeBSD's
multi-target probe of the SCSI bus while some devices are
negotiating to go packetized and some devices are already
running in packetized.

The fix is to run and FIFOs active with a context in the
good status fifo to completion before completing the command
to the SCSI layer.  This requies duplicating the FIFO rundown
operations in the host driver that would usually be handled
by the firmware, but there is no other alternative.

Don't blindly shutdown the SCB dma engine when restarting
the sequencer.  We may be killing an operation that is
not supposed to be cancelled.  The cases where we need to
shutdown these dma engines are already handled elsewhere in
the driver.

Fix a few more ahd_in?() -> ahd_in?_scbram() instances.
2003-06-28 04:46:54 +00:00
gibbs
19f91b5d1a aic79xx.h:
Add softc flag to indicate that we have seen at
	least one selection since the last bus reset or
	SE/LVD bus change.

aic79xx.c:
	Fix a few style nits.

	In ahd_update_pending_scbs(), only touch card registers
	once we have found an SCB that needs to be updated.
	This removes lots of clutter from PCI traces taken of
	error recovery performed by the driver.

	Short circuit the first selection iocell workaround handler
	if we've run once since the last bus reset or iocell change.
	This also removes clutter from PCI traces.

	Note if completions are pending in the qoutfifo when we dump
	card state.
2003-06-28 04:45:25 +00:00
gibbs
4d49134a71 Use clr instead of an explicit mov from ALLZEROS
to clear SCB_FIFO_USE_COUNT.  This is just a
syntactic change.
2003-06-28 04:44:10 +00:00
gibbs
5473e39568 Implement ahd_inq_scbram() and change the implemention
of ahd_inl_scbram to use ahd_inw_scbram instead of
ahd_inb_scbram().
2003-06-28 04:43:19 +00:00
gibbs
823e5bf4ee Correct a typo in a comment.
Add a comment in ahd_clear_critical_sections() about
our need to leave ENBUSFREE set in SIMODE1 while single
stepping.

Re-arrange some delay loops so that we always perform
a read after any register write and before the delay.
This should make the delay loop more accurate.

When completing message processing for a packetized
commention, return the controller to a state where
invalid non-packetized phases will still cause protocol
violations.  These are the same operations as those
performed in the clear_target_state routine in the
firmware.

Now that we have a chip with working ABORTPENDING
support (the 7901B), comment out the automatic use
of this feature until we can adequately test it.
The previous checkin updated the bug mask for the
7901B so this code was exercised.

When resetting the bus, perform an ahd_flush_device_writes()
call so that our reset assertion delay is acurately
timed from when the reset bit is written to the controller.
2003-06-28 04:42:11 +00:00
gibbs
537cb82613 aic79xx.seq:
Remove an old comment that no longer applies.

	Fix a jump in our unexpected non-packetized phase
	handler to use an explicit lable.  The old code
	had a hardcoded jump offset that was off by one
	instruction.
2003-06-28 04:40:46 +00:00
gibbs
165f44a353 aic79xx.h:
Add a 7901A specific feature definition.

aic79xx_pci.c:
	Split out the general aic790X setup into it's own
	setup handler that works on single and dual controllers.
	Adjust all other PCI setup handlers to initialize the
	chips basic features and type before calling the generic
	handler.

	Turn off a few Rev B workarounds that are not required
	on the 7901B.
2003-06-28 04:39:49 +00:00
gibbs
a1fca12a50 Add parenthesis so that we get all of the bits all
of the contents of the CCSCBCTL register into our
local varaible.  The other bits are used in later tests.
This avoids a potential deadlock in ahd_run_qoutfifo()
if we happen to catch the DMA engine in just the right
state.
2003-06-23 22:06:34 +00:00
njl
ea1ca84312 Merge common XPT_CALC_GEOMETRY functions into a single convenience function.
Devices below may experience a change in geometry.

* Due to a bug, aic(4) never used extended geometry.  Changes all drives
  >1G to now use extended translation.
* sbp(4) drives exactly 1 GB in size now no longer use extended geometry.
* umass(4) drives exactly 1 GB in size now no longer use extended geometry.

For all other controllers in this commit, this should be a no-op.

Looked over by:	scottl
2003-06-14 22:17:41 +00:00
gibbs
be413c7591 Sync perforce IDs. 2003-06-10 03:25:24 +00:00
gibbs
177269851c When single stepping, only leave ENBUSFREE enabled
if it was already enabled.  We don't want to set it
when it shouldn't be set, we just don't want to
inadvertantly turn it off.  This should fix a recent
report of the aic7xxx driver repeatedly complaining of
"unexpected busfree while idle" in one configuration.
2003-06-06 23:53:39 +00:00
gibbs
ce5adf612a Clear stale PCI errors during our test for
successfully mapping our registers.  This
avoids the disabling of memory mapped I/O
just because some other driver probe happened
to touch our registers.
2003-06-06 23:52:34 +00:00
gibbs
702257f6c8 Work around SCSI spec violation by the Quantum Atlas 10K.
This drive delays going async after receiving a WDTR
message.  We now send an SDTR message after a WDTR even
if our goal is to go async.  This should work even for
confused devices.

If we get an unexpected busfree when attempting a WDTR
or SDTR, only set the goal negotiation parameters we were
trying to negotiate to off.  This means that should a WDTR
message fail, we will still try an SDTR if our goal is
non-async.

Fix a few more places where we were looking at goal.period
instead of goal.offset for determining if we should be
negotiating sync.  This should not have any impact on
our behavior, but the offset is more definitive and should
be used.
2003-06-06 23:51:13 +00:00
gibbs
a0dd99d290 aic7770.c:
aic79xx.c:
aic79xx.h:
aic79xx_pci.c:
aic7xxx.c:
aic7xxx.h:
aic7xxx_pci.c:
	Switch ah?_reset() to take an additional "reinit" argument.
	Use this instead of init_level to determin if the chip
	should be fully reinitialized after a chip reset.  This
	is required so that ah?_shutdown() can reset the chip
	without side-effects.

aic79xx.c:
	Implement ahd_suspend() and ahd_resume().

aic7xxx.c:
	Change ahc_loadseq() to *not* restart the sequencer.
	This brings the loadseq behavior in line with that
	of the 7902 driver and also simplifies the init routine.

	Correct the resume routine to enable interrupts and
	restart the sequencer.
2003-06-06 23:48:19 +00:00
gibbs
2b4b90c0c2 Add probe entry for the 284X with BIOS disabled. 2003-06-06 23:40:48 +00:00
gibbs
c1ea388b6d Constify a string used in our EISA probe tables.
Fix a few style nits.
2003-06-06 23:40:07 +00:00
scottl
5c9b1bb6e8 aic79xx.c:
Use the special LUNLEN_SINGLE_LEVEL constant for
	post Rev A4 hardware for single byte luns.  Without
	this change, Rev B hardware would place the single
	byte of lun data in byte 0 of the lun structure when
	it should be in byte 1.  Since there are few if any
	devices on the market that support multiple luns in
	target mode, the corrupted lun field (which was only
	corrupted for non-zero luns) wasn't hurting us.

Approved by: re	(rwatson)
2003-05-30 02:15:15 +00:00
scottl
1f90066cae Fix a reported case of severe data corruption:
aic79xx.h:
aic79xx.reg:
	Return the SCB_TAG field to 16byte alignment.
	It seems that on some PCI systems, SCBs are not
	transferred correctly to the controller with
	the previous placement of the SCB_TAG field.

Approved by:	re (rwatson)
2003-05-30 02:14:22 +00:00
scottl
f26aca7b71 Bring back bus_dmasync_op_t. It is now a typedef to an int, though the
BUS_DMASYNC_ definitions remain as before.  The does not change the ABI,
and reverts the API to be a bit more compatible and flexible.  This has
survived a full 'make universe'.

Approved by:	re (bmah)
2003-05-27 04:59:59 +00:00
gibbs
40cb429973 This driver supports the 2920C not the 2920.
Make this clear in our card identification string.

PR: kern/50428
Approved by: RE
2003-05-26 21:45:09 +00:00
gibbs
8571ed58ca Consistently use #ifdef for testing AHC_TARGET_MODE.
Approved by: RE
2003-05-26 21:44:03 +00:00
gibbs
cdadf6fa34 aic79xx.c:
aic79xx_osm.h:
aic7xxx_osm.h:
	Explicitly define functions that take no arguments
	with "(void)"

Approved by: RE
2003-05-26 21:43:29 +00:00
gibbs
662549db7e Correct/Simplify ignore wide residue message handling
aic79xx.c:
	In ahd_handle_ign_wide_residue():
	o Use SCB_XFERLEN_ODD SCB field to determine transfer
	  "oddness" rather than the DATA_COUNT_ODD logic.
	  SCB_XFERLEN_ODD is toggled on every ignore wide
	  residue message so that multiple ignore wide residue
	  messages for the same transaction are properly supported.
	o If the sg list has been exausted, the sequencer
	  doesn't bother to update the residual data count
	  since it is known to be zero.  Perform the zeroing
	  manually before calculating the remaining data count.
	o Use multibyte in/out macros instead of shifting/masking
	  by hand.

aic79xx_inline.h:
	In ahd_setup_scb_common(), setup the SCB_XFERLEN_ODD field.

aic79xx.reg:
	Use the SCB_TASK_ATTRIBUTE field as a bit field in the
	non-packetized case.  We currently only define one bit,
	SCB_XFERLEN_ODD.

	Remove the ODD_SEG bit field that was used to carry the odd
	transfer length information through the SG cache.  This
	is obviated by SCB_XFERLEN_ODD field.

	Remove the DATA_COUNT_ODD scratch ram byte that was used
	dynamicaly compute data transfer oddness.  This is obviated
	by SCB_XFERLEN_ODD field.

aic79xx.seq:
	Remove all updates to the DATA_COUNT_ODD scratch ram field.
	Remove all uses of ODD_SEG.  These two save quite a few
	sequencer instructions.

	Use SCB_XFERLEN_ODD to validate the end of transfer
	ignore wide residue message case.
2003-05-26 21:26:52 +00:00
gibbs
8d1a019282 FIFOEMP can lag LAST_SEG_DONE in the Ultra2 and U160
hardware.  Wait a few extra clocks for FIFOEMP to assert
before calling an overrun.

Approved by: RE
2003-05-26 21:24:55 +00:00
gibbs
833b47a80a Correct/Simplify ignore wide residue message handling
aic7xxx.c:
	In ahc_handle_ign_wide_residue():
	o Use SCB_XFERLEN_ODD SCB field to determine transfer
	  "oddness" rather than the DATA_COUNT_ODD logic.
	  SCB_XFERLEN_ODD is toggled on every ignore wide
	  residue message so that multiple ignore wide residue
	  messages for the same transaction are properly supported.
	o If the sg list has been exausted, the sequencer
	  doesn't bother to update the residual data count
	  since it is known to be zero.  Perform the zeroing
	  manually before calculating the remaining data count.
	o Ensure that SG_LIST_NULL is cleared in the
	  residual sg pointer for "mid-transfer" ignore
	  wide residue cases.
	o Use multibyte in/out macros instead of shifting/masking
	  by hand.

aic7xxx.h:
	Modify the SCB_GET_LUN() macro to mask the lun hardware
	SCB field with LID.  This leaves two bits in the LUN
	field that can be used for other purposes.

aic7xxx.reg:
	Change LID to be 0x3F.  This is the maximum supported
	lun size for non-packetized SCSI.  Map the top bit
	of the lun to SCB_XFERLEN_ODD.  The host must set
	this bit whenever a transfer is an odd length.

	Remove the ODD_SEG bit field that was used to carry the odd
	transfer length information through the SG cache.  This
	is obviated by SCB_XFERLEN_ODD field.

	Remove the DATA_COUNT_ODD scratch ram byte that was used
	dynamicaly compute data transfer oddness.  This is obviated
	by SCB_XFERLEN_ODD field.

aic7xxx.seq:
	Be more careful in our handling of the SCB_LUN field.  It
	must be masked with LID if only lun information is desired.

	Remove all updates to the DATA_COUNT_ODD scratch ram field.
	Remove all uses of ODD_SEG.  These two save quite a few
	sequencer instructions.

	Use SCB_XFERLEN_ODD to validate the end of transfer
	ignore wide residue message case.

aic7xxx_inline.h:
	In ahc_queue_scb(), setup the SCB_XFERLEN_ODD field.

Approved by: RE
2003-05-26 21:24:01 +00:00
gibbs
b25cf57baf Fix disabling of PCI parity error interrupts. We need to set
FAILDIS in the SEQCTL register, not the HCNTRL register.

aic7xxx.c:
	Remeber SEQCTL settings in the "seqctl" field of our
	softc.  seqctl defaults to just having FASTMODE set,
	but the bus attachments can override this.

aic7xxx.h:
	Add the seqctl softc field.

aic7xxx_pci.c:
	Update the seqctl softc field and manually update SEQCTL
	when to many PCI errors occur

Approved by: RE
2003-05-26 21:20:47 +00:00
gibbs
aa79fd0e56 Change hadling of the Rev. A packetized lun output bug
to be more efficient by having the sequencer copy the
single byte of valid lun data into the long lun field.

aic79xx.c:
	Memset our hardware SCB to 0 so that untouched
	fields don't confuse diagnostic output.  With the
	old method for handling the Rev A bug, if the long
	lun field was not 0, this could result in bogus
	lun information being sent to drives.

	Use the same SCB transfer size for all chip types
	now that the long lun is not DMA'ed to the chip.

aic79xx.seq:
	Add code to copy lun information for Rev.A hardware.

aic79xx_inline.h:
	Remove host update of the long_lun field on every
	packetized command.
2003-05-26 21:18:48 +00:00
gibbs
ce89bea7d0 Add 7901B support.
Sort IDs based on chip type.

Remove IROC IDs.  We'll switch to using the IROC masks
if/when we want to start attaching to IROC controllers.

Approved by: RE
2003-05-26 21:15:52 +00:00
gibbs
aaad5f7349 Fixup spelling of "coalesce" and derivatives.
Approved by: RE
2003-05-26 21:10:58 +00:00
gibbs
1785f08951 Remove stray K&R style function definition.
Approved by: RE
2003-05-26 21:09:15 +00:00
gibbs
f0f17ca454 Correct spelling errors.
Switch to handling bad SCSI status as a sequencer interrupt
instead of having the kernel proccess these failures via
the completion queue.  This is done because:

 o The old scheme required us to pause the sequencer and clear
   critical sections for each SCB.  It seems that these pause
   actions, if coincident with a sequencer FIFO interrupt, would
   result in a FIFO interrupt getting lost or directing to the
   wrong FIFO.  This caused hangs when the driver was stressed
   under high "queue full" loads.
 o The completion code assumed that it was always called with
   the sequencer running.  This may not be the case in timeout
   processing where completions occur manually via
   ahd_pause_and_flushwork().
 o With this scheme, the extra expense of clearing critical
   sections is avoided since the sequencer will only self pause
   once all pending selections have cleared and it is not in
   a critical section.

  aic79xx.c
	Add code to handle the new BAD_SCB_STATUS sequencer
	interrupt code.  This just redirects the SCB through
	the already existing ahd_complete_scb() code path.
	Remove code in ahd_handle_scsi_status() that paused
	the sequencer, made sure that no selections where
	pending, and cleared critical sections.  Bad
	status SCBs are now only processed when all of these
	conditions are true.

  aic79xx.reg:
	Add the BAD_SCB_STATUS sequencer interrupt code.

  aic79xx.seq:
	When completing an SCB upload to the host, if
	we are doing this because the SCB contains non-zero
	SCSI status, defer completing the SCB until there
	are no pending selection events.  When completing
	these SCBs, use the new BAD_SCB_STATUS sequencer
	interrupt.  For all other uploaded SCBs (currently
	only for underruns), the SCB is completed via the
	normal done queue.  Additionally, keep the SCB that
	is currently being uploaded on the COMPLETE_DMA_SCB
	list until the dma is completed, not just until the
	DMA is started.  This ensures that the DMA is restarted
	properly should the host disable the DMA transfer for
	some reason.

	In our RevA workaround for Maxtor drives, guard against
	the host pausing us while trying to pause I/O until the
	first data-valid REQ by clearing the current snapshot
	so that we can tell if the transfer has completed prior
	to us noticing the REQINIT status.

	In cfg4data_intr, shave off an instruction before getting
	the data path running by adding an entrypoint to the
	overrun handler to also increment the FIFO use count.

	In the overrun handler, be sure to clear our LONGJMP
	address in both exit paths.

Perform a few sequencer optimizations.

  aic79xx.c:
	Print the full path from the SCB when a packetized
	status overrun occurs.

	Remove references to LONGJMP_SCB which is being
	removed from firmware usage.

	Print the new SCB_FIFO_USE_COUNT field in the
	per-SCB section of ahd_dump_card_state().  The
	SCB_TAG field is now re-used by the sequencer,
	so it no longer makes sense to reference this
	field in the kernel driver.

  aic79xx.h:
	Re-arrange fields in the hardware SCB from largest
	size type to smallest.  This makes it easier to
	move fields without changing field alignment.

	The hardware scb tag field is now down near the
	"spare" portion of the SCB to facilitate reuse
	by the sequencer.

  aic79xx.reg:
	Remove LONGJMP_ADDR.

	Rearrange SCB fields to match aic79xx.h.
	Add SCB_FIFO_USE_COUNT as the first byte
	of the SCB_TAG field.

  aic79xx.seq:
	Add a per-SCB "Fifos in use count" field and use
	it to determine when it is safe (all data posted)
	to deliver status back to the host.  The old method
	involved polling one or both FIFOs to verify that
	the current task did not have pending data.  This
	makes running down the GSFIFO very cheap, so we
	will empty the GSFIFO in one idle loop pass in
	all cases.

	Use this simplification of the completion process
	to prune down the data FIFO teardown sequencer for
	packetized transfers.  Much more code is now shared
	between the data residual and transfer complete cases.

	Correct some issues in the packetized status handler.
	It used to be possible to CLRCHN our FIFO before status
	had fully transferred to the host.  We also failed to
	handle NONPACKREQ phases that could occur should a CRC
	error occur during transmission of the status data packet.

Correct a few big endian issues:

  aic79xx.c:
  aic79xx_inline.h:
  aic79xx_pci.c:
  aic79xx_osm.c:
	o Always get the SCB's tag via the SCB_GET_TAG acccessor
	o Add missing use of byte swapping macros when touching
	  hscb fields.
	o Don't double swap SEEPROM data when it is printed.
	  Correct a big-endian bug.  We cannot assign a
	o When assigning a 32bit LE variable to a 64bit LE
	  variable, we must be explict about how the words
	  of the 64bit LE variable are initialized.  Cast to
	  (uint32_t*) to do this.

aic79xx.c:
	In ahd_clear_critical_section(), hit CRLSCSIINT
	after restoring the interrupt masks to avoid what
	appears to be a glitch on SCSIINT.  Any real SCSIINT
	status will be persistent and will immidiately
	reset SCSIINT.  This clear should only get rid of
	spurious SCSIINTs.

	This glitch was the cause of the "Unexpected PKT busfree"
	status that occurred under high queue full loads

	Call ahd_fini_scbdata() after shutdown so that
	any ahd_chip_init() routine that might access
	SCB data will not access free'd memory.

	Reset the bus on an IOERR since the chip doesn't
	seem to reset to the new voltage level without
	this.

	Change offset calculation for scatter gather maps
	so that the calculation is correct if an integral
	multiple of sg lists does not fit in the allocation
	size.

	Adjust bus dma tag for data buffers based on 39BIT
	addressing flag in our softc.

	Use the QFREEZE count to simplify ahd_pause_and_flushworkd().
	We can thus rely on the sequencer eventually clearing ENSELO.

	In ahd_abort_scbs(), fix a bug that could potentially
	corrupt sequencer state.  The saved SCB was being
	restored in the SCSI mode instead of the saved mode.
	It turns out that the SCB did not need to be saved at all
	as the scbptr is already restored by all subroutines
	called during this function that modify that register.

aic79xx.c:
aic79xx.h:
aic79xx_pci.c:
	Add support for parsing the seeprom vital product
	data.  The VPD data are currently unused.

aic79xx.h:
aic79xx.seq:
aic79xx_pci.c:
	Add a firmware workaround to make the LED blink
	brighter during packetized operations on the H2A.

aic79xx_inline.h:
	The host does not use timer interrupts, so don't
	gate our decision on whether or not to unpause
	the sequencer on whether or not a timer interrupt
	is pending.
2003-05-04 00:20:07 +00:00
gibbs
0ad8e69a7c aic7xxx.c:
aic7xxx.h:
	Split out core chip initialization into ahc_chip_init().
	This will allow us to reset the chip correctly at times
	other than initial chip setup.

aic7770.c
aic7xxx_pci.c:
	Flesh out bus chip init methods for our two
	bus attachments and use these, in addition to
	bus suspend/resume hooks to get the core in
	better shape for handling these events.

	When disabling PCI parity error checking, use FAILDIS.
	Although the chip docs indicate that clearing PERRESPEN
	should also work, it does not.

	Auto-disable pci parity error checking after informing
	the user of AHC_PCI_TARGET_PERR_THRESH number of parity
	errors observed as a target.

aic7xxx.h:
aic7xxx_pci.c
aic7770.c
aic7xxx.c
	Add the instruction_ram_size softc field.

	Remove the now unused stack_size softc field.

	Modify ahc_loadseq to return a failure code
	and to actually check the downloaded instruction
	count against the limit set in our softc.

	Modify callers of ahc_loadseq to handle load
	failures as appropriate.

	Set instruction RAM sizes for each chip type.

aic7xxx_pci.c:
	Add some delay in the aic785X termination
	control code.  This may fix problems with
	the 2930.

	Be consistent in how we access config space
	registers.  16bit registers are accessed using
	16bit ops.

aic7xxx.c:
	Correct spelling errors.

	Have ahc_force_renegotiation() take a devinfo as is done
	in the U320 driver.  Use this argument to correct a bug
	in the selection timeout handler where we forced a renegotiation
	with the last device that had set SAVED_SCSIID.  SAVED_SCSIID
	is only updated once a selection is *sucessfull* and so is
	stale for any selection timeout.

	Cleanup the setup of the devinfo for busfree events.  We
	now use this devinfo for a call to ahc_force_renegotiation()
	at the bottom of the routine, so it must be initialized in
	all cases.

	In ahc_pause_and_flushwork(), adjust the loop so that it
	will exit in the hot-eject case even if the INT_PEND mask
	is something other than 0xFF (as it is in this driver).

	Correct a wrapping string constant.

	Call ahc_fini_scbdata() after shutdown so that
	any ahc_chip_init() routine that might access
	SCB data will not access free'd memory.

	Correctly setup our buffer tag to indicate that 39bit
	addressing is available if in 39bit addressing mode.

	Rearrange some variable declarations based on
	type size.

aic7xxx.c
aic7xxx.h:
aic7xxx.reg:
	Consistently use MAX_OFFSET for the user max syncrate
	set from non-volatile storage.  This ensures that the
	offset does not conflict with AHC_OFFSET_UNKNOWN.

	Change AHC_OFFSET_UNKNOWN to 0xFF.  This is
	a value that the curr->offset can never be,
	unlike '0' which we previously used.  This
	fixes code that only checks for a non-zero
	offset to determine if a sync negotiation
	is required since it will fire in the unknown
	case even if the goal is async.

	Change MAX_OFFSET to 0x7f which is the max
	offset U160 aic7xxx controllers can negotiate.
	This ensures that curr->offset will not
	match AHC_OFFSET_UNKNOWN.

aic7xxx_inline.h:
	Have our inline interrupt handler return with a value
	indicating whether we serviced a real interrupt.  This
	is required for Linux support.

	Return earlier if the interrupt is not for us.
2003-05-03 23:55:38 +00:00
gibbs
e4f9ea59a8 hc_eisa.c:
ahc_pci.c:
ahd_pci.c:
        Don't bogusly use the BUS_DMA_ALLOCNOW flag in our psuedo
        parent bus dma tag.
2003-05-03 23:27:57 +00:00
mux
37f577805d I deserve a big pointy hat for having missed all those references
to bus_dmasync_op_t in my last commit.
2003-04-10 23:50:06 +00:00
jake
041ad7b648 Compile with PAE. 2003-04-09 14:58:02 +00:00
jake
080f32d20e - Temporary fix so this compiles with 64 bit bus_addr_t.
Sponsored by:	DARPA, Network Associates Laboratories
Approved by:	scottl
2003-03-30 05:26:01 +00:00
scottl
61ec89edc4 aic79xx.reg:
Correct default precompensation value for RevA hardware.
2003-03-25 22:16:27 +00:00
gibbs
e2d9385c67 aic79xx.c:
Include read streaming in the PPR flags we display in diagnostics.

	In ahd_reset(), set the known mode after our initial pause prior to
	setting the mode. We can't just set the mode directly because the
	current mode, after the pause, is most likely unknown and setting the
	mode when the saved mode is unknown will trigger an assertion in
	the mode debug code.

	Complete an audit for SCB RAM reads.  These reads must be performed
	via the special ahd_in?_scbram() methods so we can perform a
	Rev A. PCI-X workaround.

	Remove a superfluous mode save operation that was performed just
	prior to a call to ahd_clear_critical_section().  The saved mode
	was never restored and wouldn't have been valid anyway since the
	mode could change while single stepping out of a critical section.

aic79xx.h:
	Add new BUG definition AHD_PCIX_SCBRAM_RD_BUG.

aic79xx_inline.h:
	Update ahd_inb_scbram routine to check for AHD_PCIX_SCBRAM_RD_BUG
	and only apply the workaround if this bug is active.  The old code
	applied the workaround in all cases.

aic79xx_pci.c:
	Set AHD_PCIX_SCBRAM_RD_BUG for the A4.

	Remove an attempted saved_modes call in ahd_pci_test_register_access().
	Saving the modes can only occur when we are paused, but the call was
	happening before the chip was known to be paused.  Restoring the
	modes doesn't make sense either since the code makes no assumptions
	about the state of the sequencer until the first time the mode is set
	by the driver.  This happens after the registers are successfully
	mapped.
2003-03-06 23:58:34 +00:00
gibbs
33a794e92a aic79xx.c:
Clear the LQICRC_NLQ status should it pop up after we have
	already handled the SCSIPERR.  During some streaming operations
	this status can be delayed until the stream ends.  Without this
	change, the driver would complain about a "Missing case in
	ahd_handle_scsiint".

	In the LQOBUSFREE handler...

		Don't return the LQOMGR back to the idle state until after
		we have cleaned up ENSELO and any status related to this
		selection.  The last thing we need is the LQO manager starting
		another select-out before we have updated the execution queue.
		It is not clear whether the LQOMGR would, or would not
		start a new selection early.

		Make sure ENSELO is off prior to clearing SELDO by flushing
		device writes.

		Move assignment of the next target SCB pointer inside of
		an if to make the code clearer.  The effect is the same.

	Dump card state in both "Unexpected PKT busfree" paths.

	In ahd_reset(), set the chip to SCSI mode before reading SXFRCTL1.
	That register only exists in the SCSI mode.  Also set the mode
	explicitly to the SCSI mode after chip reset due to paranoia.
	Re-arrange code so that SXFRCTL1 is restored as quickly after the
	chip reset as possible.

	S/G structurs must be 8byte aligned.  Make this official by saying
	so in our DMA tag.

	Disable CIO bus stretch on MDFFSTAT if SHVALID is about to come
	true.  This can cause a CIO bus lockup if a PCI or PCI-X error
	occurs while the stretch is occurring - the host cannot service
	the PCI-X error since the CIO bus is locked out and SHVALID will
	never resolve.  The stretch was added in the Rev B to simplify the
	wait for SHVALID to resolve, but the code to do this in the open
	source sequencer is so simple it was never removed.

	Consistently use MAX_OFFSET for the user max syncrate set from
	non-volatile storage.  This ensures that the offset does not
	conflict with AH?_OFFSET_UNKNOWN.

	Have ahd_pause_and_flushwork set the mode to ensure that it has
	access to the registers it checks.  Also modify the checking of
	intstat so that the check against 0xFF can actually succeed if
	the INT_PEND mask is something other than 0xFF.  Although there
	are no cardbus U320 controllers, this check may be needed to
	recover from a hot-plug PCI removal that occurs without informing
	the driver.

	Fix a typo.  sg_prefetch_cnt -> sg_prefetch_align.  This fixes
	an infinite loop at card initialization if the cacheline size is 0.

aic79xx.h:
	Add AHD_EARLY_REQ_BUG bug flag.

	Fix spelling errors.

	Include the CDB's length just after the CDB pointer in the DMA'ed
	CDB case.

	Change AH?_OFFSET_UNKNOWN to 0xFF.  This is a value that the
	curr->offset can never be, unlike '0' which we previously used.
	This fixes code that only checks for a non-zero offset to
	determine if a sync negotiation is required since it will fire
	in the unknown case even if the goal is async.

aic79xx.reg:
	Add comments for LQISTAT bits indicating their names in the 7902
	data book.  We use slightly different and more descriptive names
	in the firmware.

	Fix spelling errors.

	Include the CDB's length just after the CDB pointer in the DMA'ed
	CDB case.

aic79xx.seq:
	Update comments regarding rundown of the GSFIFO to reflect reality.

	Fix spelling errors.

	Since we use an 8byte address and 1 byte length, shorten the size
	of a block move for the legacy DMA'ed CDB case from 11 to 9 bytes.

	Remove code that, assuming the abort pending feature worked, would
	set MK_MESSAGE in the SCB's control byte on completion to catch
	invalid reselections.  Since we don't see interrupts for completed
	selections, this status update could occur prior to us noticing the
	SELDO.  The "select-out" queue logic will get confused by the
	MK_MESSAGE bit being set as this is used to catch packatized
	connections where we select-out with ATN.  Since the abort pending
	feature doesn't work on any released controllers yet, this code was
	never executed.

	Add support for the AHD_EARLY_REQ_BUG.  Don't ignore persistent REQ
	assertions just because they were asserted within the bus settle delay
	window.  This allows us to tolerate devices like the GEM318 that
	violate the SCSI spec.

	Remove unintentional settnig of SG_CACHE_AVAIL.  Writing this bit
	should have no effect, but who knows...

	On the Rev A, we must wait for HDMAENACK before loading additional
	segments to avoid clobbering the address of the first segment in
	the S/G FIFO.  This resolves data-corruption issues with certain
	IBM (now Hitachi) and Fujitsu U320 drives.

	Rearrange calc_residual to avoid an extra jmp instruction.

	On RevA Silicon, if the target returns us to data-out after we
	have already trained for data-out, it is possible for us to
	transition the free running clock to data-valid before the required
	100ns P1 setup time (8 P1 assertions in fast-160 mode).  This will
	only happen if this L-Q is a continuation of a data transfer for
	which we have already prefetched data into our FIFO (LQ/Data
	followed by LQ/Data for the same write transaction).  This can
	cause some target implementations to miss the first few data
	transfers on the bus.  We detect this situation by noticing that
	this is the first data transfer after an LQ (LQIWORKONLQ true),
	that the data transfer is a continuation of a transfer already
	setup in our FIFO (SAVEPTRS interrupt), and that the transaction
	is a write (DIRECTION set in DFCNTRL). The delay is performed by
	disabling SCSIEN until we see the first REQ from the target.

	Only compile in snapshot savepointers handler for RevA silicon
	where it is enabled.

	Handle the cfg4icmd packetized interrupt.  We just need to load
	the address and count, start the DMA, and CLRCHN once the transfer
	is complete.

	Fix an oversight in the overrun handler for packetized status
	operations.  We need to wait for either CTXTDONE or an overrun
	when checking for an overrun.  The previous code did not wait
	and thus could decide that no overrun had occurred even though
	an overrun will occur on the next data-valid req.  Add some
	comment to this section for clarity.

	Use LAST_SEG_DONE instead of LASTSDONE for testing transfer
	completion in the packetized status case.  LASTSDONE may come up
	more quickly since it only records completion on the SCSI side,
	but since LAST_SEG_DONE is used everywhere else (and needs to be),
	this is less confusing.

	Add a missing invalidation of the longjmp address in the non-pack
	handler.  This code needs additional review.

aic79xx_inline.h:
	Fix spelling error.

aic79xx_osm.c:
	Set the cdb length for CDBs dma'ed from host memory.

	Add a comment indicating that, should CAM start supporting cdbs
	larger than 16bytes, the driver could store the CDB in the status
	buffer.

aic79xx_pci.c:
	Add a table entry for the 39320A.

	Added a missing comma to an error string table.

	Fix spelling errors.
2003-02-27 23:23:16 +00:00
gibbs
fab9d2fa44 Revert AHD_TIMER_MAX_US to its original definition now that the
ahc and ahd modules have correct dependencies on the assembler.
2003-01-22 22:00:07 +00:00
phk
d83be09159 Bandaid to make the kernel compile until the scsi-crew can find out what
is happening.
2003-01-21 10:31:43 +00:00
gibbs
013247cd19 Fix a missed goal.period -> goal.offset change. In
this case, the bug resulted in comparing a period
against an offset.
2003-01-20 23:51:18 +00:00
gibbs
e7aa337746 aic7xxx.reg:
Add a constant for the controller's stack size and the
	maximum scsi offset.

aic7xxx.seq:
	Style nit.  The source is implied to be the destination
	unless overridden in an "and" instruction.

	Update target mode code for changes in identify seen
	sequencer flags.

aic7xxx_pci.c:
	Ensure that the PCIERRGENDIS bit is set in the
	PCIERRGEN config space register.  Perhaps this
	is a reason for the spurios parity errors reported
	on U160 controllers.

	Honor the AHC_NO_BIOS_INIT flag.

	Allow PCI interrupt reporting to be disabled,
	by clearing the PERRRESEN bit in the command
	register.  This option is now enabled via a new
	softc flag: AHC_DISABLE_PCI_PERR.

	Disable SERR and pause the controller prior to performing
	our mmapped I/O test.  This should handle the case of
	controllers that do not "auto-access pause".  For legacy
	controllers, use SCB ram instead of scratch ram since
	the latter may contain settings left over from the BIOS
	that we will use if an seeprom is not found.

	Make use of new ahc_inl/outl() inlines.

aic7xxx.h:
	Reformat a few comments to follow driver style.

	Add a controller flags that indicate that a controller
	has not been initialized by the BIOS and whether to
	disable PCI parity errors..

	Remove stack probing softc members.

	Add a few more syncrate constants that are useful in speed
	fallback calculations.

	Add the SHOW_MASKED_ERRORS debug flag.

aic7xxx.h:
aic7xxx.c:
	Implement the SCB_SILENT flag.  This is useful for
	hushing up the driver during DV or other operations
	that we expect to cause transmission errors.  The
	messages will still print if the SHOW_MASKED_ERRORS
	debug option is enabled.

aic7xxx_inline.h:
	Implement ahc_[in|out][w|l|q].  This removes the need
	for manual 'or and shift" type operations throughout
	the driver.

aic7xxx.c:
	Move SELTO dignostic so that the SCB is still valid
	when we use it for printing path information.

	If we are narrow, limit syncrate to Ultra2.

	Don't clobber ppr_options when forcing a renegotiation.
	The current ppr_options may be referenced while queuing
	new commands.  Don't set our width to unknown when forcing
	negotiation on narrow controllers.  This will confuse the
	negotiation code into negotiating with a wide message on
	narrow controllers.

	Add an "asserting atn" diagnostic with controller/target
	information.

	Remove the probe_stack code.  The stack is always
	4 deep on legacy controllers, so probing is pointless.
	This also avoids an issue where probing the stack would
	upset the aic7770.

	In ahc_reset(), record whether or not we found the
	controller in a reset state.  If the controller was
	already reset, assume that no BIOS has initialized
	the controller and ignore left over scratch ram
	settings.

	Fix an ifdef bug that caused sequencer debugging to
	be enabled always.

	Clear the ultraenb flag in our tstate during startup.
	The ultraenbled'ness of a device is recorded in the user
	transfer settings.  tstate->ultraenb bitmask indicates
	which devices we have negotiated an ultra speed with.
	Just after initialization, we are async.  Setting the
	ultraenb flag while async seems to be harmless, but it
	was confusing to see the ULTRAENB flag set in the SCB.

	Enhance residual diagnostic to indicate if the residual
	if for sense information or normal data transfers.

	Indicate the features, bugs, and flags set in the softc
	that are used to control firmware patch download when
	booting verbose.

	In ahc_dump_card_state() fix a logic reversal.  The
	SCSIPHASE register only exists on U160 controllers.
	The SCSISIGI register exists on all controllers.  Not
	the other way around.  Also print out the ERROR register.

	Allow ahc_dump_card_state() to be called when the sequencer
	is not paused.  Add dump card state markers as in the U320
	driver.
2003-01-20 20:44:55 +00:00
gibbs
a516e1442e aic79xx.c:
Implement the SCB_SILENT flag.  This is useful for
	hushing up the driver during DV or other operations
	that we expect to cause transmission errors.  The
	messages will still print if the SHOW_MASKED_ERRORS
	debug option is enabled.

	Save and restore the NEGOADDR address when setting
	new transfer settings.  The sequencer performs lookups
	in the negotiation table too and it expects NEGOADDR
	to remain consistent across pause/unpause sessions.

	Consistently use "offset" instead of "period" to determine
	if we are running sync or not.

	Add a SHOW_MESSAGES diagnostic for when we assert ATN
	during message processing.

	Print out IU, QAS, and RTI features when showing transfer options.

	Limit the syncrate after all option conformance
	changes have taken place in ahd_devlimited_syncrate.
	Changes in options may change the final syncrate we
	accept.

	Keep a copy of the hs_mailbox in our softc so that
	we can perform read/modify/write operations on the
	hs_mailbox without having to pause the sequencer to
	read the last written value.  Use the ENINT_COALESS
	flag in the hs_mailbox to toggle interrupt coalessing.

	Add entrypoints for enabling interrupt coalessing and
	setting both a timeout (how long to wait for commands
	to be coalessed) and a maximum commands to coaless value.
	Add a statistics timer that decides when to enable or
	disable interrupt coalessing based on load.

	Add a routine, ahd_reset_cmds_pending() which is used
	to update the CMDS_PENDING sequencer variable whenever
	error recovery compeltes SCBs without notifying the
	sequencer.  Since ahd_reset_cmds_pending is called
	during ahd_unpause() only if we've aborted SCBs, its
	call to ahd_flush_qoutfifo should not cause recursion
	through ahd_run_qoutfifo().  A panic has been added to
	ensure that this recursion does not occur.

	In ahd_search_qinfifo, update the CMDS_PENDING sequencer
	variable directly.  ahd_search_qinififo can be called
	in situations where using ahd_reset_cmds_pending() might
	cause recursion.  Since we can safely determine the
	exact number to reduce CMDS_PENDING by in this scenario
	without running the qoutfifo, the manual update is sufficient.

	Clean up diagnostics.
	Add ahd_flush_qoutfifo() which will run the qoutfifo
	as well as complete any commands sitting on the
	sequencer's COMPLETE_SCB lists or the good status FIFO.
	Use this routine in several places that did similar
	things in an add-hoc, but incomplete, fashion.  A call
	to this routine was also added to ahd_abort_scbs() to
	close a race.

	In ahd_pause_and_flushwork() only return once selections
	are safely disabled.  Flush all completed commands via
	ahd_flush_qoutfifo().

	Remove "Now packetized" diagnostic now that this
	information is incorperated into the actual negotiation
	messages that are displayed.

	When forcing renegotiation, don't clober the current
	ppr_options.  Much of the driver uses this information
	to determine if we are currently packetized or not.

	Remove some stray spaces at column 1 in ahd_set_tags.

	When complaining about getting a host message loop
	request with no pending messages, print out the
	SCB_CONTROL register down on the card.

	Modify the ahd_sent_msg() routine to handle a search
	for an outgoing identify message.  Use this to detect
	a msg reject on an identify message which typically
	indicates that the target thought we were packetized.
	Force a renegotiation in this case.

	In ahd_search_qinfifo(), wait more effectively for SCB
	DMA activities to cease.  We also disable SCB fetch
	operations since we are about to change the qinfifo
	and any fetch in progress will likely be invalidated.

	In ahd_qinfifo_count(), fix the qinfifo empty case.

	In ahd_dump_card_state(), print out CCSCBCTL in the
	correct mode.

	If we are a narrow controller, don't set the current
	width to unknown when forcing a future negotiation.
	This just confuses the code into attempting a wide
	negotiation on a narrow bus.

	Add support for task management function completions.

	Modify ahd_handle_devreset so that it can handle
	lun resets in addition to target resets.  Use
	ahd_handle_devreset for lun and target reset task
	management functions.

	Handle the abort task TMF race case better.  We now
	wait until any current selections are over and then
	set the TMF back to zero.  This should cause the sequencer
	to ignore the abort TMF completion should it occur.

	Correct a bug in the illegal phase handler that
	caused us to drop down to narrow when handling the
	unexpected command phase case after 3rd party
	reset of a packetized device.

	Indicate the features, bugs, and flags set in the softc
	that are used to control firmware patch download when
        booting verbose.

aic79xx.h:
	Add coalessing and HS_MAILBOX fields.

	Add per-softc variables for the stats "daemon".

	Add a debug option for interrupt coalessing activities.

	Add two new softc flags:
	o AHD_UPDATE_PEND_CMDS
	  Run ahd_reset_cmds_pending() on the next unpause.

	o AHD_RUNNING_QOUTFIFO
	  Used to catch recursion through ahd_run_qoutfifo().

aic79xx.reg:
	Correct register addresses related to the software timer
	and the DFDBCTL register.

	Add constants paramaterizing the software timer.

	Add scratch ram locations for storing interrupt coalessing
	tunables.

	Break INTMASK in SEQITNCTL out into INTMASK1 and INTMASK2.
	In at least the REV A, these are writable bits.  We make
	use of that for a swtimer workaround in the sequencer.

	Since HS_MAILBOX autoclears, provide a sequencer variable
	to store its contents.

	Add SEQINT codes for handling task management completions.

aic79xx.seq:
	Correct ignore wide residue processing check for
	a wide negotiation being in effect.  We must be
	in the SCSI register window in order to access the
	negotiation table.

	Use the software timer and a commands completed count to
	implement interrupt coalessing.  The command complete is
	deferred until either the maximum command threshold or a
	the expiration of a command deferral timer.  If we have
	more SCBs to complete to the host (sitting in COMPLETE_SCB
	lists), always try to coaless them up to our coalessing limit.
	If coalessing is enabled, but we have fewer commands oustanting
	than the host's min coalessing limit, complete the command
	immediately.

	Add code to track the number of commands outstanding.
	Commands are outstanding from the time they are placed
	into the execution queue until the DMA to post completion
	is setup.

	Add a workaround for intvec_2 interrupts on the H2A4.
	In H2A4, the mode pointer is not saved for intvec2, but
	is restored on iret.  This can lead to the restoration
	of a bogus mode ptr.  Manually clear the intmask bits and
	do a normal return to compensate.  We use intvec_2 to
	track interrupt coalessing timeouts.

	Since we cannot disable the swtimer's countdown, simply
	mask its interrupt once we no longer care about it firing.

	In idle_loop_cchan, update LOCAL_HS_MAILBOX everytime
	we are notified of an HS_MAILBOX update via the
	HS_MAILBOX_ACT bit in QOFF_CTLSTA.  We have to use a
	local copy of persistant portions of the HS_MAILBOX as
	the mailbox auto-clears on any read.

	Move the test for the cfg4istat interrupt up an instruction
	to hopefully close a race between the next outgoing selection
	and our disabling of selections.

	Add a missing ret to the last instruction in load_overrun_buf.

	Add notifications to the host of task management
	completions as well as the completions for commands
	that completed successfully before their corresponding
	TMF could be sent.

	Hold a critical section during select-out processing
	until we have a fully identified connection.  This
	removes a race condition with the legacy abort handler.

	Correct a few spelling errors in some comments.

aic79xx_inline.h:
	Call ahd_reset_cmds_pending() in ahd_unpause if required.

	Update cmdcmplt interrupt statistics in our interrupt
	handler.

	Allow callers to ahd_send_scb() to set the task management
	function.

aic79xx_pci.c:
	Disable SERR and pause the controller prior to performing
	our mmapped I/O test.  The U320 controllers do not support
	"auto-access-pause".

aic79xx_osm.c:
	Set the task management function now that
	ahd_send_scb() doesn't do it for us.  We
	also perform a lun reset in response to BDR
	requests to packetized devices.
2003-01-20 20:17:35 +00:00
gibbs
851c77f4f5 Allow constants to be complex expressions so long as those
expressions can be fully evaluated during assembly.

Remove the numerical_value portion of the grammer which is
no longer referenced.
2003-01-20 18:02:11 +00:00
gibbs
6726f48157 Fix the last reference to the reg_print.c file handle
in symtable_dump.  This allows the assembler to operate
without generating this file.
2003-01-20 18:01:37 +00:00
scottl
606eb48206 Convert the use of MAXBSIZE in the dma tag to more appropriate values.
Use BUS_SPACE_MAXSIZE_32BIT for the parent dma tags, and
(NSEGS - 1) * PAGE_SIZE for the data buffer tags.  FreeBSD/sparc64 is
more strict about checking these values that other arches.
2002-12-31 04:22:36 +00:00