Commit Graph

104 Commits

Author SHA1 Message Date
Warner Losh
f894f17244 Fix URL for powerpc cpu options. Remove reference to ia64 options as
no longer relevant.
2015-11-14 06:18:50 +00:00
Warner Losh
e0874a7ea6 After consultations with the arm community, don't define softfp for
armv6. It's too ambiguous. We do use the softfp ABI for the moment on
armv6, but we allow floating point register use (and the compilers
will generate it). This is too ambiguous to use it as a decider for
which algorithms to use on the platform. Err on the side of caution
and not define it.

Submitted by: ian@
Reviewed by: andrew@
2015-08-26 17:10:43 +00:00
Warner Losh
1cdb618269 Add softfp to MACHINE_CPU more often when we're compiling for soft
float targets. It is added for booke on powerpc and all arm with hf in
the string. Also add arm to all arm builds and armv6 to armv6 and
newer builds.

PR: 202641
2015-08-25 17:11:49 +00:00
Warner Losh
d1f6fa8f71 We need to add the soft float to the CFLAGS always, not just when
NO_CPUCFLAGS is not defined since it is part of the ABI as we've
defined it, not just a nice optimization.
2015-08-24 00:03:51 +00:00
Eric van Gyzen
ddab052725 Disable SSE in libthr
Clang emits SSE instructions on amd64 in the common path of
pthread_mutex_unlock.  If the thread does not otherwise use SSE,
this usage incurs a context-switch of the FPU/SSE state, which
reduces the performance of multiple real-world applications by a
non-trivial amount (3-5% in one application).

Instead of this change, I experimented with eagerly switching the
FPU state at context-switch time.  This did not help.  Most of the
cost seems to be in the read/write of memory--as kib@ stated--and
not in the #NM handling.  I tested on machines with and without
XSAVEOPT.

One counter-argument to this change is that most applications already
use SIMD, and the number of applications and amount of SIMD usage
are only increasing.  This is absolutely true.  I agree that--in
general and in principle--this change is in the wrong direction.
However, there are applications that do not use enough SSE to offset
the extra context-switch cost.  SSE does not provide a clear benefit
in the current libthr code with the current compiler, but it does
provide a clear loss in some cases.  Therefore, disabling SSE in
libthr is a non-loss for most, and a gain for some.

I refrained from disabling SSE in libc--as was suggested--because
I can't make the above argument for libc.  It provides a wide variety
of code; each case should be analyzed separately.

https://lists.freebsd.org/pipermail/freebsd-current/2015-March/055193.html

Suggestions from:	dim, jmg, rpaulo
Approved by:	kib (mentor)
MFC after:	2 weeks
Sponsored by:	Dell Inc.
2015-08-05 12:53:55 +00:00
Andrew Turner
5607ec2379 Set MACHINE_CPU to arm64 when building for arm64. This is needed by the
ports tree as they check this value in a number of ports.

PR:		201259
Sponsored by:	ABT Systems Ltd
2015-07-02 13:42:57 +00:00
Andrew Turner
61b9bd2303 Sort the cpu architectures by name rather than a combination of
alphabetical order and appending new architectures to the end of the list.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2015-06-25 16:47:11 +00:00
Jung-uk Kim
25fd8105c9 Catch up with Clang 3.6.0. 2015-03-17 05:48:45 +00:00
Ian Lepore
1d2c1366bf For armv6 builds, add -mfloat-abi=softfp. This tells the compiler it can
use floating point hardware instructions (because all armv6/7 systems we
support have fp hardware), but it passes args using a soft-float compatible
ABI.  This should give noticible performance improvement (but not as much
as using the armv6hf arch).
2015-01-19 04:56:17 +00:00
Andrew Turner
a103277891 Set the correct architecture when targeting ARMv7
MFC after:	1 Week
Sponsored by:	ABT Systems Ltd
2014-12-01 21:07:36 +00:00
Ian Lepore
cc55c7c78f Support CXXFLAGS.${MACHINE_ARCH} as well as CFLAGS. This allows different
C++ options for toolchain versus target when cross-building.
2014-07-08 14:37:01 +00:00
Marcel Moolenaar
e7d939bda2 Remove ia64.
This includes:
o   All directories named *ia64*
o   All files named *ia64*
o   All ia64-specific code guarded by __ia64__
o   All ia64-specific makefile logic
o   Mention of ia64 in comments and documentation

This excludes:
o   Everything under contrib/
o   Everything under crypto/
o   sys/xen/interface
o   sys/sys/elf_common.h

Discussed at: BSDcan
2014-07-07 00:27:09 +00:00
Jung-uk Kim
6619822598 Add new CPUTYPEs supported by Clang 3.4, i.e., AMD Steamroller (bdver3) and
Intel Silvermont (slm) processors.
2014-03-20 19:17:46 +00:00
Ian Lepore
44653522f6 Add a way to apply CFLAGS only when building the given architecture. This
is useful primarily on a system used for cross-building, when you have a
set of flags to apply to the TARGET_ARCH being cross-built but don't want
those settings applied to building the cross-tools or other components that
run on the build host machine.
2014-03-19 18:54:53 +00:00
Jung-uk Kim
cd0e2d2a92 Add a new CPUTYPE supported by Clang 3.3 for AMD Jaguar processors (btver2). 2013-06-13 18:26:12 +00:00
Olivier Houchard
755147dd88 Nuke ARM_WANT_TP_ADDRESS, it's not used anymore.
Don't force -march=armv6 for Cortex A, as we want at least armv6k. The
compiler default is good enough.
2013-01-07 23:41:14 +00:00
Jung-uk Kim
cea10e1d3b Fix typos in the previous commit. 2012-12-04 00:44:31 +00:00
Jung-uk Kim
08e90c1491 Tidy up bsd.cpu.mk for X86 CPUs:
- Do not limit recent processors to "prescott" class for i386 target.  There
is no reason for this hack because clang is default now.  On top of that, it
will only grow indefinitely over time.
- Add more CPUTYPEs, i.e., "athlon-fx", "core-avx2", "atom", "penryn", and
"yonah".  Note "penryn" and "yonah" are intentionally undocumented because
they are not supported by gcc and marked deprecated by clang.
- Add more CPUTYPE aliases, i.e., "barcelona" (-> amdfam10), "westmere" and
"nehalem" (-> corei7).  Note these are intentionally undocumented because
they are not supported by (base) gcc and/or clang.  However, LLVM (backend)
seems to "know" the differences.  Most likely, they were deprecated with
other vendor code names and clang did not bother implementing them at all.
- Add i686 to MACHINE_CPU for "c3-2" (VIA Nehemiah).  Both gcc & clang treat
it like an i686-class processor.
- Add IDT "winchip2" and "winchip-c6" for completeness (undocumented).
- Order processors per make.conf example, i.e., CPU vendors and models.
- Tidy up make.conf example, i.e., remove "by gcc" (because we have aliases)
and remove "prescott" from AMD64 architecture (because it is not correct).
2012-12-04 00:37:17 +00:00
Jung-uk Kim
04704c638e Remove fictitious support for 80386-class CPUs from bsd.cpu.mk and make(1).
It was removed from head more than 8 years ago (see r137784 and r137785).

Reviewed by:	imp, delphij, dim
2012-12-03 19:27:31 +00:00
Jung-uk Kim
49f4a268d5 Add x86 CPUs supported by clang on head.
Reviewed by:	arch (silence)
X-MFC:		r242624
2012-11-19 21:58:14 +00:00
Oleksandr Tymoshenko
4da573d910 Merging of projects/armv6, part 3
r238211:
Support TARGET_ARCH=armv6 and TARGET_ARCH=armv6eb

This adds a new TARGET_ARCH for building on ARM
processors that support the ARMv6K multiprocessor
extensions.  In particular, these processors have
better support for TLS and mutex operations.

This mostly touches a lot of Makefiles to extend
existing patterns for inferring CPUARCH from ARCH.
It also configures:
 * GCC to default to arm1176jz-s
 * GCC to predefine __FreeBSD_ARCH_armv6__
 * gas to default to ARM_ARCH_V6K
 * uname -p to return 'armv6'
 * make so that MACHINE_ARCH defaults to 'armv6'
It also changes a number of headers to use
the compiler __ARM_ARCH_XXX__ macros to configure
processor-specific support routines.

Submitted by:	Tim Kientzle <kientzle@freebsd.org>
2012-08-15 03:21:56 +00:00
Dimitry Andric
58ff0f42ba Remove support for the Intel C Compiler from the build infrastructure.
This support has not worked for several years, and is not likely to work
again, unless Intel decides to release a native FreeBSD version of their
compiler. ;)
2011-04-19 18:09:21 +00:00
Martin Matuska
432edffe38 Add ssse3 capability for CPUTYPE=core2 to MACHINE_CPU in bsd.cpu.mk
MFC after:	2 weeks
2011-03-14 13:36:51 +00:00
Martin Matuska
d93806e2f1 Add AMD Geode CPU type to bsd.cpu.mk and examples/etc/make.conf
For CPUTYPE=core2 use -march=core2

PR:		gnu/155308
MFC after:	2 weeks
2011-03-07 14:58:23 +00:00
Martin Matuska
c42ed003e9 Add opteron-sse3, athlon64-sse3 and k8-sse3 cpu types to bsd.cpu.mk.
- add "sse3" to MACHINE_CPU for the new cpu types
- for i386, default to CPUTYPE=prescott for the new cpu types

PR:		gnu/154906
Discussed with:	kib, kan, dim
MFC after:	2 weeks
2011-02-20 22:32:21 +00:00
Marius Strobl
aab88d9da4 - Add CPUTYPE support for sparc64. The net result is that it's now possible
to let the compiler optimize for the famility of UltraSPARC-III CPUs as the
  default already was to optimize for UltraSPARC-I/II and generating generic
  64-bit V9 is mainly for reference purposes. At least for SPARC64-V CPUs
  code optimized for UltraSPARC-I/II still is the most performant one.
  Thanks go to Michael Moll for testing SPARC64-V.
- Move a booke MACHINE_CPU bit into the right section.
2010-12-30 15:58:23 +00:00
Warner Losh
f7ff90d7d2 This case is actually powerpc specific, and doesn't apply to powerpc64.
Submitted by:	nathanw@
2010-11-14 01:37:08 +00:00
Warner Losh
e8dce5b9b3 Complete the integration of tbemd branch into head.
TARGET_BIG_ENDIAN is now completely dead, except where it was
originally supposed to be used (internally in the toolchain building).

TARGET_ARCH has changed in three cases:
(1) Little endian mips has changed to mipsel.
(2) Big endian mips has changed to mipseb.
(3) Big endian arm has changed to armeb.

Some additional changes are needed to make 'make universe' work on arm
and mips after this change, so those are commented out for now.

UPDATING information will be forthcoming.  Any remaining rough edges
will be hammered out in -current.
2010-11-10 06:39:49 +00:00
Warner Losh
3c7f49dcf2 Prefer MACHINE_CPUARCH to MACHINE_ARCH unless there's a good reason... 2010-09-13 07:22:14 +00:00
Warner Losh
9bc38a3ba2 Now that we default to the proper endian, we don't need these for mips 2010-08-28 21:06:13 +00:00
Nathan Whitehorn
13109bdf8d Minor modifications to know what to do with powerpc64. 2010-07-10 02:32:50 +00:00
Xin LI
611049ae75 When CPUTYPE is defined to any value, on amd64 platform "mmx" is
available through MACHINE_CPU, indicating the CPU supports that
feature, as done by revision 138685.

This changeset adds "mmx" into the default amd64 MACHINE_CPU list
when no CPUTYPE is specified to provide consistent behavior.

PR:		amd64/145593
Submitted by:	mm
MFC after:	2 weeks
2010-04-21 01:13:08 +00:00
Warner Losh
1e818404a3 -mabi-calls and -msoft-float aren't needed either
Submitted by:	jmallet@
2010-03-02 07:44:38 +00:00
Warner Losh
ab6b8778d7 -mno-dsp hasn't been required for a while now. 2010-03-02 07:24:47 +00:00
Neel Natu
6f3c632700 Kernel module support for mips.
Reviewed by: gonzo

Tested by: Alexandr Rybalko (ray@dlink.ua)
2010-02-18 05:49:52 +00:00
Nathan Whitehorn
1c96bdd146 Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by:    grehan
2009-04-04 00:22:44 +00:00
Nathan Whitehorn
5b4975b180 Explicitly disable generation of Altivec instructions in the kernel on PowerPC,
and add support to allow users to set their CPUTYPE in make.conf.
2009-02-22 18:45:30 +00:00
Alex Dupre
172b9da045 Fix links to online gcc docs.
Reported by:	Andre Guibert de Bruet <andy@siliconlandmark.com>
MFC after:	1 day
2008-06-25 06:07:03 +00:00
Warner Losh
88f25023dc Add support for MACHINE_ARCH == mips, plus a few generic CPU types that
will be supported in the forth coming FreeBSD/mips port.
2008-03-19 12:20:44 +00:00
Rafal Jaworowski
321578e3d0 Connect MPC85XX to the PowerPC build.
The kernel config file is KERNCONF=MPC85XX, so the usual procedure applies:

1. make buildworld TARGET_ARCH=powerpc
2. make buildkernel TARGET_ARCH=powerpc TARGET_CPUTYPE=e500 KERNCONF=MPC85XX

This default config uses kernel-level FPU emulation. For the soft-float world
approach:

1. make buildworld TARGET_ARCH=powerpc TARGET_CPUTYPE=e500
2. disable FPU_EMU option in sys/powerpc/conf/MPC85XX
3. make buildkernel TARGET_ARCH=powerpc TARGET_CPUTYPE=e500 KERNCONF=MPC85XX

Approved by:	cognet (mentor)
MFp4:		e500
2008-03-03 20:40:20 +00:00
John Baldwin
10250ddd27 Add a 'c7' CPUTYPE for VIA C7 CPUs that is 'c3-2' with the addition of
i686, sse2, and sse3.

MFC after:	1 week
2008-02-29 19:20:05 +00:00
Olivier Houchard
4251babd0a Backout rev 1.62, and revert to use -march=armv5te -D__XSCALE__ instead
of -mcpu=xscale for XScale.
gcc still has issues with -mcpu=xscale, and now crashes while building
systat.

Reported by:	sam
MFC After:	3 days
2007-10-16 18:32:37 +00:00
Olivier Houchard
ecf7ac028b GCC doesn't segfault anymore while building world with -mcpu=xscale, so use it. 2007-05-21 08:39:44 +00:00
Dag-Erling Smørgrav
ba518d666a "If I only had a brain..."
MFC after:	 3 weeks
2007-01-17 14:54:53 +00:00
Dag-Erling Smørgrav
5e0d38b538 Correct errors in previous commit. I didn't realize that ${CPUTYPE} is
passed unmodified to gcc.  Therefore, "prescott" should be used for Prescott,
Nocona, Core and Core 2 CPUs when building 32-bit code, and "nocona" should
be used for Prescott, Nocona and Core 2 CPUs when building 64-bit code.

MFC after:	3 weeks
2007-01-17 14:49:13 +00:00
Dag-Erling Smørgrav
3f15422a91 On i386, make "prescott" an alias for "nocona" (instead of the other way
around), and introduce "core", along with the alias "core2".  All of these
enable SSE3.

On amd64, add "core2" (enables SSE3).

MFC after:	3 weeks
2007-01-17 12:43:06 +00:00
Olivier Houchard
9a082df5b8 Use TARGET_BIG_ENDIAN instead of ARM_BIG_ENDIAN 2006-10-19 22:51:26 +00:00
Ruslan Ermilov
2b46c64c9c Remove alpha left-overs. 2006-08-22 08:03:01 +00:00
Dag-Erling Smørgrav
26e03c2f92 Revert previous commit. Pre-Nehemiah C3 CPUs do have 3DNow!; it doesn't
show up in dmesg because identcpu.c only looks for it on Intel and AMD
processors.
2006-08-13 08:47:41 +00:00
Dag-Erling Smørgrav
75b7c4a871 I don't know where I got the idea that the VIA C3 has 3DNow!; it doesn't.
It does have MMX (though MMX support is reputed to be incomplete in early
generations), and later generations have SSE.

MFC after:	2 weeks
2006-08-12 09:46:43 +00:00