Commit Graph

97 Commits

Author SHA1 Message Date
luoqi
af7e9be5cc Enable vmspace sharing on SMP. Major changes are,
- %fs register is added to trapframe and saved/restored upon kernel entry/exit.
- Per-cpu pages are no longer mapped at the same virtual address.
- Each cpu now has a separate gdt selector table. A new segment selector
  is added to point to per-cpu pages, per-cpu global variables are now
  accessed through this new selector (%fs). The selectors in gdt table are
  rearranged for cache line optimization.
- fask_vfork is now on as default for both UP and SMP.
- Some aio code cleanup.

Reviewed by:	Alan Cox	<alc@cs.rice.edu>
		John Dyson	<dyson@iquest.net>
		Julian Elischer	<julian@whistel.com>
		Bruce Evans	<bde@zeta.org.au>
		David Greenman	<dg@root.com>
1999-04-28 01:04:33 +00:00
tegge
8f4b15eccc Backout early start of APs since it caused some machines to hang. 1999-04-13 03:24:47 +00:00
tegge
b149849b9f Add prototype for wait_ap(). 1999-04-11 00:43:43 +00:00
tegge
7b3fdbf486 Let BSP wait until all APs are initialized. 1999-04-10 22:58:29 +00:00
peter
2680ced170 Disable the mtrr copy calls, it doesn't work with the i686_mem.c stuff.
This should make it compile/link again.
1999-04-07 17:08:40 +00:00
bde
79ceaf95c2 The magic "no-cpu" cpu number is 0xff. Don't misrepresent cpu
numbers as chars or use bogus casts in an attempt to unmisrepresnt
them.  In top, don't assume that 0xff is the only negative cpu
number when cpu numbers are (mis)represented.
1999-03-05 16:38:13 +00:00
tegge
21bcdb8f70 Don't call assign_apic_irq with a value for irq that is out of range. 1999-02-26 03:42:50 +00:00
luoqi
bc93c63b6f Introduce machine-dependent macro pgtok() to convert page count to number
of kilobytes. Its definition for each architecture could be optimized to
avoid potential numerical overflows.
1999-02-19 19:34:49 +00:00
luoqi
082d37c1ac Hide access to vmspace:vm_pmap with inline function vmspace_pmap(). This
is the preparation step for moving pmap storage out of vmspace proper.

Reviewed by:	Alan Cox	<alc@cs.rice.edu>
		Matthew Dillion	<dillon@apollo.backplane.com>
1999-02-19 14:25:37 +00:00
dillon
9328688fc8 Fix warnings in preparation for adding -Wall -Wcast-qual to the
kernel compile
1999-01-28 01:59:53 +00:00
jkh
32fdb77df9 Make more messages conditional on bootverbose 1999-01-20 04:24:22 +00:00
eivind
cbd074fa1f Silence warnings. 1999-01-12 00:19:33 +00:00
archie
60d13c7a9d The "easy" fixes for compiling the kernel -Wunused: remove unreferenced static
and local variables, goto labels, and functions declared but not defined.
1998-12-07 21:58:50 +00:00
tegge
930e900772 Attempt to handle interrupts delivered to all IO APICs by using the first
IO APIC with a sufficient number of pins.
1998-11-26 23:14:23 +00:00
eivind
3cf3a6389e Staticize. 1998-11-26 18:50:24 +00:00
kato
c97299bfbe mp_machdep.c: Set a vector to boot code (PC-98).
locore.s: Tell the bios to warmboot next time (PC-98).
1998-10-10 13:37:16 +00:00
kato
e677608687 PC-98 doesn't have CMOS ram. 1998-10-10 09:38:02 +00:00
kato
29d7df02f8 BIOS ROM base address is 0xe8000 on PC-98. 1998-10-08 16:15:22 +00:00
tegge
857a03a573 Maintain a mapping from irq number to (ioapic number, int pin) tuple,
and use this when masking/unmasking interrupts.

Maintain a mapping from (iopaic number, int pin) tuple to irq number,
and use this when configuring devices and programming the ioapics.

Previous code assumed that irq number was equal to int pin number, and
that the ioapic number was 0.

Don't let an AP enter _cpu_switch before all local apics are initialized.
1998-09-06 22:41:42 +00:00
bde
f45ec22006 Fixed printf format errors. Only one left in LINT on i386's. 1998-08-24 02:28:16 +00:00
msmith
95c3baa7ee Presently there is only one `currentldt' variable for all cpus
in a SMP system. Unexpected things could happen if each cpu
        has a different ldt setting and one cpu tries to use value
        of currentldt set by another cpu.

        The fix is to move currentldt to the per-cpu area. It includes
        patches I filed in PR i386/6219 which are also user ldt related.

PR:		i386/7591, i386/6219
Submitted by:	Luoqi Chen <luoqi@watermarkgroup.com>
1998-08-18 07:47:12 +00:00
bde
9fa8a2d794 pmap.c:
Cast pointers to (vm_offset_t) instead of to (u_long) (as before) or to
(uintptr_t)(void *) (as would be more correct).  Don't cast vm_offset_t's
to (u_long) just to do arithmetic on them.

mp_machdep.c:
Cast pointers to (uintptr_t) instead of to (u_long).  Don't forget
to cast pointers to (void *) first or to recover from integral
possible integral promotions, although this is too much work for
machine-dependent code.

vm code generally avoids warnings for pointer vs long size mismatches
by using vm_offset_t to represent pointers; pmap.c often uses plain
`unsigned int' instead of vm_offset_t and didn't use u_long elsewhere,
but this style was messed up by code apparently imported from mp_machdep.c.
1998-08-16 00:41:40 +00:00
tegge
4347025be3 Add forwarding of roundrobin to other cpus. This gives a more regular
update of cpu usage as shown by top when one process is cpu bound
(no system calls) while the system is otherwise idle (except for top).

Don't attempt to switch to the BSP in boot().  If the system was idle when
an interrupt caused a panic, this won't work.  Instead, switch to the BSP
in cpu_reset.

Remove some spurious forward_statclock/forward_hardclock warnings.
1998-05-17 22:12:14 +00:00
tegge
0b804fd802 For SMP, use prv_PPAGE1/prv_PMAP1 instead of PADDR1/PMAP1.
get_ptbase and pmap_pte_quick no longer generates IPIs.
This should reduce the number of IPIs during heavy paging.
1998-05-17 18:53:19 +00:00
dyson
fac78afe5c Attempt to set write combining mode for graphics devices. 1998-05-11 01:06:08 +00:00
peter
32a92c71b6 Use real types for the SMP pages being allocated rather than arrays of
ints.  Remove some no longer needed casts.  Initialize the per-cpu
global data area using the structs rather than knowing too much about
layout, alignment, etc.
1998-04-06 15:48:30 +00:00
phk
3c122bd961 Make a kernel version of the timer* functions called timerval* to be
more consistent.

OK'ed by:	bde
1998-04-06 08:26:08 +00:00
tegge
028480bfb1 Add two workarounds for broken MP tables:
- Attempt to handle PCI devices where the interrupt is
	  an ISA/EISA interrupt according to the mp table.

	- Attempt to handle multiple IO APIC pins connected to
	  the same PCI or ISA/EISA interrupt source.  Print a
	  warning if this happens, since performance is suboptimal.
	  This workaround is only used for PCI devices.

With these two workarounds, the -SMP kernel is capable of running on
my Asus P/I-P65UP5 motherboard when version 1.4 of the MP table is disabled.
1998-04-01 21:07:37 +00:00
tegge
8644d41f2d The APs now reload the interrupt descriptor table pointer after
f00f_hack has run.

Use the global r_idt descriptor in f00f_hack when in SMP mode,
so the APs find the relocated interrupt descriptor table.

Submitted by:	Partially from David A Adkins <adkin003@tc.umn.edu>
1998-03-07 20:16:49 +00:00
tegge
9f3982f0f6 When entering the apic version of slow interrupt handler, level
interrupts are masked, and EOI is sent iff the corresponding ISR bit
is set in the local apic. If the CPU cannot obtain the interrupt
service lock (currently the global kernel lock) the interrupt is
forwarded to the CPU holding that lock.

Clock interrupts now have higher priority than other slow interrupts.
1998-03-03 22:56:30 +00:00
tegge
beae57c5b3 Forward the signal if the process runs on a different CPU. This reduces
the signal handling latency for cpu-bound processes that performs very
few system calls.

The IPI for forcing an additional software trap is no longer dependent upon
BETTER_CLOCK being defined.
1998-03-03 20:55:26 +00:00
tegge
9b0c9780e5 Reduce timeout before assuming that forwarding of hardclock or softclock
failed. Don't complain on forwarding failure, unless
BETTER_CLOCK_DIAGNOSTIC is defined.
1998-03-03 20:09:14 +00:00
dyson
69e5a1e9f5 1) Use a more consistent page wait methodology.
2)	Do not unnecessarily force page blocking when paging
	pages out.
3)	Further improve swap pager performance and correctness,
	including fixing the paging in progress deadlock (except
	in severe I/O error conditions.)
4)	Enable vfs_ioopt=1 as a default.
5)	Fix and enable the page prezeroing in SMP mode.

All in all, SMP systems especially should show a significant
improvement in "snappyness."
1998-03-01 04:18:54 +00:00
eivind
d7a6ab2803 Staticize. 1998-02-09 06:11:36 +00:00
tegge
ba494eff3a Add support for low resolution SMP kernel profiling.
- A nonprofiling version of s_lock (called s_lock_np) is used
    by mcount.

  - When profiling is active, more registers are clobbered in
    seemingly simple assembly routines. This means that some
    callers needed to save/restore extra registers.

  - The stack pointer must have space for a 'fake' return address
    in idle, to avoid stack underflow.
1997-12-15 02:18:35 +00:00
tegge
06b61e24e4 Don't forward hardclock or statclock to stopped cpus. Disable forwarding
when a panic has occured.
1997-12-15 01:14:10 +00:00
tegge
982ed8caa2 Add needed #include.
Problem found by: Bruce Evans <bde@zeta.org.au>
1997-12-12 21:45:23 +00:00
fsmp
6dd7dcc53b The improvements to clock statistics by Tor Egge
Wrappered and enabled by the define BETTER_CLOCK (on by default in smpyests.h)

Reviewed by:	smp@csn.net
Submitted by:	Tor Egge <Tor.Egge@idi.ntnu.no>
1997-12-08 23:00:24 +00:00
tegge
cd60b5872c Use UPAGES when setting up private pages for SMP (which includes idle stack). 1997-11-07 19:58:34 +00:00
bde
fb826377ff Removed unused #includes. 1997-10-28 15:59:26 +00:00
peter
f8166c2605 Try and fix some style problems 1997-10-12 15:24:39 +00:00
peter
fc821abd4c Convert the VM86 option from a global option to an option only depended
on by the files that use it.  Changing the VM86 option now only causes
a recompile of a dozen files or so rather than the entire kernel.
1997-10-10 09:44:12 +00:00
dyson
a96b1911b8 It is possible that MB's with really broken bios's not set up more of
the mtrr registers.  This just fills in more of the registers.
1997-10-06 02:11:32 +00:00
dyson
038c3f0595 Make sure that the memory type registers are the same for each CPU
in a P6 SMP system.  Some MB bios'es don't set the registers up correctly
for the AP's.  Additionally, set the memory between 0xa0000 and 0xbffff
as write combining.
1997-10-05 03:19:29 +00:00
peter
aab3d0a478 Implement the parts needed for VM86 under SMP. 1997-09-21 15:03:59 +00:00
dyson
90f6eb3199 Add support for more than 1 page of idle process stack on SMP systems. 1997-09-21 05:50:02 +00:00
fsmp
877f33cf60 General cleanup of the lock pushdown code. They are grouped and enabled
from machine/smptests.h:

#define PUSHDOWN_LEVEL_1
#define PUSHDOWN_LEVEL_2
#define PUSHDOWN_LEVEL_3
#define PUSHDOWN_LEVEL_4_NOT
1997-09-07 22:04:09 +00:00
fsmp
c9f24c9fd2 Cleanup. 1997-09-01 07:31:54 +00:00
bde
b5c24bb113 Move closer to supporting VM86 under SMP.
LINT now compiles but doesn't link.  Other link-time breakage for LINT
is now visible (SMP is incompatible with SIMPLELOCK_DEBUG).
Submitted by:	jlemon
1997-09-01 01:54:52 +00:00
fsmp
53cd3a6e28 Debug version of simple_lock. This will store the CPU id of the
holding CPU along with the lock.  When a CPU fails to get the lock
it compares its own id to the holder id.  If they are the same it
panic()s, as simple locks are binary, and this would cause a deadlock.

Controlled by smptests.h: SL_DEBUG, ON by default.

Some minor cleanup.
1997-08-31 03:17:48 +00:00