Commit Graph

39 Commits

Author SHA1 Message Date
gonzo
809ad0530a Replace generic ARM11 option with more specific
support for ARM1136 and ARM1176

Submitted by:	Daisuke Aoyama <aoyama at peach.ne.jp>
Obtained from:	NetBSD
2012-12-20 04:32:02 +00:00
gonzo
6e2925b8b4 Piggyback MIPS changes and add ARM syscons support for devices with
framebuffer

While here - sort #if defined() order alphabetically
2012-08-25 23:59:31 +00:00
gonzo
032427f3e9 Merging projects/armv6, part 1
Cummulative patch of changes that are not vendor-specific:
	- ARMv6 and ARMv7 architecture support
	- ARM SMP support
	- VFP/Neon support
	- ARM Generic Interrupt Controller driver
	- Simplification of startup code for all platforms
2012-08-15 03:03:03 +00:00
imp
3cb9677e87 Create a generic way to support multiple boards within an
arm platform.  Add all the atmel boards to the ATMEL kernel for
testing purposes.  Until boot loader arg parsing of baord type
is done, this won't actually be able to do the runtime selection.
2012-07-07 05:02:39 +00:00
imp
0dbd258e2a These options are unused, and can safely be retired. 2012-06-15 08:01:16 +00:00
imp
b11c0bf1e4 Add support for parsing Linux ATAGs such as you'd see from uboot or
redboot.  Support is very preiminary and likely needs some work. Also,
do some minor code shuffling of the FreeBSD /boot/loader metadata
parsing code.  This code is preliminary and should be used with
caution.
2012-06-14 04:16:16 +00:00
imp
50adcf0cad Create default_parse_boot_param which, if FreeBSD /boot/loader support
is enabled, sets values based on the metadata passed in.  Otherwise
fake_preload_metadata is called.  Change the default parse_boot_param
to default_parse_boot_param.  Enable this functionality only on the mv
platform, which is where most of the code is from.

Reviewed by:	cognet, Ian Lapore
2012-06-14 04:09:20 +00:00
imp
7670aa6951 Eliminate the now-unused AT91C_MASTER_CLOCK option and change the one
place in the source it was used to the more correct AT91C_MAIN_CLOCK.
Sort AT91C_MAIN_CLOCK into a better location in the options.arm file.
2012-06-04 04:24:59 +00:00
stas
857374ab0e - Add new ARM kernel option QEMU_WORKAROUNDS which can be
used in the code which needs to implement some specific
  behaviour when being run under QEMU.
- Make PXA UART probe code to work under QEMU gumstix, which
  doesn't emulate all the ports properly.
2012-04-07 23:47:08 +00:00
cognet
84d09fdb45 Add options I missed in the additionnal AT91 support commits.
Submitted by:	Greg Ansley
2010-10-07 09:30:35 +00:00
raj
38ed317cdb Now that we are fully FDT-driven on MRVL platforms, remove PHYSMEM_SIZE option. 2010-07-19 19:19:33 +00:00
raj
48f2ce50e5 Convert Marvell ARM platforms to FDT convention.
The following systems are involved:

  - DB-88F5182
  - DB-88F5281
  - DB-88F6281
  - DB-78100
  - SheevaPlug

This overhaul covers the following major changes:

  - All integrated peripherals drivers for Marvell ARM SoC, which are
    currently in the FreeBSD source tree are reworked and adjusted so they
    derive config data out of the device tree blob (instead of hard coded /
    tabelarized values).

  - Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say
    good by to obio / mbus drivers and numerous hard-coded config data.

Note that world needs to be built WITH_FDT for the affected platforms.

Reviewed by:	imp
Sponsored by:	The FreeBSD Foundation.
2010-06-13 13:28:53 +00:00
kevlo
497dc1cc7b Add support for FA626TE.
Tested on GM8181 development board.
2010-05-04 10:14:05 +00:00
rpaulo
69436c4cab Add support for Cavium Econa CNS11XX ARM boards. These boards were
previously know by StarSemi STR9104.

Tested by the submitter on an Emprex NSD-100 board.

Submitted by:	Yohanes Nugroho <yohanes at gmail.com>
Reviewed by:	freebsd-arm, stas
Obtained from:	//depot/projects/str91xx/...
2010-01-04 03:35:45 +00:00
raj
6aac59f9fa Introduce MII_ADDR_BASE option on ARM, which allows to override the default
per platform requirements.

Notes:
- Only used by mge(4) at the moment.

- This is very simplified approach and should be replaced by some long-term
  solution for managing the board/platform configuration (among others the
  MAC-PHY binding info).

Submitted by:	Michal Hajduk
Obtained from:	Semihalf
2009-08-25 09:47:12 +00:00
sam
f9723c20c0 add IXP4XX_FLASH_SIZE config knob that can be used to override the default
flash size; this is necessary at the moment because we map all of flash at
boot, eventually we'll do this on the fly
2009-03-10 21:49:22 +00:00
sam
9c1fcf4ecd Merge WIP from p4:
o recognize ixp435 cpu
o change memory layout for for ixp4xx to not assume memory is aliases
  to 0x10000000 (Cambria/ixp435 memory starts at zero)
o handle 64 irqs for ixp435
o dual EHCI USB 2.0 controller integral to ixp435
o overhaul NPE code for ixp435 and better MAC+MII naming
o updated NPE firmware (including NPE-A image for ixp435/ixp465)
o Gateworks Cambria board support:
  - IDE compact flash
  - MCU
  - front panel LED on i2c bus
  - Octal LED latch

Sanity-tested with NFS-root on Avila and Cambria boards.  Requires
pending boot2 mods for CF-boot on Cambria.
2008-12-13 01:21:37 +00:00
stas
610e0aa6be - Obtain main clock frequency dynamically based on CKGR_MCFR register
contents.
- It is possible to override the dynamic configuration by using
  AT91C_MAIN_CLOCK option in kernel config.

PR:		arm/128961 (based on)
Submitted by:	Bjorn Konig <bkoenig@alpha-tierchen.de>
Reviewed by:	imp
Approved by:	kib (mentor, implicit)
2008-11-30 22:33:03 +00:00
raj
3226c13778 Introduce basic support for Marvell families of system-on-chip ARM devices:
*  Orion
     - 88F5181
     - 88F5182
     - 88F5281

  * Kirkwood
     - 88F6281

  * Discovery
     - MV78100

The above families of SOCs are built around CPU cores compliant with ARMv5TE
instruction set architecture definition. They share a number of integrated
peripherals. This commit brings support for the following basic elements:

  * GPIO
  * Interrupt controller
  * L1, L2 cache
  * Timers, watchdog, RTC
  * TWSI (I2C)
  * UART

Other peripherals drivers will be introduced separately.

Reviewed by:	imp, marcel, stass (Thanks guys!)
Obtained from:	Marvell, Semihalf
2008-10-13 20:07:13 +00:00
benno
980aab4117 Support for the XScale PXA255 SoC as found on the Gumstix Basix and Connex
boards.  This is enough to net-boot to multiuser.

Also supported is the SMSC LAN91C111 parts used on the netCF, netDUO and netMMC
add-on boards.

I'll be putting some instructions on how to boot this on the Gumstix boards
online soon.

This is still fairly rough and will be refined over time but I felt it was
better to get this out there where other people can help out.
2008-06-06 05:08:09 +00:00
kevlo
84c802e0f2 Add CPU_ARM9E 2007-10-31 07:28:45 +00:00
cognet
bf5c2ef02d Add an option to be able to override the value of the AT91 master clock
frequency. It'd be better to be able to calculate it at runtime, but we need
the information very early, to setup the uart.
2007-10-25 23:02:42 +00:00
cognet
0b1fdbaaca Add CPU_XSCALE_81342 before I forget again. 2007-06-11 21:31:13 +00:00
cognet
02162f9242 Add two new options, FLASHADDR, which defines the address the flash is
mapped at, and LOADERRAMADDR, the address at which the loader maps the ram at
at the time the kernel is booted.
They are used to detect if the kernel is booted from the onboard flash.
Define those for the IQ31244
2007-02-19 01:03:08 +00:00
ticso
b2a331b15e MFp4: add BWCT kernel configuration 2007-01-05 02:08:35 +00:00
sam
ac8ac0205c add CPU_XSCALE_IXP425
Reviewed by:	cognet, imp
MFC after:	1 month
2006-11-19 23:56:44 +00:00
cognet
d4600e67df Finally bring it support for the i80219 XScale processor.
Submitted by:	Max M. Boyarov <m.boyarov bsd by>
2006-08-24 23:51:28 +00:00
cognet
2d628bb4d9 Rewrite ARM_USE_SMALL_ALLOC so that instead of the current behavior, it maps
whole the physical memory, cached, using 1MB section mappings. This reduces
the address space available for user processes a bit, but given the amount of
memory a typical arm machine has, it is not (yet) a big issue.
It then provides a uma_small_alloc() that works as it does for architectures
which have a direct mapping.
2006-08-08 20:59:38 +00:00
imp
6f36c78e6b For the moment, make board configuration a compile time option. This
saves space in the final kernel, but at the expense of flexibility to
boot the same kernel accross a family of boards.
2006-07-14 21:59:54 +00:00
cognet
13929c476a Convert the last offender, the SA1110 port, to ARM32_NEW_VM_LAYOUT, and
completely nuke the !ARM32_NEW_VM_LAYOUT case.
2006-06-06 21:06:57 +00:00
cognet
04175402f4 Make VERBOSE_INIT_ARM compile by fixing various printf formats, and add it
as an option.

Submitted by:   Max N. Boyarov <m.boyarov at bsd dot by>
2006-06-06 01:14:12 +00:00
cognet
2e58b61962 Resurrect Skyeye support :
Add a new option, SKYEYE_WORKAROUNDS, which as the name suggests adds
workarounds for things skyeye doesn't simulate. Specifically :
- Use USART0 instead of DBGU as the console, make it not use DMA, and           manually provoke an interrupt when we're done in the transmit function.
- Skyeye maintains an internal counter for clock, but apparently there's
no way to access it, so hack the timecounter code to return a value which
is increased at every clock interrupts. This is gross, but I didn't find a
better way to implement timecounters without hacking Skyeye to get the
counter value.
- Force the write-back of PTEs once we're done writing them, even if they
are supposed to be write-through. I don't know why I have to do that.
2006-05-13 23:41:16 +00:00
cognet
067f218bcf Add a new option, XSCALE_DISABLE_CCNT, to not use the xscale ccnt as a
timecounter (because gxemul doesn't emule it yet).
2006-04-06 17:11:08 +00:00
cognet
24415ea106 The IQ80321 clock is 200MHz, but the IQ80321 is 198MHz, so add a kernel option
to override the frequency
2005-12-09 23:52:51 +00:00
cognet
6088d73c5f Add ARM_USE_SMALL_ALLOC. 2005-06-07 23:05:04 +00:00
cognet
67e8b297b9 Add a new option, ARM_CACHE_LOCK_ENABLE (I forgot it in my last commit). 2005-02-26 22:41:07 +00:00
cognet
735956cb8e Add a new option, ARM32_NEW_VM_LAYOUT. When set, we try to put up to 4
L2 tables in one page, instead of the old 1 L2 table <=> 1 page behavior.
While I'm there, add ARM9_CACHE_WRITE_THROUGH, which I forgot last time.
2004-11-10 22:08:27 +00:00
cognet
c04b68fd28 Add new options :
PHYSADDR : Address of the physical memory
KERNPHYSADDR : Physical address where the kernel starts
KERNVIRTADDR : Virtual address of the kernel
STARTUP_PAGETABLE_ADDR : Where to put the page table at bootstrap
+ Xscale specific options
2004-09-23 22:52:25 +00:00
cognet
e4128057bf Add config magic for arm. 2004-05-14 11:49:40 +00:00