Commit Graph

829 Commits

Author SHA1 Message Date
rwatson
1f588d3b57 Remove errant % in license comment.
MFC after:	3 days
2008-02-26 11:45:32 +00:00
rwatson
2b5ceeba31 On the ixp425, when we fail to initialize the memory rman instance, the
panic message should read "memory", not "IRQ".

MFC after:	3 days
2008-02-26 11:44:41 +00:00
raj
172a5277b4 ARM locore cosmetics.
Approved by:	cognet (mentor)
2008-02-05 10:23:42 +00:00
raj
a6d33e3164 Improve ARM_TP_ADDRESS and RAS area.
De-hardcode usage of ARM_TP_ADDRESS and RAS local storage, and move this
special purpose page to a more convenient place i.e. after the vectors high
page, more towards the end of address space. Previous location (0xe000_0000)
caused grief if KVA was to go beyond the default limit.

Note that ARM world rebuilding is required after this change since the
location of ARM_TP_ADDRESS is shared between kernel and userland.

Submitted by:	Grzegorz Bernacki (gjb AT semihalf dot com)
Reviewed by:	imp
Approved by:	cognet (mentor)
2008-02-05 10:22:33 +00:00
cognet
4c1734c71d Bring in the nice work from Mark Tinguely on arm pmap.
The only downside is that it renames pmap_vac_me_harder() to pmap_fix_cache().
From Mark's email on -arm :
pmap_get_vac_flags(), pmap_vac_me_harder(), pmap_vac_me_kpmap(), and
pmap_vac_me_user() has been rewritten as pmap_fix_cache() to be more
efficient in the kernel map case. I also removed the reference to
the md.kro_mappings, md.krw_mappings, md.uro_mappings, and md.urw_mappings
counts.

In pmap_clearbit(), we can also skip over tests and writeback/invalidations
in the PVF_MOD and PVF_REF cases if those bits are not set in the pv_flag.
PVF_WRITE will turn caching back on and remove the PV_MOD bit.

In pmap_nuke_pv(), the vm_page_flag_clear(pg, PG_WRITEABLE) has been moved
to the pmap_fix_cache().

We can be more agressive in attempting to turn caching back on by calling
pmap_fix_cache() at times that may be appropriate to turn cache on
(a kernel mapping has been removed, a write has been removed or a read
has been removed and we know the mapping does not have multiple write
mappings to a page).

In pmap_remove_pages() the cpu_idcache_wbinv_all() is moved to happen
before the page tables are NULLed because the caches are virtually
indexed and virtually tagged.

In pmap_remove_all(), the pmap_remove_write(m) is added before the
page tables are NULLed because the caches are virtually indexed and
virtually tagged. This also removes the need for the caches fixing routine
(whichever is being used pmap_vac_me_harder() or pmap_fix_cache()) to be
called on any of these mappings.

In pmap_remove(), I simplified the cache cleaning process and removed
extra TLB removals. Basically if more than PMAP_REMOVE_CLEAN_LIST_SIZE
are removed, then just flush the entire cache.
2008-01-31 00:05:40 +00:00
ru
910410640b Add a wrapper function that bound checks writes to the dump device. 2008-01-28 19:04:07 +00:00
jhb
4d2d2276c8 - Retire npe_defrag(), gem_defrag(), msk_defrag(), nfe_defrag(), and
re_defrag() and use m_collapse() instead.
- Replace a reference to ath_defrag() in a comment in if_wpi.c with
  m_collapse().
2008-01-17 23:37:47 +00:00
cognet
961a1f29ef Unbreak build by adding the missing parameter to pmap_enter(). 2008-01-17 12:41:59 +00:00
cognet
1aa2c858ff Back when I committed the arm port, I've been asked to move
memcpy/memset/memcmp and friends from libkern/arm to arm/arm/support.S, and so
I did, but in the process, I didn't add the appropriate copyrights.
This is a major oversight from me, and I apology to the NetBSD people for it.

MFC After:	1 day
2008-01-12 21:11:43 +00:00
cognet
24d883c398 Add a missing \n. 2008-01-07 00:36:09 +00:00
alc
545d26e30b Add an access type parameter to pmap_enter(). It will be used to implement
superpage promotion.

Correct a style error in kmem_malloc(): pmap_enter()'s last parameter is
a Boolean.
2008-01-03 07:34:34 +00:00
imp
9699ca07d2 Use correct function name in panic message 2008-01-03 06:44:12 +00:00
imp
500a82f657 Modernize comment about diagnostic. 2008-01-03 06:31:41 +00:00
alc
37cdbd87f5 Add configuration knobs for the superpage reservation system. Initially,
the reservation will only be enabled on amd64.
2007-12-27 16:45:39 +00:00
rwatson
bdee30611d Add a new 'why' argument to kdb_enter(), and a set of constants to use
for that argument.  This will allow DDB to detect the broad category of
reason why the debugger has been entered, which it can use for the
purposes of deciding which DDB script to run.

Assign approximate why values to all current consumers of the
kdb_enter() interface.
2007-12-25 17:52:02 +00:00
stas
cf2788b769 - Fix a typo in comments.
MFC after:	1 week
Approved by:	cognet
2007-12-23 23:31:27 +00:00
imp
93ea7f3594 Actually program the interrupt controller for priorities. As we
support more AT91 platforms, we'll need to move this into some
platform init routine.
2007-12-19 17:34:17 +00:00
kevlo
f3f1d0b3a5 Use M_NOWAIT instead of M_WAITOK to cause malloc() to return NULL
Reviewed by: imp
2007-12-17 05:08:54 +00:00
stas
10ac9b50a2 - Don't return 0xffff if PHY id isn't equal 0. This allows PHYs with
non-zero addresses to be used.

Approved by:	cognet
MFC after:	2 weeks
2007-12-16 12:57:12 +00:00
cognet
eb33bdbe0e There's no need to call pmap_vac_me_harder() in pmap_protect(), as it
already happened in pmap_modify_pv().

Submitted by:	Mark Tinguely <tinguely AT casselton DOT net>
2007-12-11 20:35:44 +00:00
jkoshy
39d4b4accf Add stubs to unbreak LINT. 2007-12-07 13:45:47 +00:00
cognet
b76f135a28 Fix style in previous commit.
Pointed out by:	njl
2007-12-07 10:42:11 +00:00
cognet
f919b8c32d Erm, add a missing else, we do not want to increase the mapping counters for
both kernel and userland when we create a pv for pmap_kernel.

Reported by:	Mark Tinguely <tinguely AT casselton DOT net>
MFC After:	3 days
2007-12-06 23:17:24 +00:00
rwatson
99285f7544 Break out stack(9) from ddb(4):
- Introduce per-architecture stack_machdep.c to hold stack_save(9).
- Introduce per-architecture machine/stack.h to capture any common
  definitions required between db_trace.c and stack_machdep.c.
- Add new kernel option "options STACK"; we will build in stack(9) if it is
  defined, or also if "options DDB" is defined to provide compatibility
  with existing users of stack(9).

Add new stack_save_td(9) function, which allows the capture of a stacktrace
of another thread rather than the current thread, which the existing
stack_save(9) was limited to.  It requires that the thread be neither
swapped out nor running, which is the responsibility of the consumer to
enforce.

Update stack(9) man page.

Build tested:	amd64, arm, i386, ia64, powerpc, sparc64, sun4v
Runtime tested:	amd64 (rwatson), arm (cognet), i386 (rwatson)
2007-12-02 20:40:35 +00:00
cognet
9e1fb6a88b Fix a potential bug in pmap :
We used to allocate the domains 0-14 for userland, and leave the domain 15
for the kernel. Now supersections requires the use of domain 0, so we
switched the kernel domain to 0, and use 1-15 for userland.
How it's done currently, the kernel domain could be allocated for a
userland process.
So switch back to the previous way we did things, set the first available
domain to 0, and just add 1 to get the real domain number in the struct pmap.

Reported by:	Mark Tinguely <tinguely AT casselton DOT net>
MFC After:	3 days
2007-12-02 15:26:30 +00:00
cognet
375dcebc07 Move the strongarm-specific files from conf/files.arm to sa11x0/files.sa11xO.
Submitted by:	Rafal Jaworowski <raj AT semihalf DOT com>
2007-12-02 13:12:21 +00:00
cognet
507e28d936 Cleanup : make nexus standard, as it is mandatory anyway.
Garbage-collect unused nexus_io.c and nexus_io_asm.S

Submitted by:	Rafal Jaworowski <raj AT semihalf DOT com>
2007-12-02 13:10:42 +00:00
cognet
db18da5d15 Close a race.
The RAS implementation would set the end address, then the start
address.  These were used by the kernel to restart a RAS sequence if
it was interrupted.  When the thread switching code ran, it would
check these values and adjust the PC and clear them if it did.

However, there's a small flaw in this scheme.  Thread T1, sets the end
address and gets preempted.  Thread T2 runs and also does a RAS
operation.  This resets end to zero.  Thread T1 now runs again and
sets start and then begins the RAS sequence, but is preempted before
the RAS sequence executes its last instruction.  The kernel code that
would ordinarily restart the RAS sequence doesn't because the PC isn't
between start and 0, so the PC isn't set to the start of the sequence.
So when T1 is resumed again, it is at the wrong location for RAS to
produce the correct results.  This causes the wrong results for the
atomic sequence.

The window for the first race is 3 instructions.  The window for the
second race is 5-10 instructions depending on the atomic operation.
This makes this failure fairly rare and hard to reproduce.

Mutexs are implemented in libthr using atomic operations.  When the
above race would occur, a lock could get stuck locked, causing many
downstream problems, as you might expect.

Also, make sure to reset the start and end address when doing a syscall, or
a malicious process could set them before doing a syscall.

Reviewed by: imp, ups (thanks guys)
Pointy hat to:	cognet
MFC After:	3 days
2007-12-02 12:49:28 +00:00
cognet
55fd7467ec Fixes for ARM9/ARM10 :
Call uma_sel_align() there at well.
Set CPU_CONTROL_VECRELOC if we're using the high vectors page.

Submitted by:	Rafal Jaworowski <raj AT semihalf DOT com>
MFC After:	1 week
2007-11-28 22:55:55 +00:00
cognet
77643d0653 Correct the logic : we can just invalidate the cache lines, and not
write-back them, only if PREWRITE is not set, and if the buffer is
cache-line aligned.

MFC After:	1 week
2007-11-28 22:21:17 +00:00
cognet
8ee5104341 In atomic_fetchadd_32(), do not blindly increase the value of %3.
It should just contain the value we want to add, as if we're interrupted
between the add and the str, we will restart from the beginning. Just use
a register we can scratch instead.

MFC After:	1 week
2007-11-27 22:12:05 +00:00
jhb
7fe785218b Remove the 'needbounce' variable from the _bus_dmamap_load_buffer()
routine.  It is not needed as the existing tests for segment coalescing
already handle bounced addresses and it prevents legal segment coalescing
in certain edge cases.

MFC after:	1 week
Reviewed by:	scottl
2007-11-27 17:28:12 +00:00
alc
d1ab859bdc Prevent the leakage of wired pages in the following circumstances:
First, a file is mmap(2)ed and then mlock(2)ed.  Later, it is truncated.
Under "normal" circumstances, i.e., when the file is not mlock(2)ed, the
pages beyond the EOF are unmapped and freed.  However, when the file is
mlock(2)ed, the pages beyond the EOF are unmapped but not freed because
they have a non-zero wire count.  This can be a mistake.  Specifically,
it is a mistake if the sole reason why the pages are wired is because of
wired, managed mappings.  Previously, unmapping the pages destroys these
wired, managed mappings, but does not reduce the pages' wire count.
Consequently, when the file is unmapped, the pages are not unwired
because the wired mapping has been destroyed.  Moreover, when the vm
object is finally destroyed, the pages are leaked because they are still
wired.  The fix is to reduce the pages' wired count by the number of
wired, managed mappings destroyed.  To do this, I introduce a new pmap
function pmap_page_wired_mappings() that returns the number of managed
mappings to the given physical page that are wired, and I use this
function in vm_object_page_remove().

Reviewed by: tegge
MFC after: 6 weeks
2007-11-17 22:52:29 +00:00
cognet
5d2d26ed5f Add a kernel config file for the Hot-e HL200 (AT91RM92 based).
Many thanks to John Nicholls from Thinklinx for sending sample hardware.
2007-11-17 17:25:22 +00:00
marcel
1e7c4f0a3f o Rename cpu_thread_setup() to cpu_thread_alloc() to better
communicate that it relates to (is called by) thread_alloc()
o  Add cpu_thread_free() which is called from thread_free()
   to counter-act cpu_thread_alloc().

i386:	Have cpu_thread_free() call cpu_thread_clean() to
	preserve behaviour.
ia64:	Have cpu_thread_free() call mtx_destroy() for the
	mutex initialized in cpu_thread_alloc().

PR: ia64/118024
2007-11-14 20:21:54 +00:00
julian
b2732e0c22 generally we are interested in what thread did something as
opposed to what process. Since threads by default have teh name of the
process unless over-written with more useful information, just print the
thread name instead.
2007-11-14 06:21:24 +00:00
cognet
6d7755ffed Add entries for the L2 cache-related functions for armv5.
Spotted out by: Rafal Jaworowski
2007-11-08 13:19:08 +00:00
kib
9ae733819b Fix for the panic("vm_thread_new: kstack allocation failed") and
silent NULL pointer dereference in the i386 and sparc64 pmap_pinit()
when the kmem_alloc_nofault() failed to allocate address space. Both
functions now return error instead of panicing or dereferencing NULL.

As consequence, vmspace_exec() and vmspace_unshare() returns the errno
int. struct vmspace arg was added to vm_forkproc() to avoid dealing
with failed allocation when most of the fork1() job is already done.

The kernel stack for the thread is now set up in the thread_alloc(),
that itself may return NULL. Also, allocation of the first process
thread is performed in the fork1() to properly deal with stack
allocation failure. proc_linkup() is separated into proc_linkup()
called from fork1(), and proc_linkup0(), that is used to set up the
kernel process (was known as swapper).

In collaboration with:	Peter Holm
Reviewed by:	jhb
2007-11-05 11:36:16 +00:00
cognet
39bac9265d Remove a staled comment, NPE-C should work fine.
Reviewed by:	sam
2007-11-04 21:54:52 +00:00
kevlo
ad6bad8ed6 __CPU_XSCALE_PXA2XX -> CPU_XSCALE_PXA2X0 2007-11-01 10:01:15 +00:00
kevlo
be94908799 Don't define get_cachetype() for CPU_ARM9E unless it's going to be used. 2007-10-31 07:27:31 +00:00
imp
b1a850ab26 kill commented out line of code. 2007-10-29 21:01:50 +00:00
cognet
bf5c2ef02d Add an option to be able to override the value of the AT91 master clock
frequency. It'd be better to be able to calculate it at runtime, but we need
the information very early, to setup the uart.
2007-10-25 23:02:42 +00:00
cognet
5ddc0ba134 Move some KB920x-specific options into the KB920x file. 2007-10-25 22:57:19 +00:00
cognet
638dd6acb3 Oooops, get the end of the memory right. 2007-10-25 22:43:17 +00:00
cognet
721d638714 KERNBASE should really be KERNVIRTADDR there too.
MFC after:	1 week
2007-10-24 23:41:46 +00:00
cognet
bdb3b0ffe4 In ate_get_mac(), try to get the mac address in the right order, at least
in the same order as it's set in ate_set_mac.
I remember a discussion about this on -arm, but apparently nothing was done.
Warner, is this wrong ?

X-MFC After:	proper review
2007-10-24 23:12:19 +00:00
cognet
bd28207484 Handle the case where PHYSADDR != KERNPHYSADDR (ie we do not load the kernel
at the beginning of the RAM).

MFC After:	1 week
2007-10-24 22:26:54 +00:00
cognet
b1ea6b3ec3 Correct a comment, this was not true anymore. 2007-10-24 22:24:32 +00:00
imp
31191feb7a correct guard variable names. 2007-10-18 05:43:44 +00:00