Commit Graph

322 Commits

Author SHA1 Message Date
adrian
ca9749fa32 Fix NF calibration breakage introduced by me in a past commit.
Since the returned NF will be -ve, checking for <= 0 is not good
enough. For now, check whether it equals 0 or -1; a future commit
will tidy this mess up and have it return HAL_BOOL instead.
2011-05-15 07:59:33 +00:00
adrian
3ca0f8edfc Fix the Merlin 5ghz fast-clock EEPROM fetch to return the correct value.
The eeprom Get method should return HAL_OK if fastclock is enabled in the
EEPROM. It was returning the opposite of what it should have.

Submitted by:	Matthew Fleming <mdf356@gmail.com>
2011-05-14 15:24:15 +00:00
adrian
160e8cb859 Fix the eeprom set API method to return HAL_STATUS.
The code assumed it could return HAL_OK, HAL_EINVAL and other
HAL_STATUS types; so it shouldn't be declared as returning HAL_BOOL.

This commit was brought to you by the Clang compiler.

Submitted by:	Matthew Fleming <mdf356@gmail.com>
2011-05-14 15:12:02 +00:00
adrian
d8ffb23a02 Import initial EEPROM code for Kite (AR9287).
I've tested this locally and it does indeed read and attach to an AR9287
EEPROM. But a lot more code needs to be ported over to the HAL before
the AR9287 is functional.

I'm importing this separate from the rest of the codebase (and unlinked from
the build for now) in case someone wishes to begin fiddling with porting
the rest of the code over from Linux ath9k.

Obtained from:	Linux ath9k
2011-05-14 14:25:15 +00:00
adrian
c3c15582fd When disabling RIFS for Sowl (AR9160) and Howl (AR9130), make sure RIFS
is totally disabled.

The Atheros HAL code does this for Sowl/Howl but not for Owl (AR5416) where
RIFS is disabled by default.

This seems to quieten the occasional baseband hang I've been seeing with
the AR9160 in STA mode under constant heavy traffic load.

Obtained from:	Atheros
2011-05-14 05:43:33 +00:00
adrian
baf1247717 Major fix: when doing open-loop TX power calibration, adjust
the correct CCK rates rather than adjusting the first handful.
This may have affected some AR9280 based NICs.

Minor fix: merlin check update
2011-05-14 04:17:16 +00:00
adrian
000c7ea1de Fixes from the Atheros HAL - formatting; update Merlin checks to be consistent.
Nothing functional should change with this commit.
2011-05-14 04:05:23 +00:00
adrian
882abde07a Even though initial calibrations aren't done (yet), add this so we're
consistent with the Atheros HAL.
2011-05-14 01:41:36 +00:00
adrian
fdf2456eee Only do open loop power control and temperature compensation
for the AR9280 based NICs if it's actually enabled.

Some of the OLC code was erroneously called during setup
and calibration. This may have caused some incorrect behaviour.
2011-05-13 14:33:45 +00:00
adrian
78eaf5d431 Remove duplicate code - add a function which calculates the ratesArray[]
table which contains the per-rate target TX power.

This code is shared between the v14 eeprom board setup (AR5416, AR9160,
AR9280) and will also be used by the upcoming Kite (AR9287) support.
2011-05-13 10:36:38 +00:00
adrian
0541c8dd0d Some diversity changes relating to AR9285.
* grab the main, alt and selected LNA config
* add some optional / disabled logging code
* add a check to reject packets with an invalid main rssi too,
  in case the alt is the active receive chain and main is -ve.

Note: The software-controlled combined diversity code is still disabled.
2011-05-13 09:57:12 +00:00
adrian
f47d00001a Break out the AR9285 analog registers from ar5416/ar5416phy.h and put
them in a new header file, ar9002/ar9285_an.h.

Shuffle the AR9280 analog registers in ar5416/ar541phy.h into a contiguous
spot.
2011-05-12 10:11:24 +00:00
adrian
3fe0beec0e Fix the half/quater rate PLL setup for AR5416, AR9160 and
(beta?) AR9280 chips.

Note: This doesn't "fix" half/quarter rate support for these
chips; it merely fixes an oversight.

Obtained from:	Atheros
2011-05-12 03:25:24 +00:00
adrian
ed33f6206b Fixes from Atheros:
* If AR9130, give the chip extra time to reset
* If AR5416, don't shutdown the chip during reset
2011-05-12 03:15:21 +00:00
adrian
51b81d320e Make the NF calibration logic (hopefully!) more resistive to noisy
environments.

In setups where NF calibration can take a while, don't load the CCA
and kick off a new NF calibration if the previous one hasn't yet
completed. This shouldn't happen unless the environment is noisy but
those exist (hi phk!).

Here, if the previous NF hasn't completed when ar5416LoadNf() is run
(which reads the NF), it skips updating the history buffer, loading
the NF CCA array and kicking off the next NF cal. It's hoped it'll
occur in the next long calibration interval.

Obtained from:	Atheros, ath9k, my local HAL
2011-05-11 13:40:13 +00:00
adrian
83c864fab3 Always log if the NF CCA load fails; so users with debugging enabled
can see they're likely in a very noisy environment.
2011-05-11 13:25:43 +00:00
adrian
c7c34734f4 Make sure the chip is awake before writing to it to finally detach
it.

Obtained from:	Atheros
2011-05-11 13:24:17 +00:00
adrian
b410b114e0 Add a new flag - HAL_DEBUG_UNMASKABLE - which always logs a debug message
(when debug is enabled) no matter what.
2011-05-11 13:22:41 +00:00
adrian
1f0e7d70a6 Remove unused variable 2011-05-11 13:20:25 +00:00
adrian
73e0979e8a Remove the initial NF completion check.
This is taking quite a while for some people in some situations
(eg AR5418 in phk's Abusive Radio Environment).

Instead, the rest of the calibration related code should
ensure that a NF calibration has occured before reading NF
values and kicking off another NF calibration.

The channel should also likely be marked as "noisy" (CWINT)
if the NF calibration takes too long.
2011-05-11 11:02:20 +00:00
adrian
04842bd6c0 Remove a now unneeded comment.. 2011-05-11 10:30:31 +00:00
adrian
24eff2bd45 Restore the RSSI threshold after writing the board values.
This would be overwritten by the board initvals written in ah->writeIni().
2011-05-11 09:47:48 +00:00
adrian
7e859b0cd7 AR9285 (Kite) fixes.
* Correct some of the silicon revision checks to match what
  the Atheros HAL does. (See [1] below.)

* Move the PA cal and init cal method assignment to -after-
  the mac version/revision IDs are stored. The AR9285 init
  cal was never being called.

* Enable ANI.

Note Kite 1.0 and 1.1 were prototypes that shouldn't be seen
in the wild. Linux ath9k simply removed the prototype code from
their codebase. I'm going to leave it in there for now but
make it conditionally compilable in the future.

Obtained from:	Atheros
2011-05-10 04:32:27 +00:00
adrian
63b7280b18 Disable diversity combining support until I can get a firm answer
from Atheros as to what/when this is supposed to be enabled.

Using the default RX fast diversity settings seems to help quite
a bit.

Whilst I'm here, change the prototype to return HAL_BOOL rather than int.
2011-05-09 17:30:25 +00:00
adrian
4bfd669048 Fix a regression I introduced - only swap analog chains if the RX chainmask
is 0x5.
2011-05-09 17:10:48 +00:00
adrian
ca2d82df56 Disable TX STBC - it isn't used for now, but it isn't supported on Kite. 2011-05-09 16:49:40 +00:00
adrian
08e0a0c638 Import some initial Kite fixed diversity code from Atheros.
For now, the diversity settings are controlled by 'txantenna',
-not- rxantenna. This is because the earlier chipsets had
controllable TX diversity; the RX antenna setting twiddles
the default antenna register. I'll try sort that stuff out at
some point.

Call the antenna switch function from the board setup function
so scans, channel changes, mode changes, etc don't set the
diversity back to a default state too far from what's intended.

Things to todo:

* Squirrel away the last antenna diversity/combining parameters
  and restore them during board setup if HAL_ANT_VARIABLE is
  defined. That way scans, etc don't reset the diversity settings.

* Add some more public facing statistics, rather than what's
  simply logged under HAL_DEBUG_DIVERSITY.

For now, the fixed antenna settings behave better than variable
settings for me. I have some further fiddling to do..

Obtained from:	Atheros
2011-05-09 15:19:49 +00:00
adrian
3592656c6f Remove an un-needed PA cal call here. 2011-05-09 14:04:49 +00:00
adrian
a2816e3bed Fix the 5ghz fast clock logic.
The macro which I incorrectly copied into ah_internal.h assumed
that it'd be called with an AR_SREV_MERLIN_20() check to ensure
it was only enabled for Merlin (AR9280) silicon revision 2.0 or
later.

Trouble is, the 5GHz fast clock EEPROM flag is only valid for
EEPROM revision 16 or greater; it's assumed to be enabled
by default for Merlin rev >= 2.0. This meant it'd be incorrectly
set for AR5416 and AR9160 in 5GHz mode.

This would have affected non-default clock timings such as SIFS,
ACK and slot time. The incorrect slot time was very likely wrong
for 5ghz mode.
2011-05-08 15:55:52 +00:00
adrian
e8652e874e * Add AR_SREV_KITE macro for later use
* Modify AR_SREV_MERLIN_20() to match the Atheros/Linux ath9k behaviour -
  its supposed to match Merlin 2.0 and later Merlin chips.
  AR_SREV_MERLIN_20_OR_LATER() matches AR9280 2.0 and later chips
  (AR9285, AR9287, etc.)
2011-05-08 15:25:22 +00:00
adrian
962ee800ef These EEPROM bits actually defined whether HT/20 and HT/40 support
for the given channel is available.

It isn't used yet; ar5416GetWirelessModes() needs to be taught
about this rather than assuming HT20/HT40 is available.
2011-05-08 08:18:30 +00:00
adrian
8e4e48ea1f Fiddle with the PLL initialisation order to match ath9k/Atheros HAL.
This seems to make the AR9160 behave better during heavy scanning,
where before it'd hang and require a hard reset to recover.

Obtained From:	Linux ath9k, Atheros
2011-05-08 07:21:09 +00:00
adrian
ab2466aaac Properly indent the WAR code i pasted in from ath9k a few months
ago.
2011-05-08 05:45:06 +00:00
adrian
c90e3e33fb * Add in a comment about ar5416InitUserSettings() potentially
modifying AR_DIAG_SW.

  There's a hardware workaround which sets disabling some errors
  early at startup and clears said bits before the PCU begins
  receiving - it does this to avoid RX descriptor status errors.

  It's possible these bits aren't being completely properly twiddled
  in all instances; but in particular if the diag_reg HAL variable
  is set it won't be setting these bits correctly. I'll review this
  at some point.

 * Disable multicast search on mac address and key id - the driver
   doesn't use it at the moment and thus adhoc may be broken for
   merlin and later.

* Change this to be for Merlin 1.0 (which from what I understand
  wasn't ever publicly released) to be more correct.
2011-05-08 05:25:42 +00:00
adrian
1e4dac02d7 Fiddle with the AR5416 1.0 chainmask setup.
Apparently all three RX chains need to be enabled before initial calibration
is done, even if only two are configured.

Reorder the alt chain swap bit to match what the Atheros HAL is doing.

Obtained From:	ath9k, Atheros
2011-05-08 03:24:17 +00:00
adrian
e50df263d1 Fix the IS_5416 checks to actually work correctly.
I've verified that my AR5416 revision 2.2 (minor revision 0x0A) now
matches the correct checks.
2011-05-07 18:42:41 +00:00
adrian
1469251782 Do a HAL capabilities sync pass based on the Atheros HAL.
* Shuffle some of the capability numbers around to match the
  Atheros HAL capability IDs, just for consistency.

* Add some new capabilities to FreeBSD from the Atheros
  HAL which will be be shortly used when new chipsets are added
  (HAL SGI-20 support is for Kiwi/AR9287 support); for
  TX aggregation (MBSSID aggregate support, WDS aggregation
  support); CST/GTT support for carrier sense/TX timeout.
2011-05-07 15:30:23 +00:00
adrian
cb836f4cd7 Update the ext channel cycpwr threshold 1 register for the extension
channel when the channel is HT/40.

The new ANI code (primarily for the AR9300/AR9400) in ath9k sets this
register but the ANI code for the previous 11n chips didn't set this.

Unlike ath9k, only set this for HT/40 channels.

Obtained From:	ath9k
2011-05-07 13:08:48 +00:00
adrian
496023c65b Read in the extended regulatory domain flags so future code can use them.
These describe FCC/Japan channel and DFS behaviour.

The AR9285 and later chips don't set these bits in the eeprom, the correct
behaviour is to just assume all five bits are enabled.
2011-05-07 11:05:16 +00:00
adrian
52589fb651 Instead of returning an unknown mac/bb signature, just return 0. 2011-05-07 06:52:04 +00:00
adrian
09e5457942 Add some comments about which HAL capabilities are currently FreeBSD
specific.

The Atheros HAL and FreeBSD HAL share the same capabilities up
until HAL_CAP_11D, where things begin to diverge.

I'll look at tidying these up soon.

Obtained from:	Atheros
2011-05-07 06:47:09 +00:00
adrian
429a04517f Some BB hang changes:
* Add Howl (ar9130) to the list of chips that have DFS/BB/MAC hangs
* Don't treat unknown BB hangs as fatal; ath9k/Atheros HAL don't
  treat it as such.
* Add HAL_DEBUG_DFS to the debug fields in ath_hal/ah_debug.h

The BB hang check simply loops over an observation register checking
for a stuck state engine, but it can happen under high traffic
conditions. Ath9k and the Atheros HAL simply log a debug message and
continue.

Private to FreeBSD:

* Add HAL_DEBUG_HANG to the debug fields
* Change the hang debugging to HAL_DEBUG_HANG rather than HAL_DEBUG_DFS
  like in the Atheros HAL.

Obtained from:	Atheros
2011-05-07 06:45:35 +00:00
adrian
2908827b2b Change AR_SREV_OWL_{X}_OR_LATER to AR_SREV_5416_{X}_OR_LATER.
For now, these are equivalent macros. AR_SREV_OWL{X}_OR_LATER
will later change to exclude Howl (AR9130) in line with what
the Atheros HAL does.

This should not functionally change anything.

Obtained from:	Atheros
2011-05-07 02:59:24 +00:00
adrian
351f1c21ec Fix the OWL revision checks.
A quick story, which is partially documented in the commit.

The silicon revision in Linux ath9k and the Atheros HAL use an
AR_SREV_REVISION mask of 0x07.

FreeBSD's HAL uses the AR5212 AR_SREV_REVISION mask of 0x0F.

Thus the OWL silicon revisions were coming through as 0xA, 0xB,
0xC, rather than 0x0, 0x1 and 0x2.

My ath9k-sourced AR_SREV_OWL_<X> macros were thus using the wrong
silicon revision values and wouldn't correctly match.

This commit does a few things:

* Change the AR_SREV_OWL_<x> macros to use the AR_SREV_REVISION_OWL_*
  values, not AR_XSREV_REVISION_OWL macros;
* Disable AR_XSREV_REVISION_OWL_* values;
* Modify the IS_5416 to properly check the MAC is OWL, rather than
  potentially matching on non-OWL revisions (which shouldn't happen
  unless there's a silicon revision of higher than 0x9 in a later
  chip..)
* Add a couple more macros from the Atheros HAL for compatibility.

The main difference now is that the Atheros HAL defines
AR_SREV_OWL_{20,22}_OR_LATER subtly differently - it fails on all HOWL
silicon. The AR_SREV_5416_*_OR_LATER macros match on the relevant OWL
version -and- all HOWL versions, along with subsequent versions.

A subsequent commit is going to migrate the uses of AR_SREV_OWL_X_OR_LATER
to AR_SREV_5416_X_OR_LATER to match what's going on in the Atheros HAL.

There's only two uses of AR_SREV_OWL_X_OR_LATER which currently don't
apply to FreeBSD but it may do in the future.

Yes, it's all confusing!
2011-05-07 02:54:52 +00:00
adrian
12286510b6 Add a function which enables or disables RX RIFS searching, and migrate
the code which does this into it.
2011-05-06 15:33:56 +00:00
adrian
7bb431331f Don't perform NF calibration for radio chains which aren't in use:
Quoting the ath9k commit message:

At present the noise floor calibration is processed in supported
control and extension chains rather than required chains.
Unnccesarily doing nfcal in all supported chains leads to
invalid nf readings on extn chains and these invalid values
got updated into history buffer. While loading those values
from history buffer is moving the chip to deaf state.

This issue was observed in AR9002/AR9003 chips while doing
associate/dissociate in HT40 mode and interface up/down
in iterative manner. After some iterations, the chip was moved
to deaf state. Somehow the pci devices are recovered by poll work
after chip reset. Raading the nf values in all supported extension chains
when the hw is not yet configured in HT40 mode results invalid values.

Reference:	https://patchwork.kernel.org/patch/753862/

Obtained from:	Linux ath9k
2011-05-05 08:11:22 +00:00
adrian
737b9d0f91 Another Howl (AR9130) fix.
I haven't seen a 5ghz AR9130 based board yet though!

Obtained from:	Atheros
2011-05-05 04:43:05 +00:00
adrian
08029191f9 Fix up the chipset checks for the AR5416 and later silicon.
The checks should function as follows:

* AR_SREV_<silicon> : check macVersion matches that version id
* AR_SREV_<silicon>_<revision> : check macVersion and macRevision match
    the version / revision respectively

* AR_SREV_<silicon>_<revision>_OR_LATER: check that
  + if the chip silicon version == macVersion, enforce revision >= macRevision
  + if the chip silicon version > macVersion, allow it.

For example, AR_SREV_MERLIN() only matches AR9280 (any revision),
AR_SREV_MERLIN_10() would only match AR9280 version 1.0, but
AR_SREV_MERLIN_20_OR_LATER() matches AR9280 version >= 2.0 _AND_
any subsequent MAC (So AR9285, AR9287, etc.)

The specific fixes which may impact users:

* if there is Merlin hardware > revision 2.0, it'll now be correctly
  matched by AR_SREV_MERLIN_20_OR_LATER() - the older code simply
  would match on either Merlin 2.0 or a subsequent MAC (AR9285, AR9287, etc.)

* Kite version 1.1/1.2 should now correctly match. As these macros
  are used in the AR9285 reset/attach path, and it's assumed that the
  hardware is kite anyway, the behaviour shouldn't change. It'll only
  change if these macros are used in other codepaths shared with
  older silicon.

Obtained from:	Linux ath9k, Atheros
2011-05-05 03:42:04 +00:00
adrian
95651f0cfe Import some HOWL (AR9130) related fixes from Atheros.
Obtained from:	Atheros
2011-05-05 02:59:31 +00:00
adrian
0b969d4438 Remove this useless bit of code for Kite. The RIFS register value is overriden
by the initvals, so disabling RIFS before calling writeIni() effectively does
nothing.
2011-05-04 09:26:33 +00:00