FEEDER_RATE_PRESET "OVERSAMPLING_FACTOR:X .. .." where
X = log2(oversampling factor).
- Lower down default filter oversampling factor from 128
(log2 = 7) to 32 (log2 = 5), saving worth of 80 Kb.
The use of better polynomial interpolator will raise
its conversion quality/accuracy to match (or slightly
better) with previous settings.
- Bump driver version.
coefficients quality:
- Linear interpolator for oversampling factor larger and equal
than 4096 (log2 = 12).
- Quadratic interpolator for oversampling factor larger and equal
than 256 (log2 = 8).
Default oversampling factor (128 ~ log2 = 7) will use OPT32X, which
provides better accuracy.
Characters between 0x07 and 0x0d are now also mapped, which means we can
display almost 256 different characters. Also remap certain types of
dashes and quotes, which means we can finally read our manual pages
without red question marks in them.
Submitted by: Christoph Mallon
of the DP83861 and DP83891.
- Reset the PHY during attach so it's in a known state.
- Add a comment describing why we hardwire 10baseT support in
the BMSR.
- Always explicitly set IFM_HDX for half-duplex. [1]
Obtained from: OpenBSD [1]
MFC after: 2 weeks
Add a small Unicode-to-CP437 remapping table to at least demonstrate
that the terminal emulator is perfectly capable of handling UTF-8. This
will of course break if the user loads a different font map, but it at
least allows people to give it a try.
I can now see the box drawing in dialog(1) and the arrows in mutt(1)
correctly.
so that it isn't exposured unless needed. In particular this means
that it's easier to tune the memory layout based on board details.
While here, remove inclusion of <machine/intr.h> from mvreg.h. This
also contains exposure to SoC specifics in MI drivers, because NIRQ
depends on the SoC.
in symtab_get method symtab parameter is made constant as this reflects
actual intention and usage of the method
Reviewed by: imp, current@
Approved by: jhb (mentor)
- Preallocate some memory for ACPI tasks early enough. We cannot use
malloc(9) any more because spin mutex may be held here. The reserved
memory can be tuned via debug.acpi.max_tasks tunable or ACPI_MAX_TASKS
in kernel configuration. The default is 32 tasks.
- Implement a custom taskqueue_fast to wrap the new memory allocation.
This implementation is not the fastest in the world but we are being
conservative here.
routine and save the resources using a chipset-data structure. Use these
preallocated resources to setup resources for the SATA channels to avoid
asking the PCI bus to allocate the same BAR multiple times.
Tested by: bms
MFC after: 1 week
controller. These controllers are also known as L1C(AR8131) and
L2C(AR8132) respectively. These controllers resembles the first
generation controller L1 but usage of different descriptor format
and new register mappings over L1 register space requires a new
driver. There are a couple of registers I still don't understand
but the driver seems to have no critical issues for performance and
stability. Currently alc(4) supports the following hardware
features.
o MSI
o TCP Segmentation offload
o Hardware VLAN tag insertion/stripping
o Tx/Rx interrupt moderation
o Hardware statistics counters(dev.alc.%d.stats)
o Jumbo frame
o WOL
AR8131/AR8132 also supports Tx checksum offloading but I disabled
it due to stability issues. I'm not sure this comes from broken
sample boards or hardware bugs. If you know your controller works
without problems you can still enable it. The controller has a
silicon bug for Rx checksum offloading, so the feature was not
implemented.
I'd like to say big thanks to Atheros. Atheros kindly sent sample
boards to me and answered several questions I had.
HW donated by: Atheros Communications, Inc.
driver should read updated status back after issuing a SCB command.
To send a command to controller and read updated status back,
driver should synchronize both memory read and write operations
with device. Fix bus_dmamap_sync operation specifier used in
fxp_dma_wait() by adding both memory read and memory write
operations.
a _BBN value of 0 if it was for the first bridge encountered since some
older systems returned _BBN of 0 for all bridges. However, some newer
systems enumerate bridges with non-zero _BBN before bus 0 which is
perfectly valid. Handle both cases by trusting the first bridge that has
a _BBN of 0 and falling back to reading from non-standard config registers
only for subsequent bridges with a _BBN of 0. We also only perform this
check for segment (domain) 0. We assume that _BBN is always correct
for segments other than 0.
Tested by: Josef Moellers josef.moellers at fujitsu
MFC after: 1 week
