Commit Graph

18 Commits

Author SHA1 Message Date
wma
505dcaf940 Setup decoding windows for ARMADA38X
It is necesarry to open memory windows on internal bus for
AHCI driver to work correctly.

Submitted by:          Konrad Adamczyk <ka@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           zbb
Differential revision: https://reviews.freebsd.org/D9220
2017-01-25 10:31:16 +00:00
zbb
b408dead16 Configure CPU window to second CESA SRAM
Check if there is a second CESA SRAM node in FDT and add a CPU window
for it. Define A38X specific macro for setting device attribute for
each node.

Submitted by:	Michal Stanek <mst@semihalf.com>
Obtained from:	Semihalf
Sponsored by:	Stormshield
Differential revision:	https://reviews.freebsd.org/D6216
2016-06-02 18:33:26 +00:00
wma
62eed3882c Add support for USB3.0 on Armada38x
This commit provides attachment of xhci-platform for A38X boards, making
it possible to mount FreeBSD world from USB3.0 flash. 'xhci' device was
added to files.mv (as optional) and kernconf of Armada38x was enhanced.

It was also necessary to open programmable memory windows of USB3.0.
fdt_win_setup needed improvement so it's able to traverse through
children of internal-regs node.

Submitted by:          Bartosz Szczepanek <bsz@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           hselasky
Approved by:           cognet (mentor)
Differential Revision: https://reviews.freebsd.org/D5031
2016-03-14 07:14:34 +00:00
zbb
5f6666ad92 Open window to bootROM memory on Armada38x to allow CPU1 to boot
CPU1 is halted in bootROM code while it is waiting to be released.
Memory window to bootROM must be opened before booting the core.

Obtained from:  Semihalf
Sponsored by:   Stormshield
Submitted by:   Michal Stanek <mst@semihalf.com>
Differential revision:  https://reviews.freebsd.org/D4425
2016-01-20 14:30:17 +00:00
zbb
5f54b51589 Correct MV_DDR_CADR_BASE definiton in mvwin.h
SOC_MV_ARMADAXP ifdef was enhanced with SOC_MV_ARMADA38X,
correcting MV_DDR_CADR_BASE definition. It fixes PCIe hangs issue.

Reviewed by:    andrew
Obtained from:  Semihalf
Sponsored by:   Stormshield
Submitted by:   Bartosz Szczepanek <bsz@semihalf.com>
Differential revision:  https://reviews.freebsd.org/D4380
2016-01-20 14:16:13 +00:00
zbb
81d332b3d1 Improve definitions of CPU/PCIe windows for Armada38x
Enhance existing ARMADAXP defines and introduce new MV_WIN_PCIE_
definitions.

Reviewed by:    andrew
Obtained from:  Semihalf
Sponsored by:   Stormshield
Submitted by:   Bartosz Szczepanek <bsz@semihalf.com>
Differential revision:  https://reviews.freebsd.org/D4378
2016-01-20 14:10:00 +00:00
zbb
62a64d8082 Set IO Sync Barrier flags for all Mbus devices on Armada38x
IO Sync Barrier setting is required for I/O coherency.

Reviewed by:   andrew, ian, imp
Obtained from: Semihalf
Sponsored by:  Stormshield
Submitted by:  Michal Stanek <mst@semihalf.com>
Differential revision:  https://reviews.freebsd.org/D4219
2016-01-20 13:53:33 +00:00
zbb
5c07389dae Introduce initial support for Marvell Armada38x
This commit introduces initial support for Marvell Armada38x platform.
Changes:
- Add common DTS files for Armada38x SoCs and DTS file for A388-GP
- Add ARMADA38X kernel configuration
- Add option SOC_MV_ARMADA38X and set MV_PCI_PORTS
- Add list of files to compile
- Implement get_tclk(), get_sar_value(), cpu_reset() functions
- Add CPU ID and SoC numbers
- Correct ifdefs in arm/mv/timer.c

Reviewed by:    ian, imp
Obtained from:  Semihalf
Sponsored by:   Stormshield
Submitted by:   Michal Stanek <mst@semihalf.com>
Differential revision:  https://reviews.freebsd.org/D4210
2016-01-20 13:14:36 +00:00
gber
ff5f520f78 Disable decoding windows with no FDT entry.
- On ARMADAXP B0 (GP development board) we are not able to use PCI due to
   whole 32-bit address space used by 4GB of RAM memory.
- Change is required to destroy unnecessary window to free address space
   for PCI and other devices
- Fix offset value for SDRAM decoding windows

Obtained from:	Semihalf
2013-05-06 14:54:17 +00:00
gber
8ead7d44b7 Move initialization of CESA decoding windows from common section
to driver specific files.

- window initialization is done during device attach
- CESA TDMA decoding windows values are set based on DTS,
 not copied from CPU registers
- remove unnecessary virtual mapping
- update dts file

Obtained from: Semihalf
2013-05-06 13:34:36 +00:00
gber
86376c6aa8 pci: Implement new memory and io space allocator for PCI.
Cleanup code and move initializing bridge into separate function.
Add checking of PCI mode (RC or endpoint).

Obtained from:	Semihalf
2012-09-14 09:57:41 +00:00
gber
f105bdc7f3 Add support for Armada XP A0.
- Add functions to calculate clocks instead using hardcoded values
- Update reset and timers functions
- Update number of interrupts
- Change name of platform from db88f78100 to db78460
- Correct DRAM size and PCI IRQ routing in dts file.

Obtained from:	Semihalf
2012-09-14 09:55:19 +00:00
gonzo
8b8633cc98 Merging of projects/armv6, part 7
Add Marvell ARMADA XP support

Obtained from:	Marvell, Semihalf
2012-08-15 05:15:49 +00:00
imp
57c7689947 Trim trailing whitespace... 2012-06-13 04:59:00 +00:00
gber
7e0300ab96 Add architecture dependent code to support NAND Framework on Marvell SoCs.
Obtained from: Semihalf
Supported by:  FreeBSD Foundation, Juniper Networks
2012-05-18 14:41:14 +00:00
raj
48f2ce50e5 Convert Marvell ARM platforms to FDT convention.
The following systems are involved:

  - DB-88F5182
  - DB-88F5281
  - DB-88F6281
  - DB-78100
  - SheevaPlug

This overhaul covers the following major changes:

  - All integrated peripherals drivers for Marvell ARM SoC, which are
    currently in the FreeBSD source tree are reworked and adjusted so they
    derive config data out of the device tree blob (instead of hard coded /
    tabelarized values).

  - Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say
    good by to obio / mbus drivers and numerous hard-coded config data.

Note that world needs to be built WITH_FDT for the affected platforms.

Reviewed by:	imp
Sponsored by:	The FreeBSD Foundation.
2010-06-13 13:28:53 +00:00
raj
2ee270938d Enable all populated TWSI (I2C) controllers on Marvell SOCs.
Obtained from:	Semihalf
2009-06-25 10:03:51 +00:00
marcel
2c1e7a89ea Move the memory layout definitions and logic from mvreg.h to mvwin.h
so that it isn't exposured unless needed. In particular this means
that it's easier to tune the memory layout based on board details.
While here, remove inclusion of <machine/intr.h> from mvreg.h. This
also contains exposure to SoC specifics in MI drivers, because NIRQ
depends on the SoC.
2009-06-12 20:00:38 +00:00