12 Commits

Author SHA1 Message Date
yongari
d606e39dd9 Free entire mbuf chain instead of the first mbuf. 2010-05-04 21:23:59 +00:00
yongari
f6cb7b4ffb Enable multi-descriptor transmisstion for fragmented mbufs. There
is no more need to defragment mbufs. After transmitting the
multi-fragmented frame, the controller updates only the first
descriptor of multi-descriptor transmission so it's driver's
responsibility to clear OWN bits of remaining descriptor of
multi-descriptor transmission. It seems the controller behaves much
like jme(4) controllers in descriptor handling.

Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-05-04 19:04:51 +00:00
yongari
551564c95b Remove clearing RxHashTable2 register. The register is reprogrammed
in sge_rxfilter().
2010-05-04 17:34:00 +00:00
yongari
46340f0793 Fix wrong dma tag usage. Previously it used TX descriptor ring dma
tag which should be TX mbuf dma tag.

Reported by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-05-03 00:56:26 +00:00
yongari
1294f271f5 Enable VLAN hardware tag insertion/stripping. Due to lack of SiS190
controller, I'm not sure whether this is also applicable to SiS190
so this feature is only activated on SiS191 controller.
In theory, controller reinitialization is not needed when VLAN tag
configuration is changed, but xclin said controller was not stable
whenever toggling VLAN tag bit. To address that, sge(4)
reinitialize controller for VLAN configuration which seems to work
as expected. VLAN tag information for TX/RX descriptor and
configure bit of RxMacControl register was found by xclin.

Submitted by:	xclin <xclin <> cs dot nctu dot edu dot tw > (initial version)
Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-29 18:14:14 +00:00
yongari
a570282110 Enable FCS stripping and padding 10 bytes bit of RX MAC control
register. Due to lack of SiS190 controller, I'm not sure whether
this is also applicable to SiS190 so this feature is only activated
on SiS191 controller.
The controller can pad 10 bytes before DMAing a received frame to
RX buffer and received bytes include the padded bytes. This padding
is very useful on strict-alignment architectures because driver
does not have to copy received frame to align IP header on 4 bytes
boundary. It also gives better RX performance on non-strict
alignment architectures. Special thanks to xclin to give me
valuable register information. Without his enthusiastic trial and
errors this wouldn't be even possible.

While I'm here tighten validity check of received frame. Controller
clears RDS_CRCOK bit when it received bad CRC frames. xclin found
that using loop back testing.

Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-29 18:00:42 +00:00
yongari
76cab47064 Explicitly marks SiS190 to differentiate it from SiS191. 2010-04-29 17:34:01 +00:00
yongari
6bf8e888ec Remove wrong link state chage. 2010-04-29 17:30:21 +00:00
yongari
a246ed9355 Preserve unknown bits of RX MAC control register when driver
programs RX filter configuration. It seems RX MAC control register
is one of key registers to get various offloading features as well
as performance. Blindly clearing unrelated bits can result in
unexpected results.

Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-29 17:28:07 +00:00
yongari
12f4256ae1 Intialize interrupt moderation control register. The magic value
was chosen by lots of trial and errors. The chosen value shows
good interrupt moderation without additional latency.
Without this change, controller can generate more than 140k
interrupts per second under high network load.

Submitted by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-22 20:25:07 +00:00
yongari
01ef7192f8 Fix include path. 2010-04-15 17:24:21 +00:00
yongari
04d9731c75 Add driver for Silicon Integrated Systems SiS190/191 Fast/Gigabit Ethernet.
This driver was written by Alexander Pohoyda and greatly enhanced
by Nikolay Denev. I don't have these hardwares but this driver was
tested by Nikolay Denev and xclin.

Because SiS didn't release data sheet for this controller, programming
information came from Linux driver and OpenSolaris. Unlike other open
source driver for SiS190/191, sge(4) takes full advantage of TX/RX
checksum offloading and does not require additional copy operation in
RX handler.
The controller seems to have advanced offloading features like VLAN
hardware tag insertion/stripping, TCP segmentation offload(TSO) as
well as jumbo frame support but these features are not available
yet. Special thanks to xclin <xclin<> cs dot nctu dot edu dot tw>
who sent fix for receiving VLAN oversized frames.
2010-04-14 20:45:33 +00:00