Commit Graph

279 Commits

Author SHA1 Message Date
Hans Petter Selasky
dfe11c1395 Enable host controller interrupts.
Sponsored by:	DARPA, AFRL
2014-05-16 16:36:07 +00:00
Hans Petter Selasky
56a052ffdd Remove old files.
Sponsored by:	DARPA, AFRL
2014-05-16 15:53:47 +00:00
Hans Petter Selasky
4327a6c8c6 Fix a compile warning about unused variable.
Sponsored by:	DARPA, AFRL
2014-05-16 15:53:14 +00:00
Hans Petter Selasky
f46e2f146b Rename "saf1761_dci_xxx" into "saf1761_otg_xxx" to reflect that this
driver supports both host and device side mode.

Sponsored by:	DARPA, AFRL
2014-05-16 15:50:21 +00:00
Hans Petter Selasky
2550c55ed3 Implement basic support for the USB host controller found in the
SAF1761 chip, supporting BULK and CONTROL endpoints. This code is not
yet tested.

Sponsored by:	DARPA, AFRL
2014-05-16 15:41:55 +00:00
Hans Petter Selasky
39c913fb21 - Allow the SAF1761 driver to attach to the root HUB USB driver.
Sponsored by:	DARPA, AFRL
2014-05-16 10:37:25 +00:00
Hans Petter Selasky
fffa71cbfe - Add flattended device tree probe-, attach- and detach code for the
SAF1761 driver, compatible to existing Linux based FDT tables for the
same hardware.

Sponsored by:	DARPA, AFRL
2014-05-16 10:35:21 +00:00
Hans Petter Selasky
a673f4c22b - Correct some programming details for the SAF1761 driver.
- Add some more register details.

Sponsored by:	DARPA, AFRL
2014-05-16 10:30:30 +00:00
Hans Petter Selasky
b9f21c2ce8 Implement USB device side driver code for SAF1761 and compatible
chips, based on datasheet and existing USS820 DCI driver. This code is
not yet tested.

Sponsored by:	DARPA, AFRL
2014-05-14 17:04:02 +00:00
Hans Petter Selasky
f5bf22f3b5 Disable configuration of the host frame interval register until
further, hence it breaks USB support on some non-RPI platforms.
2014-05-14 11:32:15 +00:00
Hans Petter Selasky
40ba168d27 - Isochronous transfers should use the alternate next transfer
descriptor upon receiving a short packet, in host and device mode.
- Correct some comments.
2014-05-13 13:46:38 +00:00
Hans Petter Selasky
1d6b6e9d46 Create driver file templates, kernel module Makefile and add initial
version of register definitions for ISP1761 and SAF1761 compatible
chips.

Sponsored by:	DARPA, AFRL
2014-05-12 09:05:07 +00:00
Hans Petter Selasky
4541f27356 Optimise host mode data roundtrip time. When BULK data is submitted to
the main processing queue, clear the NAK counter for any associated
BULK or CONTROL transfers and poll the endpoint(s) for 1 millisecond
at 125us rate interval, before going into slow, 10ms, NAK polling mode
again.  This has the effect that typical ping-ping protocols respond
quicker when initiated from the USB host.

MFC after:	2 weeks
2014-05-11 08:17:46 +00:00
Hans Petter Selasky
e2192fdfc6 Optimise host channel disabling:
- For non-periodic traffic we only need to wait two SOFs before
disabling the channel.
- Make sure we release the TX FIFO tracking level after the host
channel is disabled.
- Make sure the host channel state gets reset/disabled initially.
- Two minor code style changes.

MFC after:	2 weeks
2014-05-10 07:37:32 +00:00
Hans Petter Selasky
897b7965df Fix a regression issue:
- ACK can be received before data arrives in RX FIFO. Handle this.
- Remove obsolete comment.
- Some minor code styling.

MFC after:	2 weeks
2014-05-09 16:40:41 +00:00
Hans Petter Selasky
db4300da10 Multiple DWC OTG host mode related fixes and improvements:
- Rework how we allocate and free USB host channels, so that we only
allocate a channel if there is a real packet going out on the USB
cable.

- Use BULK type for control data and status, due to instabilities in
the HW it appears.

- Split FIFO TX levels into one for the periodic FIFO and one for the
non-periodic FIFO.

- Use correct HFNUM mask when scheduling host transactions. The HFNUM
register does not count the full 16-bit range.

- Correct START/COMPLETION slot for TT transactions. For INTERRUPT and
ISOCHRONOUS type transactions the hardware always respects the ODDFRM
bit, which means we need to allocate multiple host channels when
processing such endpoints, to not miss any so-called complete split
opportunities.

- When doing ISOCHRONOUS OUT transfers through a TT send all data
payload in a single ALL-burst. This deacreases the likelyhood for
isochronous data underruns.

- Fixed unbalanced unlock in case of "dwc_otg_init_fifo()" failure.

- Increase interrupt priority.

MFC after:	2 weeks
2014-05-09 14:23:06 +00:00
Hans Petter Selasky
42fabcc35c Reduce the number of interrupts in USB host mode for the DWC OTG
controller driver by piggybacking the SOF interrupt when issuing new
and checking old transfers. Number of interrupts was reduced by 30%
when doing Isochronous transfers.

Use correct GINTMSK_XXX macros when accessing the DWC OTG interrupt
mask register.

Add code to adjust the frame interval register which influences the
SOF rate.

MFC after:	2 weeks
2014-05-06 09:12:32 +00:00
Hans Petter Selasky
bc99048296 Improve DWC OTG USB host side support for isochronous FULL and HIGH
speed data traffic going directly to a USB device or through a
so-called USB transaction translator.

Add checks that we are not overusing the TX FIFO.

MFC after:	2 weeks
2014-05-05 11:50:52 +00:00
Hans Petter Selasky
8237c62b5d Setting the IMOD value below 0x3F8 can cause IRQ lockups in the Intel
LynxPoint USB 3.0 controllers found in MacBookPro 2013's.

MFC after:	2 days
Tested by:	Huang Wen Hui <huanghwh@gmail.com>
2014-04-27 15:41:44 +00:00
Ian Lepore
a7fa939bb3 Stop calling imx51_ccm_foo() clock functions from imx6 code. Instead
define a few imx_ccm_foo() functions that are implemented by the imx51 or
imx6 ccm code.  Of course, the imx6 ccm code is still more a wish than
reality, so for now its implementations just return hard-coded numbers.
2014-04-26 16:48:09 +00:00
Hans Petter Selasky
491d5d0577 Add support for specifying USB controller mode via FDT.
Add FDT support to the DWC OTG kernel module.

Submitted by:	John Wehle <john@feith.com>
PR:		usb/188683
MFC after:	1 week
2014-04-18 08:31:55 +00:00
Hans Petter Selasky
67eb1bdac2 Correct IMOD default value according to comment.
Reported by:	Daniel O'Connor <doconnor@gsoft.com.au>
MFC after:	1 week
2014-04-11 08:25:54 +00:00
Hans Petter Selasky
a955cde712 Fix for infinite XHCI reset loops when the set address USB request fails.
MFC after:	2 days
2014-04-09 06:27:04 +00:00
Warner Losh
c04f8bc023 Add device and gadget bindings for fdt. These are preliminary and will
need work before they work, especially the gadget bindings.
2014-02-28 03:00:31 +00:00
Dimitry Andric
ea7f47f524 In sys/dev/usb/controller/uss820dci.c, similar to r261977, fix a warning
about uss820dci_odevd being unused, by adding it to the part that
handles getting descriptors.

Reported by:	loos
Reviewed by:	hselasky
MFC after:	3 days
2014-02-17 20:08:11 +00:00
Hans Petter Selasky
77bea00c5e Add new PCI ID for hardware which needs port routing for USB 3.0.
PR:		usb/186811
MFC after:	1 week
Submitted by:	Philipp Maechler <philipp.maechler@mamo.li>
2014-02-16 14:37:23 +00:00
Dimitry Andric
bc28228951 In sys/dev/usb/controller/musb_otg.c, fix a warning about musbotg_odevd
being unused, by adding it to the part that handles getting descriptors.

Reviewed by:	hselasky
MFC after:	3 days
2014-02-16 12:41:57 +00:00
Hans Petter Selasky
c4a1e93fa6 Fix minor logical error in the XHCI driver. Set correct SETUP packet
direction value.

MFC after:	2 days
Reported by:	Horse Ma <HMa@wyse.com>
2014-02-14 07:17:36 +00:00
Hans Petter Selasky
4a6af12570 Issue doorbell twice before finally freeing the DMA descriptors. This
should fix DMA descriptor caching issues seen with the EHCI controller
found in Google Chromebook C720 during removal and insertion of USB
devices.

MFC after:	1 week
Reported by:	Matthew Dillon at DragonFlyBSD
2014-02-12 08:04:38 +00:00
Warner Losh
6efc5b1db6 Remove FreeBSD 6 support 2014-02-08 04:29:36 +00:00
Ian Lepore
add35ed5b8 Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.

Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352.  Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.

Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
2014-02-02 19:17:28 +00:00
Hans Petter Selasky
3448548027 Wait a bit more before we free any EHCI DMA descriptors. Some USB
controllers need more time than others.

MFC after:	1 week
2014-01-22 07:32:55 +00:00
Hans Petter Selasky
a148d44fb5 Separate I/O errors from reception of STALL PID.
MFC after:	1 week
2014-01-13 15:06:03 +00:00
Hans Petter Selasky
9ae7f7c13c Make sure reserved fields of the EHCI DMA descriptors are not dirty
after previous transfers.

MFC after:	1 week
2014-01-12 13:16:25 +00:00
Hans Petter Selasky
67fd1a8fb6 Optimise interrupt logic. Technically writing a zero to the XHCI USB
status register has no effect. Can happen when the interrupt vector is
shared.

MFC after:	1 week
2014-01-11 08:16:31 +00:00
Hans Petter Selasky
13156a5241 Force clearing of event ring interrupts. The "Intel Lynx Point" XHCI
controller found in the MBP2013 has been observed to not work properly
unless this operation is performed.

MFC after:	1 week
Tested by:	Huang Wen Hui <huanghwh@gmail.com>
2014-01-11 08:10:01 +00:00
Hans Petter Selasky
d08bc9e548 Check the XHCI event ring regardless of the XHCI status register
value. The "Intel Lynx Point" XHCI controller found in the MBP2013 has
been observed to not always set the event interrupt bit while there
are events to consume in the event ring.

MFC after:	1 week
Tested by:	Huang Wen Hui <huanghwh@gmail.com>
2014-01-07 09:52:26 +00:00
Hans Petter Selasky
682d7ab884 Minor correction for the XHCI reset logic.
MFC after:	1 week
Found by:	Horse Ma <HMa@wyse.com>
2014-01-02 08:02:57 +00:00
Hans Petter Selasky
6f0468df7a Fix regression issue after r259248:
Some Intel XHCI controlles timeout processing so-called "TRBs" when
the final LINK TRB of a so-called "TD" has the CHAIN-BIT set.

MFC after:	1 week
Tested by:	glebius @
2013-12-16 10:50:13 +00:00
Hans Petter Selasky
27ce2fd67c Set chain bit correctly. This will fix some problems sending and
receiving Zero Length Packets, ZLPs. See comment in code for more
information.

MFC after:	1 week
Reported by:	Kohji Okuno <okuno.kohji@jp.panasonic.com>
2013-12-12 08:34:51 +00:00
Hans Petter Selasky
e892b3fe36 USB method structures for USB controllers and USB pipes should be
constant and does not need to be modified. This also saves a small
amount of RAM.
2013-12-11 13:20:32 +00:00
Hans Petter Selasky
468f354b0e Fix typos.
Found by:	remko
2013-12-08 06:52:22 +00:00
Hans Petter Selasky
563ab08139 Improve the XHCI command timeout recovery handling code.
MFC after:	1 week
2013-12-06 08:42:41 +00:00
Eitan Adler
7a22215c53 Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit.  Instead use (1U << 31) which gets the
expected result.

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Discussed with:	-arch, rdivacky
Reviewed by:	cperciva
2013-11-30 22:17:27 +00:00
Hans Petter Selasky
5c0f828a07 Comply to the XHCI specification. Certain input context fields should
always be zero.

MFC after:	1 week
2013-11-25 10:58:02 +00:00
Alexander Motin
eda36fb4f5 Add some more IDs for Intel ATA, AHCI and USB controllers. 2013-11-15 10:28:59 +00:00
Hans Petter Selasky
7815365774 Add description of two EHCI PCI IDs.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
2013-11-03 21:33:42 +00:00
Ian Lepore
f26c810514 Rework the imx ehci driver so that it's four separate ehci units rather
than one unit with four busses attached to it.  This allows us to use
existing fdt data which describes separate devices with separate resources.
It also allows any combination of the units to be en/disabled in the
board dts files.

Adjust our dts code to match what's used by linux and u-boot now that
we're structured to do so.

Document lots of interesting stuff learned whiling doing this with a big
comment block in the driver, so I don't have to re-learn it for the next
round of changes.
2013-10-30 18:26:18 +00:00
Ganbold Tsagaankhuu
8f011d4075 Move and rename dwc otg driver to more
generic one as it appears to work
for rk3188 SoC based board too.

No objections from: hselasky@
Reviewed by: ray@
2013-10-21 09:34:04 +00:00
Hans Petter Selasky
2c452d7400 Improve XHCI stability. When a command timeout happens, the command
should be aborted else the command queue can stop. Refer to section
"4.6.1.2" of the XHCI specification.

MFC after:	1 week
2013-10-18 17:38:57 +00:00