controllers. Reading this register, for which there are indications
that it doesn't really exist, returns 0 on at least some 12160
and doing so on Sun Fire V880 causes a data access error exception.
Reported and tested by: Beat Gaetzi
Approved by: mjacob
Obtained from: OpenBSD (modulo setting isp_lvdmode)
the code for parsing interrupt maps) to PowerPC and reflect their new MI
status by moving them to the shared dev/ofw directory.
This commit also modifies the OFW PCI enumeration procedure on PowerPC to
allow the bus to find non-firmware-enumerated devices that Apple likes to add,
and adds some useful Open Firmware properties (compat and name) to the pnpinfo
string of children on OFW SBus, EBus, PCI, and MacIO links. Because of the
change to PCI enumeration on PowerPC, X has started working again on PPC
machines with Grackle hostbridges.
Reviewed by: marius
Obtained from: sparc64
1. separating L2 tables (ARP, NDP) from the L3 routing tables
2. removing as much locking dependencies among these layers as
possible to allow for some parallelism in the search operations
3. simplify the logic in the routing code,
The most notable end result is the obsolescent of the route
cloning (RTF_CLONING) concept, which translated into code reduction
in both IPv4 ARP and IPv6 NDP related modules, and size reduction in
struct rtentry{}. The change in design obsoletes the semantics of
RTF_CLONING, RTF_WASCLONE and RTF_LLINFO routing flags. The userland
applications such as "arp" and "ndp" have been modified to reflect
those changes. The output from "netstat -r" shows only the routing
entries.
Quite a few developers have contributed to this project in the
past: Glebius Smirnoff, Luigi Rizzo, Alessandro Cerri, and
Andre Oppermann. And most recently:
- Kip Macy revised the locking code completely, thus completing
the last piece of the puzzle, Kip has also been conducting
active functional testing
- Sam Leffler has helped me improving/refactoring the code, and
provided valuable reviews
- Julian Elischer setup the perforce tree for me and has helped
me maintaining that branch before the svn conversion
time it is marked for user space callchain capture in the NMI
handler and the time the callchain capture callback runs.
- Improve code and control flow clarity by invoking hwpmc(4)'s user
space callchain capture callback directly from low-level code.
Reviewed by: jhb (kern/subr_trap.c)
Testing (various patch revisions): gnn,
Fabien Thomas <fabien dot thomas at netasq dot com>,
Artem Belevich <artemb at gmail dot com>
if (batt_sleep_ms)
AcpiOsSleep(1);
where the rest are all:
if (batt_sleep_ms)
AcpiOsSleep(batt_sleep_ms);
I can't recall why that one was different, so change it
to match the rest.
Pointed out by: Christoph Mallon
MFC after: 2 weeks
On some laptops with smart batteries, enabling battery monitoring
software causes keystrokes from atkbd to be lost. This has also been
reported on Linux, and is apparently due to the keyboard and I2C line
for the battery being routed through the same chip. Whether that's
accurate or not, adding extra sleeps to the status checking code
causes the problem to go away.
I've been running this for nearly six months now on my laptop,
it works like a charm.
Reviewed by: Nate Lawson (in a previous revision)
MFC after: 2 weeks
o Try to be smarter about reading the ExCA CSC register. Now, we only
do it for 16-bit cards. Add some experimental code to treat it like
a power interrupt, but I'm not 100% sure that I like it. It may be
removed upon further testing. It seemed to help in one test case, but
the evidence may be inconclusive. This may be beneficial for cleaning up
exca_reset and exca_wait_ready.
o Check for CSTS events on the socket event register. We ask for it when
we're powering up a card, but I don't think we're otherwise using
it. Just ACK the interrupt for now. In theory, we can use it
instead of the busy wait we do in cbb_cardbus_reset. More research
is necessary to see if we can optimize things there when we're
waiting for the DEVVENDOR register to become valid.
o Rework the comments a bit. Minor tidying up. Etc.
causes data corruption in combination with certain bridges.
Information about this problem was kindly provided by davidch. [1]
- As BGE_FLAG_PCIX is meant to indicate that the controller is in
PCI-X mode, revert to the pre __FreeBSD_version 602101 method of
reading the bus mode register rather than checking the mere
existence of a PCI-X capability, which is also there when the
NIC f.e. is put into a 32-bit slot causing it not to be in PCI-X
mode. Setting BGE_FLAG_PCIX inappropriately could cause the NIC
to be tuned incorrectly.
PR: 128833 [1]
Reviewed by: jhb
MFC after: 3 days
When VLAN tagged frame is received the hardware sets 'LONG' bit of
Rx status word. It is always set when the size of received frame
exceeded 1518 bytes, including CRC. This VLAN tagged frame clears
'OK' bit of Rx status word such that driver should not rely on 'OK'
bit of Rx status word to pass the VLAN tagged frame to upper stack.
To fix the bug, don't use SIS_CMDSTS_PKT_OK for Rx error check and
introduce SIS_RXSTAT_ERROR macro that checks Rx errors. If we are
configured to accept VLAN tagged frames and the received frame size
is less than or equal to maximum allowed length of VLAN tagged
frame, clear 'LONG' bit of Rx status word before checking Rx
errors.
Reported by: Vladimir Ermako < samflanker <> gmail DOT com >
Tested by: Vladimir Ermako < samflanker <> gmail DOT com >
Waiting for 1ms for each GMII register access looks overkill and it
may also decrease overall performance of driver because re(4)
invokes mii_tick for every hz.
Tested by: rpaulo
established a valid link or not. In miibus_statchg handler add a
check for established link is valid one for the controller(e.g.
1000baseT is not a valid link for fastethernet controllers.)
o Added a flag RE_FLAG_FASTETHER to mark fastethernet controllers.
o Added additional check to know whether we've really encountered
watchdog timeouts or missed Tx completion interrupts. This change
may help to track down the cause of watchdog timeouts.
o In interrupt handler, removed a check for link state change
interrupt. Not all controllers have the bit and re(4) did not
rely on the event for a long time. In addition, re(4) didn't
request the interrupt in RL_IMR register.
Tested by: rpaulo
drivers, there should be a 1us delay after every write when
bit-banging the MII. Also insert barriers in order to ensure
the intended ordering. These changes hopefully will solve the
bus wedging occasionally experienced with DM9102A since r182461.
- Deobfuscate dc_mii_readreg() a bit.
