Commit Graph

19 Commits

Author SHA1 Message Date
jhb
018ecd0b32 Forgot to remove unlock of the driver lock from age_start_locked() when
converting it to a locked variant.

PR:		kern/153948
2011-01-13 13:04:49 +00:00
jhb
be4690f32e Add a 'locked' variant of the foo_start() routine and call it directly
from interrupt handlers and watchdog routines instead of queueing a task
to call foo_start().

Reviewed by:	yongari
MFC after:	1 month
2011-01-03 18:28:30 +00:00
marius
385153aa98 Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
2010-10-15 14:52:11 +00:00
yongari
92023f4cc9 Make sure to not use stale ip/tcp header pointers. The ip/tcp
header parser uses m_pullup(9) to get access to mbuf chain.
m_pullup(9) can allocate new mbuf chain and free old one if the
space left in the mbuf chain is not enough to hold requested
contiguous bytes. Previously drivers can use stale ip/tcp header
pointer if m_pullup(9) returned new mbuf chain.

Reported by:	Andrew Boyer (aboyer <> averesystems dot com)
MFC after:	10 days
2010-10-14 18:31:40 +00:00
yongari
86e44bf444 Remove unnecessary controller reinitialization.
PR:	kern/87506
2010-08-24 19:41:15 +00:00
yongari
66db61c8c0 With r206844, CSUM_TCP is also set for CSUM_TSO case. Modify
drivers to take into account for the change. Basically CSUM_TSO
should be checked before checking CSUM_TCP.
2010-04-19 22:10:40 +00:00
yongari
a924508d55 Add TSO support on VLANs. While I'm here remove unnecessary check
of VLAN hardware checksum offloading. vlan(4) already takes care of
this.
2010-02-26 22:43:23 +00:00
yongari
b9dd684580 Fix multicast handling. All Atheros controllers use big-endian form
in computing multicast hash.

PR:	kern/139137
2009-09-29 23:03:16 +00:00
rwatson
be5740a255 Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs.  This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.

For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.

Approved by:	re (kib)
MFC after:	6 weeks
2009-06-26 11:45:06 +00:00
yongari
a457681b2d pci(4) handles PCIM_CMD_INTxDIS so there is no need to poke this
bit in driver.
2009-05-20 03:33:27 +00:00
yongari
b702ca48cf o Don't access VPD even if hardware advertised the capability.
It seems that some revision of controller hang while accessing
  the VPD. Because VPD access routine are unused, nuke it.
o Let TWSI reload EEPROM if VPD capability is detected. Reloading
  EEPROM will also set ethernet address so age(4) now reads AGE_PAR0
  and AGE_PAR1 register to get ethernet address. This removes a lot
  of hack and enhance readability a lot.
o Double PHY reset timeout as it takes more time to take PHY out of
  power-saving state.
o Explicitly check power-saving state by checking undocumented PHY
  registers. If link is not up, poke undocumented registers to take
  PHY out of power-saving state. This is the same way what Linux
  does. On resume, make sure to wake up PHY.
o Don't rely on auto-clearing feature of master reset bit, just wait
  1ms and check idle status of MAC.
o Add PCI device revision information in bootverbose mode.
This should fix occasional controller hang in device attach phase.

Reported by:	barbara < barbara.xxx1975 at libero DOT it >
Tested by:	barbara < barbara.xxx1975 at libero DOT it >
2009-03-28 07:39:35 +00:00
yongari
f128d57f70 Fix inversed logic. pci_find_extcap() returns 0 when it finds
specified capability.
2009-03-23 00:27:46 +00:00
yongari
41e01818b6 Remove informational messages left. These messages were intended to
show up in verbose boot mode.

Reported by:	pluknet ( pluknet<> gmail DOT com )
2008-11-07 07:02:28 +00:00
kevlo
686524f8ab Remove unused age_txdq 2008-10-21 03:18:02 +00:00
kevlo
92f71ae8f1 No need to sync descriptors twice in age_rxintr() 2008-10-21 03:16:50 +00:00
kevlo
088a5c65f8 Fix a typo: jme -> age 2008-08-14 02:43:18 +00:00
yongari
065c59620f Use DELAY() instead of pause if waiting time is less than 1ms.
This will fix driver hang if hz < 1000.

Pointed out by:	thompsa
2008-07-18 01:00:54 +00:00
rpaulo
c482e7889a Fix typo in comment. 2008-06-08 14:42:43 +00:00
yongari
af582dfcb7 Add age(4), a driver for Attansic/Atheros L1 gigabit ethernet
controller. L1 has several threshold/timer registers and they
seem to require careful tuned parameters to get best
performance. Datasheet for L1 is not available to open source
driver writers so age(4) focus on stability and correctness of
basic Tx/Rx operation. ATM the performance of age(4) is far from
optimal which in turn means there are mis-programmed registers or
incorrectly configured registers.
Currently age(4) supports all known hardware assistance including
  - MSI support.
  - TCP Segmentation Offload.
  - Hardware VLAN tag insertion/stripping.
  - TCP/UDP checksum offload.
  - Interrupt moderation.
  - Hardware statistics counter support.
  - Jumbo frame support.
  - WOL support.

L1 gigabit ethernet controller is mainly found on ASUS
motherboards. Note, it seems that there are other variants of
hardware as known as L2(Fast ethernet) and newer gigabit ethernet
(AR81xx) from Atheros. These are not supported by age(4) and
requires a seperate driver. Big thanks to all people who reported
feedback or tested patches.

Tested by:	kevlo, bsam, Francois Ranchin < fyr AT fyrou DOT net >
		Thomas Nystroem < thn AT saeab DOT se >
		Roman Pogosyan < asternetadmin AT gmail DOT com >
		Derek Tattersal < dlt AT mebtel DOT net >
		Oliver Seitz < karlkiste AT yahoo DOT com >
2008-05-19 01:39:59 +00:00