Commit Graph

14 Commits

Author SHA1 Message Date
marcel
175c41b86a In uart_bus_probe() return BUS_PROBE_DEFAULT when the probe is
successful.
2005-10-28 06:30:39 +00:00
marius
271a503969 - Allocate the interrupt resource as RF_SHAREABLE allowing uart(4) to work
with shared IRQs in case the bus code, MD interrupt code, etc. permits.
  Together with sys/sparc64/sparc64/intr_machdep.c rev. 1.21 this fixes
  an endless loop in uart_intr() when using the second NS16550 on the ISA
  bus of sparc64 machines.
- Destroy the hardware mutex on detach and in case attaching fails.

Approved by:	marcel
2005-03-02 11:30:14 +00:00
imp
4b319958e7 Start each of the license/copyright comments with /*-, minor shuffle of lines 2005-01-06 01:43:34 +00:00
marcel
e8dfdbc0d9 Add UART_IOCTL_BAUD to allow us to query the hardware about the
current baudrate setting. Use this ioctl() when we don't know the
baudrate of the sysdev (as represented by a 0 value). When the
ioctl() fails, e.g. when the backend hasn't implemented it or the
hardware doesn't provide the means to determine its current baudrate
setting, we invalidate the baudrate setting by setting it to -1.
None of the backends currently implement the new ioctl().
2004-11-14 23:12:14 +00:00
marcel
3351894f4f Update for the KDB framework:
o  Call kdb_enter() instead of breakpoint().
o  Call kdb_alt_break() instead of db_alt_break().
o  Make debugging code conditional upon KDB instead of DDB.
2004-07-10 21:16:01 +00:00
marcel
85b1b3e405 When the interrupt cannot be INTR_FAST, it still is INTR_MPSAFE.
Mark it as such.
2004-05-04 05:54:02 +00:00
njl
05a1f56fc9 Convert callers to the new bus_alloc_resource_any(9) API.
Submitted by:	Mark Santcroos <marks@ripe.net>
Reviewed by:	imp, dfr, bde
2004-03-17 17:50:55 +00:00
marcel
0653dc7b1b Revert the introduction of iobase in struct uart_bas. Both the SAB82532
and the Z8530 drivers used the I/O address as a quick and dirty way to
determine which channel they operated on, but formalizing this by
introducing iobase is not a solution. How for example would a driver
know which channel it controls for a multi-channel UART that only has a
single I/O range?

Instead, add an explicit field, called chan, to struct uart_bas that
holds the channel within a device, or 0 otherwise. The chan field is
initialized both by the system device probing (i.e. a system console)
or it is passed down to uart_bus_probe() by any of the bus front-ends.
As such, it impacts all platforms and bus drivers and makes it a rather
large commit.

Remove the use of iobase in uart_cpu_eqres() for pc98. It is expected
that platforms have the capability to compare tag and handle pairs for
equality; as to determine whether two pairs access the same device or
not. The use of iobase for pc98 makes it impossible to formalize this
and turn it into a real newbus function later. This commit reverts
uart_cpu_eqres() for pc98 to an unimplemented function. It has to be
reimplemented using only the tag and handle fields in struct uart_bas.

Rewrite the SAB82532 and Z8530 drivers to use the chan field in struct
uart_bas. Remove the IS_CHANNEL_A and IS_CHANNEL_B macros. We don't
need to abstract anything anymore.

Discussed with: nyan
Tested on: i386, ia64, sparc64
2003-09-26 05:14:56 +00:00
nyan
984aa4e064 Initialize iobase, bsh and bst. 2003-09-23 09:55:21 +00:00
nyan
5ff63b94e0 - Keep the base address in struct uart_bas for sab82532 and z8530 modules.
- Remove buggy uart_cpu_busaddr() function.
2003-09-23 09:25:38 +00:00
marcel
920cfd2329 In uart_intr() loop until all interrupts have been handled. Previously
an UART interface could get stuck when a new interrupt condition
arose while servicing a previous interrupt. Since an interrupt was
already pending, no new interrupt would be triggered.

Avoid infinite recursion by flushing the Rx FIFO and marking an
overrun condition when we could not move the data from the Rx
FIFO to the receive buffer in toto. Failure to flush the Rx FIFO
would leave the Rx ready condition pending.

Note that the SAB 82532 already did this due to the nature of the
chip.
2003-09-17 03:11:32 +00:00
marcel
96dbeb7199 Add locking to the hardware drivers. I intended to figure out more
precisely where locking would be needed before adding it, but it
seems uart(4) draws slightly too much attention to have it without
locking for too long.
The lock added is a spinlock that protects access to the underlying
hardware. As a first and obvious stab at this, each method of the
hardware interface grabs the lock. Roughly speaking this serializes
the methods. Exceptions are the probe, attach and detach methods.
2003-09-17 01:41:21 +00:00
marcel
49dd02f247 Add support for using uart(4) for pulse capturing for the Pulse Per
Second (PPS) timing interface. The support is non-optional and by
default uses the DCD line signal as the pulse input. A compile-time
option (UART_PPS_ON_CTS) can be used to have uart(4) use the CTS line
signal.

Include <sys/timepps.h> in uart_bus.h to avoid having to add the
inclusion of that header in all source files.

Reviewed by: phk
2003-09-11 23:06:42 +00:00
marcel
6efc7b093d The uart(4) driver is an universal driver for various UART hardware.
It improves on sio(4) in the following areas:
o  Fully newbusified to allow for memory mapped I/O. This is a must
   for ia64 and sparc64,
o  Machine dependent code to take full advantage of machine and firm-
   ware specific ways to define serial consoles and/or debug ports.
o  Hardware abstraction layer to allow the driver to be used with
   various UARTs, such as the well-known ns8250 family of UARTs, the
   Siemens sab82532 or the Zilog Z8530. This is especially important
   for pc98 and sparc64 where it's common to have different UARTs,
o  The notion of system devices to unkludge low-level consoles and
   remote gdb ports and provides the mechanics necessary to support
   the keyboard on sparc64 (which is UART based).
o  The notion of a kernel interface so that a UART can be tied to
   something other than the well-known TTY interface. This is needed
   on sparc64 to present the user with a device and ioctl handling
   suitable for a keyboard, but also allows us to cleanly hide an
   UART when used as a debug port.

Following is a list of features and bugs/flaws specific to the ns8250
family of UARTs as compared to their support in sio(4):
o  The uart(4) driver determines the FIFO size and automaticly takes
   advantages of larger FIFOs and/or additional features. Note that
   since I don't have sufficient access to 16[679]5x UARTs, hardware
   flow control has not been enabled. This is almost trivial to do,
   provided one can test. The downside of this is that broken UARTs
   are more likely to not work correctly with uart(4). The need for
   tunables or knobs may be large enough to warrant their creation.
o  The uart(4) driver does not share the same bumpy history as sio(4)
   and will therefore not provide the necessary hooks, tweaks, quirks
   or work-arounds to deal with once common hardware. To that extend,
   uart(4) supports a subset of the UARTs that sio(4) supports. The
   question before us is whether the subset is sufficient for current
   hardware.
o  There is no support for multiport UARTs in uart(4). The decision
   behind this is that uart(4) deals with one EIA RS232-C interface.
   Packaging of multiple interfaces in a single chip or on a single
   expansion board is beyond the scope of uart(4) and is now mostly
   left for puc(4) to deal with. Lack of hardware made it impossible
   to actually implement such a dependency other than is present for
   the dual channel SAB82532 and Z8350 SCCs.

The current list of missing features is:
o  No configuration capabilities. A set of tunables and sysctls is
   being worked out. There are likely not going to be any or much
   compile-time knobs. Such configuration does not fit well with
   current hardware.
o  No support for the PPS API. This is partly dependent on the
   ability to configure uart(4) and partly dependent on having
   sufficient information to implement it properly.

As usual, the manpage is present but lacks the attention the
software has gotten.
2003-09-06 23:13:47 +00:00