bug referencing a destroyed lock within TX callbacks during device
detach.
Submitted by: hps (original version)
Tested by: Lucius Windschuh <lwindschuh at googlemail.com>
shared uses of a resource are recorded on a sub-list hanging off
a main resource object on a main resource list;
without this change a shared resource (e.g. irq) is reported only
once by devinfo -r/-u;
with this change the resource is reported for each driver that
allocates it (which is even more than what vmstat -i -a reports).
Approved by: jhb (mentor)
Args argument is a pointer to the structure located in user space in
which the socketcall arguments are packed. The structure must be
copied to the kernel instead of direct dereferencing.
Approved by: kib (mentor)
MFC after: 1 week
net.inet.ip.fw.one_pass is a classic ip_input.c variable and is used in
the pfil and bridge code as well. As ipfw is loadable we need to always
provide it. That is the reason why it lives in struct vnet_inet and
not in struct vnet_ipfw.
machine check code. Disable it by default for now.
- When computing the mask of bits that determines a non-restartable event
during a machine check exception, or-in the overflow flag rather than
replacing the other flags.
PR: i386/134586 [2]
Submitted by: Andi Kleen andi-fbsd firstfloor.org
the NFSv4 Close operations until ncl_inactive(). This is
necessary so that the Open StateIDs are available for doing
I/O on mmap'd files after VOP_CLOSE(). I also changed some
indentation for the nfscl_getclose() function.
Approved by: kib (mentor)
possible future I-cache coherency operation can succeed. On ARM
for example the L1 cache can be (is) virtually mapped, which
means that any I/O that uses temporary mappings will not see the
I-cache made coherent. On ia64 a similar behaviour has been
observed. By flushing the D-cache, execution of binaries backed
by md(4) and/or NFS work reliably.
For Book-E (powerpc), execution over NFS exhibits SIGILL once in
a while as well, though cpu_flush_dcache() hasn't been implemented
yet.
Doing an explicit D-cache flush as part of the non-DMA based I/O
read operation eliminates the need to do it as part of the
I-cache coherency operation itself and as such avoids pessimizing
the DMA-based I/O read operations for which D-cache are already
flushed/invalidated. It also allows future optimizations whereby
the bcopy() followed by the D-cache flush can be integrated in a
single operation, which could be implemented using on-chips DMA
engines, by-passing the D-cache altogether.
register 0x52, not ctrl1. This appears to be a mistake in the bcm
reverse engineering page, and has been corrected there. Tracing
through the code, this is more in keeping with the "documented"
register. Sephe thinks it looks interesting and may be worth
fixing. :)
Submitted by: ddkprog at yahoo com
Reviewed by: Sepherosa Ziehau
affinity for the interrupt thread, and requesting that underlying
hardware direct interrupts to the CPU. For software interrupt
threads, implement a no-op interrupt event binder that returns
success, so that the interrupt management code will just set the
ithread's affinity and succeed.
Reviewed by: jhb
MFC after: 1 week
These sysctls don't need any form of locking. At least cp_times is used
by powerd very often, which means I get 50% less calls to non-MPSAFE
sysctls on my system. The other 50% is consumed by dev.cpu.0.freq, but
this seems to need Giant for Newbus.
-- A routing socket message is not generated when an IPv6 address is
either inserted or deleted from an interface. The missing routing
message problem was discovered by Randall Stewart and Michael Tuxen
during SCTP testing.
-- Previously when an IPv6 address is configured on an interface, if the
prefix length is /128, then a host route is instaleld in the kernel
for this address. But this host route is not deleted when that IPv6
address is removed from the interface.
-- Routes to the link-local all-nodes multicast address and the
interface-local all-nodes multicast address are not removed when
the last IPv6 address is removed from an interface.
Reviewed by: bz, gnn
- In bce_rx_intr(), use BUS_DMASYNC_POSTREAD instead of
BUS_DMASYNC_POSTWRITE, as we want to "read" from the
rx page chain pages.
- Document why we need to do PREWRITE after we have updated
the rx page chain pages.
- In bce_intr(), use BUS_DMASYNC_POSTREAD and
BUS_DMASYNC_PREREAD when before and after CPU "reading"
the status block.
- Adjust some nearby style mismatches/etc.
Pointed out by: yongari
Approved by: davidch (no objection) but bugs are mine :)
# Note: The driver doesn't support either these PHY types, so this is
# effectively a nop.
Submitted by: "ddk"
Obtained from: http://paradox.lissyara.su/bwi.diff
made LINT happy this does the proper looping over all vnets as we are
only called `globally' and not once per vnet instance.
Reported by: zec [1]
Missed by: bz [1] in r192264
Reviewed by: zec
believe it was a BCM4319. However, it is the a/b/g variation of the
BCM4318. The chip itself is labelled BCM4318EKFBG, and the board is
BCM94318MKABG.
Paradox's patch includes the type of 802.11 wireless for each card,
but changes all the names (I don't think the latter is quite right).
Import that part of the patch, but keep the current set of BCM names
(with a minor tweak for the 4306 ones). I'll need to verify them via
some other means.
Obtained from: http://paradox.lissyara.su/bwi.diff (partially)
Provide a more descriptive comment.
Eliminate dead code. The page cannot possibly have PG_ZERO set.
Eliminate unnecessary blank lines.
Reviewed by: tegge
