Commit Graph

8 Commits

Author SHA1 Message Date
nsouch
59fc142474 Port of ppbus standalone framework to the newbus system.
Note1: the correct interrupt level is invoked correctly for each driver.
       For this purpose, drivers request the bus before being able to
       call BUS_SETUP_INTR and BUS_TEARDOWN_INTR call is forced by the ppbus
       core when drivers release it. Thus, when BUS_SETUP_INTR is called
       at ppbus driver level, ppbus checks that the caller owns the
       bus and stores the interrupt handler cookie (in order to unregister
       it later).

       Printing is impossible while plip link is up is still TRUE.
       vpo (ZIP driver) and lpt are make in such a way that
       using the ZIP and printing concurrently is permitted is also TRUE.

Note2: specific chipset detection is not done by default. PPC_PROBE_CHIPSET
       is now needed to force chipset detection. If set, the flags 0x40
       still avoid detection at boot.

Port of the pcf(4) driver to the newbus system (was previously directly
connected to the rootbus and attached by a bogus pcf_isa_probe function).
2000-01-14 00:18:06 +00:00
peter
3b842d34e8 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
nsouch
3d95317df9 Fix compile warnings about missing braces around static initialization of unions. 1999-01-31 11:52:04 +00:00
nsouch
10ef2b8422 Distinguish EPP address/data register. Add EPP address register access to ppi.
Change microseq offsets. Previously, offsets of the program counter where
added to the index of the current microinstruction. Make them rely on the
index of the next executed microinstruction.

Suggested by: Luigi Rizzo <luigi@labinfo.iet.unipi.it>
1999-01-30 15:35:39 +00:00
dillon
a40e0249d4 Fix warnings in preparation for adding -Wall -Wcast-qual to the
kernel compile
1999-01-27 21:50:00 +00:00
nsouch
88ae26fef6 Major ppbus commit with:
+ ECP parallel port chipset FIFO detection
	+ DMA+FIFO parallel I/O handled as chipset specific
	+ nlpt updated in order to use the above enhanced parallel I/O.
	  Use 'lptcontrol -e' to use enhanced I/O
	+ Various options documented in LINT
	+ Full IEEE1284 NIBBLE and BYTE modes support. See ppbus(4) for
	  an overview of the IEEE1284 standard
	+ Detection of PnP parallel devices at boot
	+ Read capability added to nlpt driver to get IEEE1284 compliant
	  printer status with a simple 'cat /dev/lpt0'
	+ IEEE1284 peripheral emulation added to BYTE mode. Two computers
	  may dialog according to IEEE1284 signaling method.
	  See PERIPH_1284 option and /sys/dev/ppbus/ppi.c

All this code is supposed to provide basic functions for IEEE1284 programming.
ppi.c and nlpt.c may act as examples.
1999-01-10 12:04:56 +00:00
nsouch
5cc33ee728 ppbus enhanced to support ZIP+ : 1284 code added, microseq improved +
some bugs corrected in vpoio.
1998-09-13 18:26:26 +00:00
msmith
2fdb23234a Major ppbus updates from the author.
- ppbus now supports PLIP via the if_plip driver
 - ieee1284 infrastructure added, including parallel-port PnP
 - port microsequencer added, for scripting the sort of port I/O
   that is common with parallel devices without endless calls up and down
   through the driver structure.
 - improved bus ownership behaviour among the ppbus-using drivers.
 - improved I/O chipset feature detection

The vpo driver is now implemented using the microsequencer, leading to
some performance improvements as well as providing an extensive example
of its use.

Reviewed by:	msmith
Submitted by:	Nicolas Souchu <Nicolas.Souchu@prism.uvsq.fr>
1998-08-03 19:14:33 +00:00