Commit Graph

9 Commits

Author SHA1 Message Date
pfg
1537078d8f sys/dev: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 14:52:40 +00:00
yongari
cf97c1c989 Add a missing change in r304575.
Noticed by:	jhb
2016-08-22 03:28:06 +00:00
yongari
2e1d5c2b85 Add support for QAC AR816x/AR817x Gigabit/Fast Ethernet controllers.
These controllers seem to have the same feature of AR813x/AR815x and
improved RSS support(4 TX queues and 8 RX queues).  alc(4) supports
all hardware features except RSS.  I didn't implement RX checksum
offloading for AR816x/AR817x just because I couldn't get
confirmation from the Vendor whether AR816x/AR817x corrected its
predecessor's RX checksum offloading bug on fragmented packets.
This change adds supports for the following controllers.
 o AR8161 PCIe Gigabit Ethernet controller
 o AR8162 PCIe Fast Ethernet controller
 o AR8171 PCIe Gigabit Ethernet controller
 o AR8172 PCIe Fast Ethernet controller
 o Killer E2200 Gigabit Ethernet controller

Tested by:	Many
Relnotes:	yes
MFC after:	2 weeks
HW donated by:	Qualcomm Atheros Communications, Inc.
2014-10-08 05:47:01 +00:00
yongari
e1b5ce307a Increase the number of TX DMA segments from 32 to 35. It turned
out 32 is not enough to support a full sized TSO packet.
While I'm here fix a long standing bug introduced in r169632 in
bce(4) where it didn't include L2 header length of TSO packet in
the maximum DMA segment size calculation.

In collaboration with:	rmacklem
MFC after:		2 weeks
2014-03-31 01:54:59 +00:00
jhb
38c0ce34b0 - Move ether_ifdetach() earlier and remove now-unneeded IN_DETACH flag.
- Expand locking in interrupt handler.

Reviewed by:	yongari
2011-01-13 21:49:14 +00:00
jhb
be4690f32e Add a 'locked' variant of the foo_start() routine and call it directly
from interrupt handlers and watchdog routines instead of queueing a task
to call foo_start().

Reviewed by:	yongari
MFC after:	1 month
2011-01-03 18:28:30 +00:00
yongari
1e453ce0eb Add support for Atheros AR8151/AR8152 PCIe gigabit/fast ethernet
controller. These controllers are known as L1D(AR8151) and
L2CB/B2(AR8152). This change adds supports for the following
controllers.
 o AR8151 v1.0(L1D) gigabit ethernet controller
 o AR8151 v2.0(L1D) gigabit ethernet controller
 o AR8152 v1.1(L2CB) fast ethernet controller
 o AR8152 v2.0(L2CB2) fast ethernet controller
These controllers have the same feature of AR8131/AR8132 and
support improved power saving control. The user visible change at
this moment is reduced jumbo frame size from 9KB to 6KB. Many
thanks to Atheros for continuing to support FreeBSD.

HW donated by:	Atheros Communications, Inc.
2010-08-09 17:28:08 +00:00
yongari
08ccc1c1b2 Cache PCIY_PMG and PCIY_EXPRESS capability pointer to softc and use
it instead of calling pci_find_extcap().
2010-08-08 00:43:41 +00:00
yongari
c9be81a520 Add alc(4), a driver for Atheros AR8131/AR8132 PCIe ethernet
controller. These controllers are also known as L1C(AR8131) and
L2C(AR8132) respectively. These controllers resembles the first
generation controller L1 but usage of different descriptor format
and new register mappings over L1 register space requires a new
driver. There are a couple of registers I still don't understand
but the driver seems to have no critical issues for performance and
stability. Currently alc(4) supports the following hardware
features.
  o MSI
  o TCP Segmentation offload
  o Hardware VLAN tag insertion/stripping
  o Tx/Rx interrupt moderation
  o Hardware statistics counters(dev.alc.%d.stats)
  o Jumbo frame
  o WOL
AR8131/AR8132 also supports Tx checksum offloading but I disabled
it due to stability issues. I'm not sure this comes from broken
sample boards or hardware bugs. If you know your controller works
without problems you can still enable it. The controller has a
silicon bug for Rx checksum offloading, so the feature was not
implemented.
I'd like to say big thanks to Atheros. Atheros kindly sent sample
boards to me and answered several questions I had.

HW donated by:	Atheros Communications, Inc.
2009-06-10 02:07:58 +00:00