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32 Commits

Author SHA1 Message Date
Pedro F. Giffuni
b93c97c14a risc-v: for pointers replace 0 with NULL. 
These are mostly cosmetical, no functional change.

Found with devel/coccinelle.
 2016-04-14 17:25:50 +00:00
Ruslan Bukin
d52d6d7ca7 Add support for ddb(4). 
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
 2016-03-10 15:51:43 +00:00
Andrew Turner
a43760692b Make the fdt_get_mem_regions memsize argument optional. It's only used in 
by a few callers.

Sponsored by:	ABT Systems Ltd
 2016-03-01 09:45:27 +00:00
Justin Hibbits
e665eafb25 Correct the memory rman ranges to be to BUS_SPACE_MAXADDR 
Summary:
As part of the migration of rman_res_t to be typed to uintmax_t, memory ranges
must be clamped appropriately for the bus, to prevent completely bogus addresses
from being used.

This is extracted from D4544.

Reviewed By: cem
Sponsored by:	Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5134
 2016-03-01 02:59:06 +00:00
Wojciech Macek
e571e15cb0 Fix fdt_get_mem_regions() to work with 64-bit addresses 
Use u_long instead of uint32_t variables to avoid overflow
    in case of PA space bigger than 32-bit.

Obtained from:         Semihalf
Submitted by:          Michal Stanek <mst@semihalf.com>
Sponsored by:          Annapurna Labs
Approved by:           cognet (mentor)
Reviewed by:           andrew, br, wma
Differential revision: https://reviews.freebsd.org/D5393
 2016-02-29 09:22:39 +00:00
Ruslan Bukin
14232d424d o Use uint64_t for page number as it doesn't fit uint32_t. 
o Implement growkernel bits for L1 level of pagetables.

This allows us to boot with 128GB of physical memory.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
 2016-02-26 14:04:00 +00:00
Ruslan Bukin
17696c12f5 Add support for symmetric multiprocessing (SMP). 
Tested on Spike simulator with 2 and 16 cores (tlb enabled),
so set MAXCPU to 16 at this time.

This uses FDT data to get information about CPUs
(code based on arm64 mp_machdep).

Invalidate entire TLB cache as it is the only way yet.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
 2016-02-24 16:50:34 +00:00
Ruslan Bukin
cea32c0742 o Grab physical memory regions information from the device tree. 
o Increase memory size.
 2016-02-23 14:21:46 +00:00
Ruslan Bukin
e1b6d4a9f4 Add basic trap handlers for illegal instruction and breakpoint 
exceptions.
 2016-02-22 14:54:50 +00:00
Ruslan Bukin
041c26e7ff Fix comment. 2016-02-22 14:19:45 +00:00
Ruslan Bukin
c7977d4cee Remove duplicates. 2016-02-22 14:13:05 +00:00
Ruslan Bukin
0b7bfc0beb Provide stack(9) MD stubs for RISC-V so ktr(9) can be compiled in. 2016-02-22 14:01:46 +00:00
Ruslan Bukin
dfb5ca561e Fix ktrace call. 2016-02-22 13:52:08 +00:00
Svatopluk Kraus
35a0bc1260 As <machine/vmparam.h> is included from <vm/vm_param.h>, there is no 
need to include it explicitly when <vm/vm_param.h> is already included.

Suggested by:	alc
Reviewed by:	alc
Differential Revision:	https://reviews.freebsd.org/D5379
 2016-02-22 09:08:04 +00:00
Justin Hibbits
7915adb560 Introduce a RMAN_IS_DEFAULT_RANGE() macro, and use it. 
This simplifies checking for default resource range for bus_alloc_resource(),
and improves readability.

This is part of, and related to, the migration of rman_res_t from u_long to
uintmax_t.

Discussed with:	jhb
Suggested by:	marcel
 2016-02-20 01:32:58 +00:00
Ruslan Bukin
229f3f0d9c Increase kernel and user VA space. 
This allows us to boot with more than 128MB of physical memory.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
 2016-02-18 15:28:57 +00:00
Ruslan Bukin
5fe191b01e Add the implementation of atomic_swap_32(). 2016-02-17 14:32:03 +00:00
Ruslan Bukin
f936aa4a3a Use better form representing 32 x 128-bit floating-point registers. 
Suggested by:	kib
 2016-02-17 14:24:25 +00:00
Ruslan Bukin
6d005bb212 There is no need to pre save tp in cpu_fork(). 
Discussed with: jhb
 2016-02-17 14:13:25 +00:00
Ruslan Bukin
6cb16b7e7a Add the implementation of savectx(). 2016-02-17 13:49:38 +00:00
Ruslan Bukin
486ff49853 Use callee-saved registers to pass args through fork_trampoline(). 2016-02-17 13:43:43 +00:00
Ruslan Bukin
f3d389ee9e Use __uint64_t type for floating point registers 
as compiler don't know about __uint128_t yet.

Discussed with:	theraven, kib
 2016-02-12 14:29:14 +00:00
Ruslan Bukin
cfddfe4cd5 o Move non-generic kernel configuration out from GENERIC. 
o Add kernel configuration for QEMU.

Both SPIKE and QEMU kernel configs are temporary (until
we will be able to obtain DTB from loader).

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
 2016-02-11 13:28:52 +00:00
Ruslan Bukin
2150fb09b9 Stop device enumeration when we see first empty slot. 
This fixes operation in QEMU and saves some booting time as well.

Pointed out by:	Sagar Karandikar <skarandikar@berkeley.edu>
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
 2016-02-11 11:21:45 +00:00
Gleb Smirnoff
b28cc462ad Include sys/_task.h into uma_int.h, so that taskqueue.h isn't a 
requirement for uma_int.h.

Suggested by:	jhb
 2016-02-09 20:22:35 +00:00
Ruslan Bukin
e3ee7f49f1 Access pcpup using gp register. 2016-02-04 14:30:46 +00:00
Ruslan Bukin
4d50647d52 Reuse gp register for pcpu pointer. 
gp (global pointer) is used by compiler in userland only,
so re-use it for pcpup in kernel, save it on stack on switching
out to userland and load back on return to kernel.

Discussed with:	jhb, andrew, kib
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D5178
 2016-02-04 12:49:28 +00:00
Ruslan Bukin
46c9b07f22 Fix build. 2016-02-04 11:52:53 +00:00
Gleb Smirnoff
6c95c7903c Fix build. 2016-02-04 03:55:41 +00:00
Ruslan Bukin
28029b68c0 Welcome the RISC-V 64-bit kernel. 
This is the final step required allowing to compile and to run RISC-V
kernel and userland from HEAD.

RISC-V is a completely open ISA that is freely available to academia
and industry.

Thanks to all the people involved! Special thanks to Andrew Turner,
David Chisnall, Ed Maste, Konstantin Belousov, John Baldwin and
Arun Thomas for their help.
Thanks to Robert Watson for organizing this project.

This project sponsored by UK Higher Education Innovation Fund (HEIF5) and
DARPA CTSRD project at the University of Cambridge Computer Laboratory.

FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv

Reviewed by:	andrew, emaste, kib
Relnotes:	Yes
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D4982
 2016-01-29 15:12:31 +00:00
Ruslan Bukin
02568041ed Correct RISC-V exception types. 2016-01-18 17:49:32 +00:00
Ruslan Bukin
8d7e7a98db Import RISC-V machine headers. This is a minimal set required to compile 
kernel and userland.

Reviewed by:	andrew, imp, kib
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D4554
 2015-12-17 18:44:30 +00:00