Commit Graph

22995 Commits

Author SHA1 Message Date
adrian
dd70a45751 Add in the clock timing calculation when Merlin is using the 5ghz fast clock.
This is a 44mhz clock, not a 40mhz clock like normal for 5ghz operation.
2011-04-03 17:36:32 +00:00
adrian
0bf4a6b02b Import a fix from the ath9k - reduce the TX FIFO size for Kite (AR9285.) 2011-04-03 12:02:49 +00:00
adrian
7f75384d40 Add an explanation of the inivals 2011-04-03 11:59:52 +00:00
adrian
5e77e68a4c Import nvram2env, a device driver which imports various NVRAM-style
environments into the kernel environment.

The eventual aim is to replace these with specific drivers for
the various bootloaders (redboot, uboot, etc.) This however will
work for the time being until it can be properly addressed.

Submitted by: Aleksandr Rybalko <ray@dlink.ua>
2011-04-03 11:55:48 +00:00
adrian
e29d8f598e From ath9k - clear the RX descriptor status before recycling it. 2011-04-02 00:27:22 +00:00
adrian
4b46d6dec1 Add some more debugging 2011-04-02 00:24:13 +00:00
jfv
3d5a80cead Fix to an error condition case, when an mbuf chain
get's defragged due to a mapping failure the header
pointers will be invalidated and can result in a
TSO or other failure down the line. So, when the
remapping occurs force a retry thru the offload
calculation code. Thanks to Andrew Boyer for discovering
this and cooking up the fix!!
2011-04-01 20:24:51 +00:00
yongari
bdc9b04112 Partially revert r184106. RX buffer ring also needs bus_dmamap_sync().
Tested by:	Yamagi Burmeister (lists <> yamagi dot org)
MFC after:	1 week
2011-04-01 18:53:41 +00:00
jfv
47692eab3c Change the refresh_mbuf logic slightly, add an inline
to calculate the outstanding descriptors that need to be
refreshed at any time, and use THAT in rxeof to determine
if refreshing needs to be done. Also change the local_timer
to simply fire off the appropriate interrupt rather than
schedule a tasklet, its simpler.

MFC in two weeks
2011-04-01 18:48:31 +00:00
yongari
a5be52d802 64bit DMA caused data corruption. Unfortunately there is no known
workaround to use 64bit DMA.
Disable 64bit DMA on Attansic L1 controller.

Tested by:	Yamagi Burmeister (lists <> yamagi dot org)
MFC after:	1 week
2011-04-01 16:45:26 +00:00
kib
eb730d92e4 After the r219999 is merged to stable/8, rename fallocf(9) to falloc(9)
and remove the falloc() version that lacks flag argument. This is done
to reduce the KPI bloat.

Requested by:	jhb
X-MFC-note:	do not
2011-04-01 13:28:34 +00:00
kevlo
0800007c22 - Minor style(9) cleanup
- Make functions static
2011-04-01 03:27:55 +00:00
yongari
e2441d5fc6 Make bxe(4) build with BXE_DEBUG. 2011-04-01 01:30:21 +00:00
np
38b3395cc3 Update header and related code for firmware 1.3.8
MFC after:	3 days
2011-04-01 00:40:24 +00:00
davidch
053fe4b9bc - Fixed build problem when not useing BXE_DEBUG.
MFC after:	One week.
2011-03-31 22:50:55 +00:00
davidch
6278915d72 - Freshened debug support code.
- Renamed several RX variable for more consistent usage.
- Fixed a potential problem when masking RX CQ producer value.

MFC after:	One week.
2011-03-31 22:40:44 +00:00
davidch
83093eed3a - Fixed DMA engine errors by increasing timeouts to 200ms for reads/writes.
- Improved some error reporting calls to include file name/line number.
- Various style(9) fixes.

MFC after:	One week.
2011-03-31 22:04:00 +00:00
davidch
94aa425d1e - Added debug support to monitor mbuf defrag attempts/failures.
MFC after:	One week.
2011-03-31 21:30:00 +00:00
davidch
11d539f0b3 - Print number of queues when RSS is enabled.
- Improve reporting of media type (not always 10GBase-CX4).

MFC after:	One week
2011-03-31 21:01:10 +00:00
davidch
2b28489409 - Fixed a problem where the stack passed a TSO frame larger than the 64K
size allowed by the DMA descriptor for TSO frames.

MFC after:      One week
2011-03-31 20:46:50 +00:00
jhb
94327c7382 Explicitly track the state of all known BARs for each PCI device. The PCI
bus driver will now remember the size of a BAR obtained during the initial
bus scan and use that size when doing lazy resource allocation rather than
resizing the BAR.  The bus driver will now also report unallocated BARs to
userland for display by 'pciconf -lb'.  Psuedo-resources that are not BARs
(such as the implicit I/O port resources for master/slave ATA controllers)
will no longer be listed as BARs in 'pciconf -lb'.  During resume, BARs are
restored from their new saved state instead of having the raw registers
saved and restored across resume.  This also fixes restoring BARs at
unusual loactions if said BAR has been allocated by a driver.

Add a constant for the offset of the ROM BIOS BAR in PCI-PCI bridges and
properly handle ROM BIOS BARs in PCI-PCI bridges.  The PCI bus now also
properly handles the lack of a ROM BIOS BAR in a PCI-Cardbus bridge.

Tested by:	jkim
2011-03-31 13:22:12 +00:00
adrian
d9826cd23e Introduce AH_AR5416_INTERRUPT_MITIGATION which enables interrupt mitigation for
the AR5416 and later. Rename the older HAL option to use this.
2011-03-31 08:48:05 +00:00
adrian
6f4c1d61a6 Break out the ath PCI logic into a separate device/module.
Introduce the AHB glue for Atheros embedded systems. Right now it's
hard-coded for the AR9130 chip whose support isn't yet in this HAL;
it'll be added in a subsequent commit.

Kernel configuration files now need both 'ath' and 'ath_pci' devices; both
modules need to be loaded for the ath device to work.
2011-03-31 08:07:13 +00:00
adrian
056d03857b According to ath9k recv.c, one shouldn't be doing self-linked descriptors
in the RX path when doing 11n and block-ack'ed frames. Apparently, the MAC
will loop over that self-linked descriptor and treat it as "good enough"
for (incorrectly!) ACKing the frames in the block-ack.

Until I figure out how to work around this issue in the future, this counter
will tell me if packet RX processing ever gets to the point where it's
touching the self-linked descriptor. If there's ever enough packets to get
to that point, BA's will be invalid and likely very unhappy.
2011-03-29 15:59:07 +00:00
yongari
067233645b Revise r220046 by introducing dc_netcfg_wait() which waits the end
of active DMA cycle. dc_setcfg() also has to wait until the DMA
engine is stopped so using a common function to handle the job is
better than duplicating the code.

No objection from:	marius
2011-03-28 19:08:53 +00:00
yongari
8dd663c1cb Normally fxp(4) does not receive bad frames but promiscuous mode
makes controller to receive bad frames and i82557 will also receive
bad frames since fxp(4) have to receive VLAN oversized frames. If
fxp(4) encounter DMA overrun error, the received frame size would
be 0 so the actual frame size after checksum field extraction the
length would be negative(-2). Due to signed/unsigned comparison
used in driver, frame length check did not work for DMA overrun
frames. Correct this by casting it to int.
While I'm here explicitly check DMA overrun error and discard the
frame regardless of result of received frame length check.

Reported by:	n_hibma
Tested by:	n_hibma
MFC after:	1 week
2011-03-28 16:58:48 +00:00
kib
7b58e8da9b Promote ksyms_map() and ksyms_unmap() to general facility
copyout_map() and copyout_unmap() interfaces.

Submitted by:	John Wehle <john feith com>, nox
MFC after:	2 weeks
2011-03-28 12:48:33 +00:00
adrian
178df47a18 Add in HT protection but disable it by default.
I'll clear how it's supposed to work with Bernhard and then look
at enabling this in the correct situations.

But this -does- enable HT RTS protection (using the appropriate legacy
rates) if this bit of code is enabled.
2011-03-28 11:48:49 +00:00
mav
5a15df2be8 Update mvs(4) driver to work over FDT's simplebus(4) bus. 2011-03-28 11:08:58 +00:00
adrian
8e19e21cb3 Fix typo. 2011-03-27 10:35:39 +00:00
adrian
9b6aff3532 Rename AH_ENABLE_11N to ATH_ENABLE_11 - the HAL supports 11n by
default but the ath driver doesn't. This is a much more consistent
name.
2011-03-27 08:47:55 +00:00
marius
cd4121bde0 Wait until the DMA engine is stopped before unmapping buffers and
descriptors, which fixes DMA errors seen on sparc64.

Obtained from:	OpenBSD
MFC after:	1 week
2011-03-26 22:39:23 +00:00
adrian
8b50164a19 .. And another missed commit - add the PSPOLL capability. 2011-03-26 13:06:43 +00:00
adrian
b9966c9f48 This was missing from the previous HAL commit - it fixes a typo and
introduces the PS-POLL hardware support.
2011-03-26 11:59:18 +00:00
adrian
030940dad5 If 802.11n is enabled, bump the number of buffers used up to a larger
level.

This is important for AMPDU RX as each burst is multiple packets in a row.
2011-03-26 11:58:29 +00:00
adrian
4f32c1a13f Add in the hardware PS-POLL frame reception setting, but leave it disabled
by default.

Adventourous souls with an AR9220/AR9280 or later and who have a device
that sends PS-POLL frames may wish to try tinkering with this option and
get back to me.
2011-03-26 10:52:37 +00:00
adrian
66cc5279f5 Introduce hardware PS-POLL support in the HAL.
Linux ath9k only enables this for AR9280 and later NICs; so
create a capability for it so it isn't enabled for earlier
NICs.

Enabling hardware PS-POLL support will come in a later commit
and will be disabled by default.
2011-03-26 10:47:17 +00:00
adrian
f67f722dc8 Put these two back to mirror what ath9k does.
Even though they map to setting the error filter register,
ath9k also writes them untouched to AR_RX_FILTER.

The Force-BSSID match bit can stay high, as it maps to a
misc mode register setting rather than an RX filter bit.
2011-03-26 07:29:48 +00:00
adrian
45abd9f4f2 Shuffle around the HAL_RX_FILTER bits to be slightly more sensible.
The phyerr, radar and bssid-match bits aren't real bits, they map
to enabling bits in other registers. Move those out of the way of
valid RX filter bits.

Add a few new fields from ath9k - compba, ps-poll, mcast-bcast-all.
2011-03-26 07:15:35 +00:00
np
34341b0783 Update T3 firmware to 7.11.0
Changes since 7.8.0 (from the official changelog):

- Fixed sporadic interrupt generation for associated CQ when processing
  a local invalidate work request
- Changes to core scheduling to avoid starving requests from the host
  under heavy RDMA Read Request load (e.g. packets to the wire)

- Programmed the tp tx resource limiter in function of the traffic (only
  affects iWarp)

- Increased the egress NIC gather list length from 36 to 46 entries

MFC after:	1 week
2011-03-25 20:53:02 +00:00
adrian
3fa8d0321a After discussing with Bernhard, the "right" way in net80211 to check
the channel width is ni->ni_chw, which is set to the negotiated channel
width. ni->ni_htflags is the capability, rather than the negotiated
value.

Teach both the TX path and the sample rate module about this.
2011-03-25 10:55:25 +00:00
adrian
4b79add9d6 I broke periodic adc calibrations - so restore them to working order. 2011-03-25 10:53:13 +00:00
hselasky
411bfbf8a8 Fix initialisation order with regard to debug prints.
Reported by:	Luiz Otavio O Souza
MFC after:	14 days
Approved by:	thompsa (mentor)
2011-03-25 10:11:21 +00:00
kevlo
a51db36969 Fix panic while associating access point.
While here, add the SMC SMCWUSB-G
2011-03-25 05:01:13 +00:00
adrian
44a57e35ff Re-disable the setting of 2040/shortgi bits for now.
This seems to work fine for STA but not HT/20 AP mode.

Further discussion with net80211 people will need to take place
to ensure that the right flags are set based on the negotiated
capabilities of the remote peer, rather than whatever the local
parameters are.

Sending short-gi frames in 20mhz may work on some chips but
it certainly isn't supported on anything currently supported
by the HAL; and sending HT40 frames in HT20 mode just plain
won't work.
2011-03-25 04:15:30 +00:00
adrian
e4f893f2cf After discussion with Felix Fietkau (nbd) about the ath9k Merlin LNA bit
settings, it seems that our defines are backwards and don't match what
is in the EEPROM documentation or internal driver.

The ath9k code used to have a bitfield here, rather than a uint8_t, and
there were #defines used to swap the order based on the endian of the
platform - this wasn't because of nybble or bit ordering of the
underlying host but because of what the compiler was doing.

This may be the reason for the backwards field numbers, as ath9k had
similar issues.
2011-03-25 00:45:24 +00:00
adrian
e58905010c Flip ANI on for the AR5416 and later chips. I haven't verified it on
the AR9285 so I'll leave it off for that.

Ath9k sources indiciate that one of the ANI modes interferes with
RIFS detection, so match ath9k and disable that.
2011-03-25 00:40:08 +00:00
adrian
6fa5e5cfe1 The right commit - add a couple more AR_PCU_MISC_MODE2 register bits -
SOWL specific.
2011-03-25 00:06:58 +00:00
adrian
a64bc82d66 oops, commited the wrong file change. 2011-03-25 00:06:19 +00:00
adrian
1e585edb44 Add some more AR_PCU_MISC_MODE2 register settings - these are SOWL or later. 2011-03-25 00:05:26 +00:00