Commit Graph

22 Commits

Author SHA1 Message Date
imp
66dabcc793 o Try to do 3.3V support better for the 6722 and 6729/30.
o Bite the bullet and create controller types for the 6729 and also for
  the 673x.  Rename the 672x to 6722.
o Define minimal extended register info (just register 0xa for reading VS[12]).

# I think the last version may have broken 673x controllers, but this should
# fix them.

Tested on the 6722, but not the 6729.

Ideas from: Chiharu Shibata-san's article in bsd-nomads:15866
2001-11-09 07:33:54 +00:00
imp
b2ea2b171b Move to using a chip function + function pointers to deal with the
function and csc interrupt routing path (eg, ISA or PCI) so that we
can more easily switch between the two.

When we don't have a card ISR, put the function interrupt into ISA
mode.  This effectively masks the interrupt since it happens once, and
not again until we have an ISR.  This should help hangs, and might
help people that unwisely update the kernel w/o updating pccardd.
This is done at mapirq time.

Force CL-PD6729/30 to use ISA interrupt routing and maybe even detect
the number of pccard slots properly (this is still WIP).  We aren't
going to support PCI interrupts for this release.  A future release
should support them, however.  Shibata-san's 3.3V fixes are not
included.

Add a hack which should, in i386, rewrite IRQ 0 cardbus bridges to be
IRQ 255, which should cause interrupts to be routed.  This is mostly
untested since my one tester disappeared after reporting nothing
changed.

Implement, but do not use, a power method called cardbus.  It looked
like a great way to get around the 3.3V problem, but it seems that you
can only use it to power cardbus cards (I get no CIS when I enable it,
so maybe we're programming things bogusly).

GC the intr and argp stuff from the slot database.

Improve the ToPIC support with the power hacks that Nakagawa-san
published in FreeBSD Press and that Hiroyuki Aizu-san ported to
-stable.  The ToPIC hacks were for 3.3V support in ToPIC 100, but it
looks like the '97 also has identical registers, so use them too.

Add some #defines for the cardbus power stuff.

Finally implement making CSC on the Ricoh chips ISA or PCI.  This will
allow polling mode to work on vaios, I think.

Add some minor debugging.  This should likely be cleaned up or put
behing a bootverbose.

Some of this work, and earlier work, was influanced by Chiharu
Shibata-san's power handing patches posted to bsd-nomads:15866.

MFC: Soon, if possible.
2001-09-04 04:47:58 +00:00
imp
b3400f019f Rearrange how we do interrupt routing tweaking. We now have
hw.pcic.intr_path	{1,2}	1 == ISA, 2 == PCI
	hw.pcic.init_route	Force TI chipset initializations in edge case.
2001-08-21 20:04:42 +00:00
imp
bb40f57a7c Move ISA interrupt ISR and timeout routines to pcic from pcic_isa so
that we can use them in the pci code when we have to fall back to ISA
interrupt routing.
2001-08-10 06:07:20 +00:00
imp
ac051210c3 Move pcic_override_irq from pcic_isa, to pcic. 2001-07-31 06:32:02 +00:00
imp
51a109affb Minor whitespace nit 2001-07-28 03:46:35 +00:00
imp
0774b50fdd Introduce two new tunables from the boot loader.
hw.pcic.irq		Globally set the IRQ for all pcic devices' management
			interrupt (aka card status change or CSC interrupt)
			This is what used to be known as
			machdep.pccard.pcic_irq (which has been retained for
			now for compatibility).
hw.pcic.ignore_fuction_1 Ignores function 1 for all PCIC bridges by not
			attaching to them.  Lucent released a huge batch
			of cards that were imporperly manufactuered (lacking
			the 0 ohm resister to disable slot 1).  This is
			a big hammer to keep those cards from causing problems
			(I've had 4 people contact me saying my patches
			worked great once they added a kludge to always ignore
			function 1, or until they soldered these resistors
			in place!).

No clue where to document these.  They act as both boot loader environment
variables, as well as read-only sysctls after boot.

At the same time, sort sys/systm.h in its proper order after sys/sysctl.h.
2001-07-27 16:07:02 +00:00
imp
99e0209870 Minor nits merged from my stable tree:
o kill blank line that I introduced in cardinfo.h
o Delete unused variable wasinactive.
o return 0 from pccard_resume.
o Set the state and lastsate initially to be empty.
o move comment above code for interrupt dispatching.
o Powerstate interface is now available as of 430002, not 500000 (note that
  this change will be not 100% correct since the power state stuff didn't
  enter current until well after 500000, but it is good enough for the two
  branche we have going now).
2001-07-27 07:47:35 +00:00
imp
5323d94f50 Attempt to fix and document interactions between suspend/resume and pccardc
power x 0.

pccardc power x 0 used to disable the slot.  But a suspend/resume
would reactivate the pccard.  It no longer does that.  Now the
disabling of the slot is sticy until it is reset with power x 1 or the
card is ejected.  This seems closer to correct behavior to me.

o Process all card state changes the same using pccard_do_stat_change().
o Cleanup disabling the card so that we can preserve the state after
  the change.  Basically, don't set it to empty as often as we do.
o On suspend, the new state is "empty" and the laststate is "suspend"
o Document state machine with a diagram of states and edges.  The
  edges are labeld to tell the reader what event causes the external
  state changes.
o "machdep.pccard.pcic_resume_reset" may be obsolete now.  We always
  call the bridge driver's resume method on resume now.  Otherwise cards
  won't automatically show up.  If it needs to stay, I'll add it back.
2001-07-27 07:21:42 +00:00
imp
2819707a6c On PC-98, map IRQ 6 to IRQ 7 at the pcic level. That is, when we're
told to use IRQ 6, progam the pcic to use irq 7 instead.  Evidentally,
at least some of the cards are wired this way.  If you want to use irq
6, configure it.  All the mapping is done just before we set the
interrupt registers.  See [FreeBSD98-testers 5064] for details.

Added commentary about valid interrupts on some CBUS pc98 CL PD6722
based cards.

Submitted by: Hiroshi TSUKADA-san <hiroshi@kiwi.ne.jp>
2001-06-16 06:18:16 +00:00
imp
3177247cd5 Add PC9801-102 CBUS card to the list of plug and play devices. Some
mapping of irq 6 may be required to use that irq, but if so,
additional commits will follow.

Submitted by: Hiroshi TSUKADA-san
2001-06-09 06:43:54 +00:00
imp
b7a73ced2f Move the pcic interrupt from pcic.c to pcic_isa.c. The ISA handling
for card change interrupts is different than the pci stuff that's
coming soon.  Set the management irq in different ways.  If
pci_parallel interrutp routing, then use the PCI way of getting
interrupts.  Move polling mode into pcic_isa since when we're routing
via pci polling doesn't work because many bridges (systems hang solid).

If we're routing interrupts via pci, they can be shared, so flag them
as such.

Note, this doesn't actually change anything since the pci attachment
isn't quite ready to be committed.
2001-06-04 03:29:06 +00:00
imp
476e3d24e2 Turns out that one bit isn't enough. Introduce two new fields
csc_route and func_route to hold the way that each interrupt is
routed.  csc is Card Status Change in the datasheets and standard, but
is called "Management Interrupt" in FreeBSDese.  There are three types
of interrupt routing:  ISA parallel, PCI parallel and ISA serial (some
chipsets support other types as well, but I don't plan on supporting
them).

When we try to allocate an interrupt, and the type for that interrupt
is pci_parallel, allow it to be shared by oring in RF_SHAREABLE to the
flags argument.  Introduce pcic_alloc_resource to allow this to
happen.
2001-05-28 02:53:02 +00:00
imp
cfd71a8415 Migrate from unit based to dev base. Don't save unit number, but do save
dev.  Convert all uses of unit to dev as appropriate.  Minor comment fixes
to pcic_softc definition.
2001-05-25 18:28:49 +00:00
imp
a55e3ddc32 Use bus_space functions rather than inb/outb.
Add defines for PCIC_INDEX and PCIC_DATA offsets.
Change PCIC_INDEX_0 to PCIC_PORT_0
Add define for PCIC_NPORT.
Document why the vadem probe works.
2001-05-24 06:54:48 +00:00
imp
85de757366 Move getb1 and putb1 from pcic_isa.c to pcic.c. Rename them to
pcic_{get,put}b_io.  There are some pci bridges (the CL-PD6729 and
maybe others) that do not have memory mapped registers, so we'll need
these in both places.  Declare them in pcicvar.h.
2001-05-24 04:03:28 +00:00
imp
4ebc84e616 Add better support for the Ricoh 5C296 and 5C396 chips. These chips
have a slightly different 3.3V support than the other clones, so
compensate as best we can.  Note: 3.3V support is untested since I do
not have any 3.3V cards that I know of to test it with.
2001-05-23 05:06:04 +00:00
imp
c65c10ec83 Move allocation of ExCA registers from the base driver into the bus
attachment code.
2001-05-21 07:32:46 +00:00
imp
39ce0c191f Next step on the road to pci: power taming.
Work through the various power commands and convert them from a "is
this a foo controller or a foo' controller or a foo''' controller" to
a cabability based scheme.  We have bits in the softc that tell us
what kind of power control scheme the controller uses, rather than
relying on being able to enumerate them all.  Cardbus bridges are
numerous, but nearly all implement the i82365sl-DF scheme (well, a few
implement cirrus CL-PD67xx, but those were made by Cirrus Logic!).

Add a pointer back to the softc in each pcic_slot so we can access
these flags.

Add comments that talk about the issues here.  Also note in passing
that there are two differ Vpp schemes in use and that we may need to
adjust the code to deal with both of them.  Note why it usually works
now.

We have 5 power management modes right now: KING, AB, DF, PD and VG.
AB is for the i82365 stpes A, B and C.  DF is for step DF.  PD is the
cirrus logic extensions for 3.3V while VG is the VADEM extensions for
3.3V.  KING is for the IBM KING controller found on some old cards.
# I'm looking for one of those old cards or a laptop that has the KING
# bridge in it.

We have to still cheat and treat the AB parts like the DF parts
because pci isn't here yet.  As far as I can tell, this is harmless
for actual old parts and necessary to work with 3.3V cards in some
laptops.

This almost eliminates all tests for controller in the code.  There
are still a few unrelated to power that need taming as well.
2001-05-21 04:44:14 +00:00
imp
c647eb3dd3 Next step towards pcic_pci: the ability to allocate mapped memory in attach.
o Introduce flags word to the softc.  This will be used to control various
  aspects of the driver.  Right now there are two bits defined, PCIC_IO_MAPPED
  and PCIC_MEM_MAPPED.  One for ISA cards that are I/O mapped, the other is
  for PCI cards that are memory mapped.  Only the ISA side is implemented
  with this commit.
o Introduce a pcic_dealloc which will cleanly dealloc resources used.  Right
  now it is only supported when called from probe/attach.
o Keep track of resources allocated in the pcic_softc.
o move pcictimeout_ch to the softc so we can support multiple devices
  in polling mode.
o In ISA probe, set PCIC_IO_MAPPED.
o Introduce and compute the slot mask.  This will be used later when
  we expand the number of slots on ISA from 2 to 4.  In such a case, we
  appear to have to use polling mode otherwise we get two different cards
  trying to drive the same interrupt line.  I don't have hardware to
  test this configuration, so I'll stop here.
2001-05-21 03:22:52 +00:00
imp
19cf17e66b Move ISA specific code into pcic_isa. This is the probe routine, the
get/setb1 routines.  Also expose clrb and setb as pcic_{clrb,setb} so
we can use it from the probe.  pcic_probe is no longer needed.
2001-05-19 05:21:23 +00:00
imp
14f69765f8 Separate out isa attachment to its own file. The pci attachment will
soon attach directly to pcic rather than the kludge pci-pcic device we
have now.

In some ways, this is similar to the work PAO3 did to try to support
cardbus bridges.  In some ways different.  This and future commits
will be taking from the spirit of many of those changes.  pcicvar.h is
completely different from the pcicvar.h that appeared in PAO3, but
similar in concept.
2001-05-16 07:32:04 +00:00