into a new function that other platforms can share.
This creates a new ofw_reg_to_paddr() function (in a new ofw_subr.c file)
that contains most of the existing ppc implementation, mostly unchanged.
The ppc code now calls the new MI code from the MD code, then creates a
ppc-specific bus_space mapping from the results. The new arm implementation
does the same in an arm-specific way.
This also moves the declaration of OF_decode_addr() from ofw_machdep.h to
openfirm.h, except on sparc64 which uses a different function signature.
This will help all FDT platforms to set up early console access using
OF_decode_addr().
from taskqueue_enqueue() instead of reading "ta_pending" unlocked and
also ensure the callout is stopped before proceeding.
MFC after: 1 week
Sponsored by: Mellanox Technologies
ast was rescheduled during VFS_SYNC(). It is possible that enough
parallel writes or slow/hung volume result in VFS_SYNC() deferring to
the ast flushing of workqueue.
Reported and tested by: pho
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
The Ingenic JZ7480 SoC that is on the Imagination Technologies CI20 board
has an L2 cache:
Cache info:
picache_stride = 4096
picache_loopcount = 8
pdcache_stride = 4096
pdcache_loopcount = 8
cpu0: Ingenic Xburst processor v79.2
MMU: Standard TLB, 32 entries
L1 i-cache: 8 ways of 128 sets, 32 bytes per line
L1 d-cache: 8 ways of 128 sets, 32 bytes per line
L2 cache: 8 ways of 256 sets, 128 bytes per line, 256 KiB total size
Config1=0xbe67338b<WatchRegs,EJTAG,FPU>
Config2=0x80000267
Config3=0x20
match the physical load address. Remove the *PHYSADDR symbols which are no
longer necessary.
Also remove a bunch of comments, most of which which have been wrong for
quite some time now, and the rest of which are mooted by these changes. All
that's left in this file is assigning a single symbol to its cannonical
value, not much to comment on anymore.
This eliminates the reliance on PHYSADDR and KERNPHYSADDR compile-time
symbols (except when the rom-copy code is enabled) by using the current
PC and the assumption that the entry-point routine is in the first 1MB
section of the text segment.
Other cleanups done:
- Reduce the initarm() stack size back to 2K. It got increased to
4 * 2K when this file was supporting multicore armv6, but that
support is now in locore-v6.S.
- When building the temporary startup page tables, map the entire
4GB address space as VA=PA before mapping the kernel at its loaded
location. This allows access to boot parameters stored somewhere
in ram by the bootloader, regardless of where that may be.
- When building the page table entry for supporting EARLY_PRINTF, map
the section as uncached unbuffered, since it is presumably device
registers.
Note that this restores the ability to use loader(8)/ubldr on armv4/5
kernels. That was broken in r283035, the point at which ubldr started
loading an arm kernel at any 2MB boundary.
Also note that after this, there is no reason to set KERNVIRTADDR to
anything other than 0xc0000000, and no need for PHYSADDR or KERNPHYSADDR
symbols at all.
is what includes machine/ofw_machdep.h. Don't declare OF_decode_addr();
it isn't implemented yet on mips and the declaration for it is about to
be commonized into openfirm.h.
If ExitBootServices fails due to a changed efi_mapkey then GetMemoryMap
must be called again. In this case it is also possible for the memory
map to grow, so repeat the initial GetMemoryMap call to fetch the new
size.
Also roll bi_add_efi_data_and_exit into bi_load_efi_data as there's no
need for it to be a separate function.
PR: 202455
Reported by: Berislav Purgar <bpurgar@gmail.com>
Tested by: Berislav Purgar <bpurgar@gmail.com>
Reviewed by: kib
MFC after: 1 week
MFC with: r292338
Relnotes: Yes
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D4621
exhausted.
It is possible for a bug in the code (or, theoretically, even unusual
network conditions) to exhaust all possible mbufs or mbuf clusters.
When this occurs, things can grind to a halt fairly quickly. However,
we currently do not call mb_reclaim() unless the entire system is
experiencing a low-memory condition.
While it is best to try to prevent exhaustion of one of the mbuf zones,
it would also be useful to have a mechanism to attempt to recover from
these situations by freeing "expendable" mbufs.
This patch makes two changes:
a) The patch adds a generic API to the UMA zone allocator to set a
function that should be called when an allocation fails because the
zone limit has been reached. Because of the way this function can be
called, it really should do minimal work.
b) The patch uses this API to try to free mbufs when an allocation
fails from one of the mbuf zones because the zone limit has been
reached. The function schedules a callout to run mb_reclaim().
Differential Revision: https://reviews.freebsd.org/D3864
Reviewed by: gnn
Comments by: rrs, glebius
MFC after: 2 weeks
Sponsored by: Juniper Networks
Some applications (e.g. Kodi) use tvservice APIs to manage HDMI
modes, power state, EDID etc. directly through VideoCore. After
these manipulations VideoCore may loose its state and needs to be
resynced with ARM. Under Linux this problem is worked around using
fbset utility that recreates framebuffer. Since there is no fbset
utility in FreeBSD we provide sysctl for userland apps to get system
back into normal mode.
"The availability of CLWB instruction is indicated by the presence of
the CPUID feature flag CLWB (bit 24 of the EBX register)."
CLWB is similar to CLFLUSHOPT, except that it is not required to discard
cacheline contents.
"On processors that supports PCOMMIT, PCOMMIT is enumerated through
CPUID (CPUID.7.0.EBX[22]) only when the feature is enabled by BIOS."
PCOMMIT is used to cause store-to-memory operations to become persistent
(protected from power failure).
Sponsored by: EMC / Isilon Storage Division
address and use this mechanism when:
1. kmem_alloc_{attr,contig}() can't find suitable free pages in the physical
memory allocator's free page lists. This replaces the long-standing
approach of scanning the inactive and inactive queues, converting clean
pages into PG_CACHED pages and laundering dirty pages. In contrast, the
new mechanism does not use PG_CACHED pages nor does it trigger a large
number of I/O operations.
2. on 32-bit MIPS processors, uma_small_alloc() and the pmap can't find
free pages in the physical memory allocator's free page lists that are
covered by the direct map. Tested by: adrian
3. ttm_bo_global_init() and ttm_vm_page_alloc_dma32() can't find suitable
free pages in the physical memory allocator's free page lists.
In the coming months, I expect that this new mechanism will be applied in
other places. For example, balloon drivers should use relocation to
minimize fragmentation of the guest physical address space.
Make vm_phys_alloc_contig() a little smarter (and more efficient in some
cases). Specifically, use vm_phys_segs[] earlier to avoid scanning free
page lists that can't possibly contain suitable pages.
Reviewed by: kib, markj
Glanced at: jhb
Discussed with: jeff
Sponsored by: EMC / Isilon Storage Division
Differential Revision: https://reviews.freebsd.org/D4444
EFI return values set the high bit to indicate an error. The log
messages changed here are printed only in the case of an error,
so including the error bit is redundant. Also switch to decimal to
match the error definitions (in sys/boot/efi/include/efierr.h).
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
During fork p_starcopy - p_endcopy area of a process is populated with bcopy
with only proc lock held. Another forking thread can find such a process and
proceed to access p_pgrp included in said area.
Fix the problem by moving the field outside. It is being properly assigned
later.
Reviewed by: kib
Diagnosed by: kib
Tested by: Fabian Keil <freebsd-listen fabiankeil.de>
MFC after: 10 days
kernel. This will be used for passing in things like the system table
from EFI or other similar metadata that can be used by the kernel to
communicate with the firmware.
The ci20 port (by kan@) is going to reuse almost all of the intrng code
since the SoC in question looks suspiciously like someone took an ARM
SoC design and replaced the ARM core with a MIPS core.
* migrate out the code;
* rename ARM_ -> INTR_;
* rename arm_ -> intr_;
* move the interrupt flush routine from intr.c / intrng.c into
arm/machdep_intr.c - removing the code duplication and removing
the ARM specific bits from here.
Thanks to the Star Wars: The Force Awakens premiere line for allowing
me a couple hours of quiet time to finish the universe builds.
Tested:
* make universe
TODO:
* The structure definitions in subr_intr.c still includes machine/intr.h
which requires one duplicates all of the intrng definitions in
the platform code (which kan has done, and I think we don't have to.)
Instead I should break out the generic things (function declarations,
common intr structures, etc) into a separate header.
* Kan has requested I make the PIC based IPI stuff optional.
I don't know what alternate universe I was inhabiting when I wrote it
originally, but apparently the basic workings of mathematics were different
than in this universe. I also can't explain how it ever worked, except "by
accident", because completely bogus values were being written into the
divisor register.
Different revisions support different operations. Refer to Intel
External Design Specifications to figure out what your hardware
supports.
Sponsored by: EMC / Isilon Storage Division
instead of GMBUS access for I2C transfers. The GMBUS driver falls back
to this mode when a transfer times out. However, the first transfer to
timeout was sending the request back to itself resulting in an panic due
to recursing on a lock. Fix it to forward the request on to the proper
device. This appears to have been accidentally changed in r277487.
Reported by: Joe Maloney <jmaloney@pcbsd.org>
Reviewed by: adrian, dumbbell, imp
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D4599
It turns out the callers of vm_page_replace know exactly which page they are
replacing and would like to assert about it. Change those from hard panics to
KASSERTs, and provide them with a wrapper so they don't have to deal with
warnings from an INVARIANTS-dependent dead store of the return value of
vm_page_replace.
Submitted by: Ryan Libby <rlibby@gmail.com>
Reviewed by: alc, kib (earlier version)
Sponsored by: EMC / Isilon Storage Division
Differential Revision: https://reviews.freebsd.org/D4497
the #address-cells property set. For this we need to read more data before
the parent interrupt description.
this is only enabled on arm64 for now as it's not quite compliant with the
ePAPR spec. We should use a default of 2 where the #address-cells property
is missing, however this will need further testing across architectures.
Obtained from: ABT Systems Ltd
Sponsored by: SoftIron Inc
Differential Revision: https://reviews.freebsd.org/D4518
