Commit Graph

3988 Commits

Author SHA1 Message Date
jmcneill
44689c98d6 Add support for the Allwinner H3 Thermal Sensor Controller. The H3 embeds
a single thermal sensor located in the CPU.
2016-09-05 11:05:14 +00:00
markj
fb5804c98d Remove support for idle page zeroing.
Idle page zeroing has been disabled by default on all architectures since
r170816 and has some bugs that make it seemingly unusable. Specifically,
the idle-priority pagezero thread exacerbates contention for the free page
lock, and yields the CPU without releasing it in non-preemptive kernels. The
pagezero thread also does not behave correctly when superpage reservations
are enabled: its target is a function of v_free_count, which includes
reserved-but-free pages, but it is only able to zero pages belonging to the
physical memory allocator.

Reviewed by:	alc, imp, kib
Differential Revision:	https://reviews.freebsd.org/D7714
2016-09-03 20:38:13 +00:00
jmcneill
8d12cd5993 Use the root key in the Security ID EFUSE (when valid) to generate a
MAC address instead of creating a random one each boot.
2016-09-03 15:28:09 +00:00
jmcneill
e25bfb37e5 Add support for Allwinner A64 thermal sensors. 2016-09-03 15:26:00 +00:00
jmcneill
228693754e Add support for reading root key on A83T/A64. 2016-09-03 15:22:50 +00:00
alc
520f999faa As an optimization to the machine-independent layer, change the machine-
dependent pmap_ts_referenced() so that it updates the page's dirty field
if a modified bit is found while counting reference bits.  This
opportunistic update can be performed at low cost and can eliminate the
need for some future calls to pmap_is_modified() by the machine-
independent layer.

MFC after:	3 weeks
2016-09-03 03:14:24 +00:00
jmcneill
866f8766b7 Add support for changing A23 PLL1 frequency. 2016-09-01 21:20:07 +00:00
jmcneill
8f817fdc12 Add support for setting DCDC2 voltage. 2016-09-01 21:19:11 +00:00
loos
f1aa7d86f1 All the TI platforms are FDT based and it is not necessary to enumerate
the hinted children (there wont be any).

Spotted by:	gonzo
2016-08-31 19:37:10 +00:00
loos
a79af33565 Fix the build.
Works better when the file with the #define is actually included...
2016-08-31 18:35:41 +00:00
jmcneill
ccdcf8ea53 Add support for Allwinner A64 USB PHY.
Reviewed by:	manu
2016-08-31 10:45:53 +00:00
bz
17b9bcc29d After r305113, try to properly replace the magic numbers with
proper #defines for this driver (not using the wrong header).
2016-08-31 10:45:33 +00:00
loos
8f07580482 Add a driver for the AM335x bandgap sensor, an on-die temperature sensor
as part of the AM335x control module extension.

TI says that the bandgap sensor is not very accurate on AM335x, but in our
tests it seems to be a good reference for the SoC temperature.

TI details:
http://processors.wiki.ti.com/index.php/AM335x_Thermal_Considerations#Measuring_Case_Temperature

Sponsored by:	Rubicon Communications, LLC (Netgate)
2016-08-31 07:42:46 +00:00
loos
e4894e598c Allow the use of control module extensions to cope with specific platform
features.

Sponsored by:	Rubicon Communications, LLC (Netgate)
2016-08-31 07:22:14 +00:00
loos
43f1aa3d10 Replace more magic numbers with the proper register names.
Sponsored by:	Rubicon Communications, LLC (Netgate)
2016-08-31 07:03:06 +00:00
loos
d709133524 Replace a magic number with the proper register name.
Sponsored by:	Rubicon Communications, LLC (Netgate)
2016-08-31 06:46:47 +00:00
cognet
5d25a0a8b4 Nuke obio_bs_tag, it was used before it was initialized, and
arm_base_bs_tag is the same, anyway.
2016-08-30 23:32:38 +00:00
cognet
064ff529a8 Some old arm ports don't load the kernel at the beginning of the memory,
because the bootloader, ie redboot, won't let them do so, and so used the
memory before the kernel for early memory allocation, such as pagetables,
stacks, etc...
Make a bit of an effort to try to get that memory mapped.
2016-08-30 23:30:26 +00:00
cognet
27ece8c45f Garbage collect bits forgotten in r295267. 2016-08-30 22:32:33 +00:00
jmcneill
db569b239b Add support for Allwinner A64 watchdog timer. 2016-08-30 10:21:32 +00:00
gonzo
38ef821796 Fix TI PRUSS driver panic with INVARIANTS enabled
Value passed as islocked argument to knlist_add should
be consistent with actual lock state so add lock/unlock
calls around knlist_add

PR:		212120
Submitted by:	Manuel Stuhn
2016-08-30 01:31:03 +00:00
jmcneill
48af6b87e1 Add support for Allwinner A64 PLL_PERIPH0/PLL_PERIPH1 and PLL_HSIC clocks.
Reviewed by:	andrew, manu
2016-08-25 10:29:41 +00:00
jmcneill
13c5ead6b5 Switch parent clock when setting frequency if a new parent is a better
candidate for the target rate.

Reviewed by:	andrew, manu
2016-08-25 10:27:22 +00:00
jmcneill
3ad7db943e Add support for Allwinner multi-parent bus gates.
Reviewed by:	andrew, manu
2016-08-25 10:24:14 +00:00
jmcneill
9b332f1eec Expose DC1SW as a regulator switch. On Pine64 this is used to control EMAC
PHY power.

Reviewed by:	andrew, manu
2016-08-25 10:20:27 +00:00
jmcneill
0812d00ea3 Remove dependency on allwinner_soc_family() as it is not available on arm64.
Reviewed by:	andrew, manu
2016-08-25 10:14:56 +00:00
manu
7e5c125e2a Allwinner: Add thermal sensor driver for A10/A20
The thermal sensor lives in the touch screen controller. Touch screen part
isn't done for now.
Temperature is read every ~2 seconds and exposed via sysctl.
2016-08-23 22:26:50 +00:00
manu
c4c4ae0a3a Do not include file from dt-bindings and simply use the already present defines.
Reported by:	jmcneill
MFC after:	1 week
2016-08-23 00:46:22 +00:00
manu
88b4a48518 Fix building for ARM kernel that have FLASHADDR, PHYSADDR and LOADERRAMADDR defined.
Pointy Hat: myself

Reported by:	bz
2016-08-22 18:33:56 +00:00
manu
7f4711e815 allwinner: Remove a20/a20_cpu_cfg.c from the build.
This was needed when we used the SoC specific timer and not the generic-timer.
2016-08-21 16:03:44 +00:00
manu
4bb61676bd if_emac: Before generating a random MAC address, try using the SID rootkey
to generate one. This is was U-Boot does to generate a random MAC so we end
up with the same MAC address as if U-Boot did generate it.

MFC after:	1 week
2016-08-19 23:44:07 +00:00
manu
5292986b0f Keep boot parameters in ARM trampoline code
Currently boot parameters (r0 - r3) are forgotten in ARM trampoline code.
This patch save them at startup and restore them before jumping into kernel
_start() routine.
This is usefull when booting with Linux ABI and/or custom bootloader.

Submitted by:	Grégory Soutadé <soutade@gmail.com>
Reviewed by:	imp
Differential Revision:	https://reviews.freebsd.org/D7395
2016-08-19 18:02:36 +00:00
manu
4dc262c794 Allwinner: Move a10_padconf.c into a10 subdirectory. 2016-08-19 12:48:32 +00:00
mmel
c5c676579e TEGRA: Remove forgotten debug printf. 2016-08-19 11:12:59 +00:00
mmel
e53a084db4 TEGRA: Implement MSI/MSIX interrupts for pcie controller. 2016-08-19 10:53:17 +00:00
mmel
28257ccca8 INTRNG: Rework handling with resources. Partially revert r301453.
- Read interrupt properties at bus enumeration time and store
   it into global mapping table.
 - At bus_activate_resource() time, given mapping entry is resolved and
   connected to real interrupt source. A copy of mapping entry is attached
   to given resource.
 - At bus_setup_intr() time, mapping entry stored in resource is used
   for delivery of requested interrupt configuration.
 - For MSI/MSIX interrupts, mapping entry is created within
   pci_alloc_msi()/pci_alloc_msix() call.
 - For legacy PCI interrupts, mapping entry must be created within
   pcib_route_interrupt() by pcib driver itself.

Reviewed by: nwhitehorn, andrew
Differential Revision: https://reviews.freebsd.org/D7493
2016-08-19 10:52:39 +00:00
manu
d7dbbd24ca Rename allwinner_machdep.{c.h} to aw_machdep.{c.h} as all allwinner source
files are name aw_*
2016-08-17 21:44:02 +00:00
manu
d85bbcbcc3 Rename kernel config A10 into ALLWINNER_UP as it is intend to work with all
Allwinner Uniprocessor SoC.
As of now it works with A10 and A13 (and possibly R8 as it is the same as the A13).
Move files.a10 into a1o subdirectory as it should be.
Rename std.a10 into std.allwinner_up
2016-08-17 20:32:08 +00:00
manu
a14760d440 Only set pud settings if this is a pullup or pulldown configuration.
This removes the need to set the MMC pins with pullups in our DTS.
Thanks to jmcneill@ for spotting this.

Tested on Orange Pi One (Allwinner H3).

MFC after:	1 week
2016-08-17 13:09:31 +00:00
manu
02a30ab736 a10_gpio_get_function now returns the whole function not only
GPIO_INPUT/GPIO_OUTPUT.
a10_gpio_get_pud now returns the whole pud not only PULLDOWN/PULLUP.
Add a10_gpio_get_drv to get the current drive strenght.
During fdt pin configure, avoid setting function/drive/pud if it's already in
the correct value.

Tested on Allwinner H3 and A20

MFC after:	1 week
2016-08-17 10:20:36 +00:00
kib
e56264ca17 Implement userspace gettimeofday(2) with HPET timecounter.
Right now, userspace (fast) gettimeofday(2) on x86 only works for
RDTSC.  For older machines, like Core2, where RDTSC is not C2/C3
invariant, and which fall to HPET hardware, this means that the call
has both the penalty of the syscall and of the uncached hw behind the
QPI or PCIe connection to the sought bridge.  Nothing can me done
against the access latency, but the syscall overhead can be removed.
System already provides mappable /dev/hpetX devices, which gives
straight access to the HPET registers page.

Add yet another algorithm to the x86 'vdso' timehands. Libc is updated
to handle both RDTSC and HPET.  For HPET, the index of the hpet device
to mmap is passed from kernel to userspace, index might be changed and
libc invalidates its mapping as needed.

Remove cpu_fill_vdso_timehands() KPI, instead require that
timecounters which can be used from userspace, to provide
tc_fill_vdso_timehands{,32}() methods.  Merge i386 and amd64
libc/<arch>/sys/__vdso_gettc.c into one source file in the new
libc/x86/sys location.  __vdso_gettc() internal interface is changed
to move timecounter algorithm detection into the MD code.

Measurements show that RDTSC even with the syscall overhead is faster
than userspace HPET access.  But still, userspace HPET is three-four
times faster than syscall HPET on several Core2 and SandyBridge
machines.

Tested by:	Howard Su <howard0su@gmail.com>
Sponsored by:	The FreeBSD Foundation
MFC after:	1 month
Differential revision:	https://reviews.freebsd.org/D7473
2016-08-17 09:52:09 +00:00
manu
d2876a8434 Correct the size of the softc in a10_ehci
Reported by:	andrew
MFC after:	1 week
2016-08-14 13:17:59 +00:00
pfg
ec13e55530 sys: replace comma with semicolon when pertinent.
Uses of commas instead of a semicolons can easily go undetected. The comma
can serve as a statement separator but this shouldn't be abused when
statements are meant to be standalone.

Detected with devel/coccinelle following a hint from DragonFlyBSD.

MFC after:	1 month
2016-08-09 19:42:20 +00:00
trasz
a0f6b98c95 Remove some NULL checks after M_WAITOK allocations from sys/arm/.
MFC after:	1 month
2016-08-09 16:02:35 +00:00
manu
83ae5b9d58 We need aw_nmi to be attached which needs GIC so attach a bit later.
Also the GPIOC doesn't need to be attach early

Reviewed by:	andrew
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D7082
2016-08-03 18:45:56 +00:00
emaste
c11f9ae8f4 Move/add ARM ELF PHDR types to elf_common.h
Accidentally missed in r303674
2016-08-02 20:26:04 +00:00
andrew
400e358789 Split out the FDT parts of the GICv2 interrupt controller driver. This will
allow us to add an ACPI attachment for arm64.

Obtained from:	ABT Systems Ltd
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D7307
2016-08-01 16:29:04 +00:00
loos
27f9b92c82 Enable the build of micphy as part of generic miibus build, but only for
FDT enabled systems.

Sponsored by:	Rubicon Communications (Netgate)
2016-07-28 05:59:56 +00:00
mav
fcb5c9368b Add more UEFI/e820 memory types from latest specifications.
This is only cosmetics.

MFC after:	2 weeks
2016-07-24 09:15:11 +00:00
loos
c01e7437ea Allow the use of micphy on am335x devices.
The Micrel PHYs reads the optional external delays from DTB.

Tested and used by uBMC and uFW.

Sponsored by:	Rubicon Communications (Netgate)
2016-07-24 01:31:41 +00:00
loos
57e14be08d Remove unused USB ethernet driver from BEAGLEBONE/AM335x kernel. 2016-07-23 17:36:17 +00:00
manu
bebfa265c8 PC5 doesn't have mmc2 function. 2016-07-22 14:39:55 +00:00
manu
613d6982e7 axp209 needs aw_nmi so attach a bit earlier
Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D7081
2016-07-21 13:28:07 +00:00
manu
d3b52c7a3a We need the GIC to be attached so attach later at BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE
Reviewed by:	andrew
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D7080
2016-07-21 13:26:39 +00:00
manu
41b7aa7514 Add support for the SID (Security ID Module) on Allwinner A10 and A20.
The rootkey is burnt at production and can't be changed, thus is can be used
as a device unique ID or to generate a MAC address (This is was u-boot does).
The rootkey is exposed as a sysctl (dev.aw_sid.<unit>.rootkey).

Reviewed by:	jmcneill
Differential Revision:	https://reviews.freebsd.org/D6383
2016-07-20 11:23:06 +00:00
markm
b1e796bd34 Random bit generator (RBG) driver for RPi and RPi2.
Summary:
This driver supports the following methods to trigger gathering random bits from the hardware:
1. interrupt when the FIFO is full (default) fed into the harvest queue
2. callout (when BCM2835_RNG_USE_CALLOUT is defined) every second if hz is less than 100, otherwise hz / 100, feeding the random bits into the harvest queue

If the kernel is booted with verbose enabled, the contents of the registers will be dumped after the RBG is started during the attach routine.

Author: hackagadget_gmail.com (Stephen J. Kiernan)

Test Plan: Built RPI2 kernel and booted on board. Tested the different methods to feed the harvest queue (callout, interrupt) and the interrupt driven approach seems best. However, keeping the other method for people to be able to experiment with.

Reviewed By: adrian, delphij, markm

Differential Revision: https://reviews.freebsd.org/D6888
2016-07-19 18:07:47 +00:00
loos
76cc53727a Fix a random memory overwrite at boot time, simplebus_init() and
simplebus_add_device() expect a simplebus_softc structure associated with
the device.

Add the simplebus_softc as first member in am335x_pwmss_softc structure.

Sponsored by:	Rubicon Communications (Netgate)
2016-07-18 06:35:40 +00:00
mmel
3815c80a2e TEGRA: Subclass Tegra PCIE driver from ofw_pci base driver.
Remove now redundant code.
2016-07-17 14:45:15 +00:00
jmcneill
3536184370 Add support for Allwinner H3 EMAC.
H3 EMAC is the same as A83T/A64 except the SoC includes an (optional)
internal 10/100 PHY. Both internal and external PHYs are supported on H3
with this driver.
2016-07-16 18:06:41 +00:00
jmcneill
fb6c2d6ae3 Allwinner Gigabit EMAC performance improvements.
- Support DEVICE_POLLING
 - Increase TX descriptors to 1024
 - Add support for passing a chain of mbufs to if_input, reducing the
   number of calls to mtx_unlock/mtx_lock under load.
 - Remove duplicate byteswap when setting TX_INT_CTL in TX descriptor.
 - Set undocumented "TX_NEXT_FRAME" bit in TX control 1 register.
   According to the A83T BSP, setting this bit allows the DMA engine to
   operate on a packet while receiving another.

Tested on A83T (1000Mbps PHY) and H3 (100Mbps PHY).

Reviewed by:		manu
Differential Revision:	https://reviews.freebsd.org/D7031
2016-07-13 20:46:54 +00:00
jmcneill
45e538b37f H3/A83T: Use PLL_PERIPH/2 for AHB2 parent clock.
Reviewed by:	manu
2016-07-13 20:44:02 +00:00
ache
23a48963e2 Undo r302601, WCHAR_MAX may not be a valid wchar value. 2016-07-12 04:20:44 +00:00
ache
97629b93ec I don't know why unsigned int is choosed for wchar_t here, but WCHAR_MAX
should be <= WINT_MAX. It is bigger, __UINT_MAX > INT32_MAX
2016-07-12 00:37:48 +00:00
jmcneill
3c9e90ee71 Add support for Allwinner A64.
Reviewed by:	andrew, manu
2016-07-11 20:15:46 +00:00
jmcneill
800eb31d87 Return early from bus_dmamap_load callback if the error indicator is set.
Reviewed by:	andrew, manu
2016-07-11 20:14:50 +00:00
jmcneill
044825ce9b Add support for arm64. The allwinner_soc_family() function is not available
on arm64 and all SoCs using the old FIFO register location are 32-bit only,
so unconditionally use the new location for arm64.

Reviewed by:	andrew, manu
2016-07-11 20:13:46 +00:00
jmcneill
d6a0058b54 Add support for Allwinner A64 CPUx-PORT and CPUs-PORT Port Controllers.
Reviewed by:	andrew, manu
2016-07-11 20:09:17 +00:00
jmcneill
8790b21301 Add Allwinner A64 padconf settings.
Reviewed by:	andrew, manu
2016-07-11 20:06:21 +00:00
jmcneill
85d35ccc5c Include sys/rman.h to fix build on arm64. 2016-07-11 20:03:31 +00:00
jmcneill
488f54054a Attach RSB early. Children of RSB may provide resources necessary for
other devices such as interrupts, GPIOs, and regulators.
2016-07-11 20:02:51 +00:00
jmcneill
f2de5652bc Build fix for arm64. The phy interface uses intptr_t for the "phy"
parameter, not int.
2016-07-11 20:00:57 +00:00
jmcneill
711b1c37db Remove unused bus_space prototypes. 2016-07-11 19:58:00 +00:00
mmel
e9bc0691a8 EXTRES: Add OF node as argument to all <foo>_get_by_ofw_<bar>() functions.
In some cases, the driver must handle given properties located in
specific OF subnode. Instead of creating duplicate set of function, add
'node' as argument to existing functions, defaulting it to device OF node.

MFC after: 3 weeks
2016-07-10 18:28:15 +00:00
jmcneill
6b3911b95d Align descriptors and data buffers to 32 bits. This restriction is
described in the A20 (and later) user manuals.
2016-07-10 10:38:28 +00:00
jmcneill
4e3ae1e52c In the absence of a bus-width property, default to 4-bit bus width instead
of 1-bit.
2016-07-10 10:21:22 +00:00
ian
07d0b2f49e Remove HZ=<various> from all armv6 configs, put HZ=1000 in std.armv6.
All armv6 processors are plenty fast enough for HZ=1000.

No changes are made for older arm systems, because some chips are a bit
wimpy for 1000 while others do fine, so it has to be set on a per-config
basis.
2016-07-09 21:14:59 +00:00
ian
34a21f50d3 Consolidate debugging options from all arm kernel configs to std.arm[v6]. 2016-07-09 20:42:57 +00:00
ian
68a1ef342e Correct syntax errors that only show up when compiled with INVARIANTS. 2016-07-09 18:43:15 +00:00
andrew
958c5d269e Remove an unneeded call to fdt_get_unit, the return value is unused.
MFC after:	1 month
Sponsored by:	ABT Systems Ltd
2016-07-09 13:27:14 +00:00
manu
658462a122 Add support for Allwinner A13.
Reviewed by:	jmcneill
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D6809
2016-07-08 23:38:25 +00:00
manu
340dbdfec1 Check that the pin function exists before setting it.
This is needed for Allwinner A13 which has gpio pins with only "out" function.
2016-07-08 23:08:59 +00:00
loos
0fe76d31f1 Fix a lockup in tx path for cspw.
Sometimes the software loses the race when appending more descriptors to
the tx ring and the tx queue stops.

This commit detects this condition and restart the tx queue whenever it stall.

Tested by:	sobomax@, Keith White <kwhite@site.uottawa.ca>,
	Paul Mather <paul@gromit.dlib.vt.edu>
Sponsored by:	Rubicon Communications (Netgate)
Approved by:	re (kib)
2016-07-07 20:01:03 +00:00
ian
6a5a941a5e Revert the recent armv6 changes to ALIGNED_POINTER(), restoring the
fully-pessimized implementation that requires a type to be aligned to
its natural size.

On armv6+ the compiler might generate load-/store-multiple instructions
which require 4-byte alignment even though the source code is only
accessing individual uint32_t values in a way that doesn't require any
particular alignment at all.  The compiler apparently feels free to
combine multiple accesses into a single instruction that requires a
more-strict alignment, and no set of compiler flags seems to disable
this behavior (at least in clang 3.8).

This fixes alignment faults on arm systems using wifi adapters.  The
wifi code uses ALIGNED_POINTER(p, uint32_t) to decide whether it needs
to copy-align tcp headers.  Because clang is combining several uint32_t
accesses into a single ldm instruction, we need to say that accessing a
uint32_t requires 4-byte alignment.

Approved by:	re(gjb)
2016-06-21 17:53:42 +00:00
kib
496a3b1f65 Update comments for the MD functions managing contexts for new
threads, to make it less confusing and using modern kernel terms.

Rename the functions to reflect current use of the functions, instead
of the historic KSE conventions:
  cpu_set_fork_handler -> cpu_fork_kthread_handler (for kthreads)
  cpu_set_upcall -> cpu_copy_thread (for forks)
  cpu_set_upcall_kse -> cpu_set_upcall (for new threads creation)

Reviewed by:	jhb (previous version)
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Approved by:	re (hrs)
Differential revision:	https://reviews.freebsd.org/D6731
2016-06-16 12:05:44 +00:00
andrew
fca40282bd Move the arm call to intr_pic_init_secondary earlier in the secondary CPU
initialisation. This ensures it will complete before signalling to the boot
CPU it has booted. This fixes a race with the GIC where the arm_gic_map may
not be populated before it is used to bind interrupts leading to some
interrupts becoming bound to no CPUs.

Approved by:	re (kib)
Sponsored by:	ABT Systems Ltd
2016-06-14 16:41:39 +00:00
ian
ccff332313 Do not define __NO_STRICT_ALIGNMENT for armv6. While the requirements
are no longer natural-alignment strict, there are still some restrictions.

FreeBSD network code assumes data is naturally-aligned or is running
on a platform with no restrictions; pointers are not annotated to
indicate the data pointed to may be packed or unaligned.  The clang
optimizer can sometimes combine the load or store of a pair of adjacent
32-bit values into a single doubleword load/store, and that operation
requires at least 4-byte alignment.  __NO_STRICT_ALIGNMENT can lead
to tcp headers being only 2-byte aligned.

Note that alignment faults remain disabled on armv6, this change reverts
only the defining of the symbol which leads to some overly-agressive code
shortcuts when building common/shared drivers and network code for arm.

Approved by:	re(kib)
2016-06-13 16:48:27 +00:00
andrew
18004ce4bf Remove the ARMv4/ARMv5 userland atomic support from struct proc on armv6.
Nothing should use this on armv6 as we use the atomic instructions added in
ARMv6k.

Sponsored by:	ABT Systems Ltd
2016-06-08 22:29:30 +00:00
andrew
eafe86b137 Start to clean MIDR values using the CPUID scheme. We don't need to know
the exact CPU we are running on to set the cpu functions. Relax the check
to ignore the CPU revision. Even so this may still be too specific.

Reviewed by:	mmel
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D6504
2016-06-07 18:50:36 +00:00
skra
612e6958e4 INTRNG - change the way how an interrupt mapping data are provided
to the framework in OFW (FDT) case.

This is a follow-up to r301451.

Differential Revision:	https://reviews.freebsd.org/D6634
2016-06-05 16:20:12 +00:00
pfg
f727892517 tegra124: use roundup/rounddown macros from <sys/param.h>. 2016-06-03 21:11:34 +00:00
zbb
08f6ef2014 Use nitems() macro instead of re-inventing it
Fixed after r301221.

Pointed out by:	oshogbo
Submitted by:	Michal Stanek <mst@semihalf.com>
Obtained from:	Semihalf
2016-06-03 18:52:57 +00:00
skra
edf0e66e31 Define irq variable only in the block where used. 2016-06-03 11:18:30 +00:00
skra
5583bfd183 Postpone allocation of IRQ resource to the time when interrupt
controller devices are attached. This has already been done for
bus_setup_intr().

There was no doubt that if someone wants to setup an interrupt,
corresponding interrupt controller device must already be attached.
However, the same must be valid for allocation of an interrupt resource
unless the allocation is done blindly, without any information that
such interrupt even exists. While it was done this blind way before,
it won't be possible after next INTRNG change.
2016-06-03 11:05:55 +00:00
zbb
44920da28c Add support for CESA on Armada38x
Changes:
- added new SoC ID in CESA attach
- allowed crypto driver IDs other than 0
- added CESA nodes to Armada38x .dts files
- enabled required devices in kernconf

Submitted by:	Michal Stanek <mst@semihalf.com>
Obtained from:	Semihalf
Sponsored by:	Stormshield
Differential revision:	https://reviews.freebsd.org/D6220
2016-06-02 18:41:33 +00:00
zbb
b408dead16 Configure CPU window to second CESA SRAM
Check if there is a second CESA SRAM node in FDT and add a CPU window
for it. Define A38X specific macro for setting device attribute for
each node.

Submitted by:	Michal Stanek <mst@semihalf.com>
Obtained from:	Semihalf
Sponsored by:	Stormshield
Differential revision:	https://reviews.freebsd.org/D6216
2016-06-02 18:33:26 +00:00
zbb
4f50db8270 Map CESA SRAM memory in driver attach for Armada38x
On other platforms with CESA accelerator the SRAM memory is mapped in
early init before driver is attached. This method only works correctly
with mappings no smaller than L1 section size (1MB). There may be more
SRAM blocks and they may have smaller sizes than 1MB as is the case
for Armada38x. Instead, map SRAM memory with bus_space_map() in CESA
driver attach. Note that we can no longer assume that VA == PA for the
SRAM.

Submitted by:	Michal Stanek <mst@semihalf.com
Obtained from:	Semihalf
Sponsored by:	Stormshield
Differential revision:	https://reviews.freebsd.org/D6215
2016-06-02 18:31:36 +00:00
jmcneill
999dd0704f Fix a crash while iterating compat strings when no match is found.
Spotted by:	ian
2016-05-31 21:58:09 +00:00
andrew
cc3993686f arm_gic_map is a mask not the CPUs ID, there is no need to shift it.
Pointy-hat to:	andrew
Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-05-31 18:05:17 +00:00
andrew
1fe2fc141a Bin interrupts to the correct CPU when we boot on a non-zero CPU.
Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-05-31 17:49:47 +00:00
zbb
43ac6ab3a1 Improve ARM debug_monitor for SMP machines
- Reset debug architecture and enable monitor for secondary
  CPUs in init_secondary() rather than when configuring watchpoint, etc.
- Disable HW debugging capabilities when one of the CPU cores fails
  to set up.
- Use dbg_capable() in a more atomic manner to avoid any mismatch
  between CPUs.

Differential Revision: https://reviews.freebsd.org/D6009
2016-05-29 17:35:38 +00:00
zbb
041ba1ed24 Fix debug_monitor code for older ARMs (ARM11)
- Enable monitor mode prior to accessing watchpoint
  registers for v6, v6.1 architectures.
- Fix configuration scheme for v6, v6.1 and v7 Debug Archs
- Enable monitor unconditionally and for good instead
  of enabling and disabling it (needed for single stepping
  on on v6/v6.1)

Tested on RPI-B and Arndale

Differential Revision: https://reviews.freebsd.org/D6008
2016-05-29 17:33:49 +00:00
mmel
8cfacdd69c ARM GIC: Allow to setup interrupt without configuration data.
In some cases, like for PCI devices, only interrupt numbers are enumerated
from HW. In this case, use INTR_foo_CONFORM as level and trigger values.
2016-05-29 07:39:56 +00:00
ian
a8f815c9b3 Add support for triggering interrupts on both rising and falling edges.
Also, EOI a gpio interrupt in the post_ithread routine before re-enabling.
2016-05-26 22:34:25 +00:00
manu
75eb020bfe Add support for interrupts, sensors and GPIO for AXP209 PMIC.
Pressing the PEK (power enable key) will shutdown the board.
Some events are reported to devd via system "PMU" and subsystem
"Battery", "AC" and "USB" such as connected/disconnected.
Some sensors values (power source voltage/current) are reported via
sysctl (dev.axp209_pmu.X.)
It also expose a gpioc node usable in kernel and userland. Only 3 of
the 4 GPIO are exposed (The GPIO3 is different and mostly unused on
boards). Most popular boards uses GPIO1 as a sense pin for OTG power.
Add a dtsi file that adds gpio-controller capability to the device as
upstream doesn't defined it and include it in our custom DTS.

Reviewed by:	jmcneill
Approved by:	cognet (mentor)
Differential Revision:	https://reviews.freebsd.org/D6135
2016-05-26 21:09:07 +00:00
loos
934ebc933e Only do the touch screen setup when the 'ti,wires' property is present.
While here fix a typo in a debug message.
2016-05-26 18:52:26 +00:00
jmcneill
2a73bea3e8 Enable USB PHY regulators when requested by the host controller driver.
Previously the USB PHY driver would enable all regulators at attach time.
This prevented boards from booting when powered by the USB OTG port, as
it didn't take VBUS presence into consideration.
2016-05-26 10:50:39 +00:00
ian
9b1c09bf1e Another round of changes to add compatibility with the older ESHDC variety
of hardware.  Mostly this focuses on the big changes needed for setting the
bus clock, because ESDHC is SDHCI v2.0 and USDHC is 3.0, and the number,
location, and interpretation of clock divisor bits is vastly different
between the two.  This doesn't get the device all the way to functioning
on ESDHC hardware yet, but it's much closer, now getting through all the
card detection and negotiation of capabilties and speed (but it eventually
hangs on what appears to be a missing interrupt).

Another missing chunk of code for handling ESDHC's 32 bit command-and-mode
register using sdhci's pair of 16 bit writes is added.

This also does some leading whitespace cleanups and sorts some softc
struct members by size, and adds some comments (because when do I ever
touch code without adding comments?).
2016-05-26 03:55:27 +00:00
ian
221ca14ee2 Disable alignment faults on armv6, adjust various alignment-related macros
to match the new state of affairs.  The hardware we support has always been
able to do unaligned accesses, we've just never enabled it until now.

This brings FreeBSD into line with all the other major OSes, and should help
with the growing volume of 3rd-party software that assumes unaligned access
will just work on armv6 and armv7.
2016-05-26 00:03:23 +00:00
ian
8d8c35656e Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn't
have ACLE support built in.  The ACLE (ARM C Language Extensions) defines
a set of standardized symbols which indicate the architecture version and
features available.  ACLE support is built in to modern compilers (both
clang and gcc), but absent from gcc prior to 4.4.

ARM (the company) provides the acle-compat.h header file to define the
right symbols for older versions of gcc.  Basically, acle-compat.h does
for arm about the same thing cdefs.h does for freebsd: defines
standardized macros that work no matter which compiler you use.  If ARM
hadn't provided this file we would have ended up with a big #ifdef __arm__
section in cdefs.h with our own compatibility shims.

Remove #include <machine/acle-compat.h> from the zillion other places (an
ever-growing list) that it appears.  Since style(9) requires sys/types.h
or sys/param.h early in the include list, and both of those lead to
including cdefs.h, only a couple special cases still need to include
acle-compat.h directly.

Loves it:     imp
2016-05-25 19:44:26 +00:00
skra
8c49ce7aa0 Add more info about the issue fixed in r298460. Rephrase some sentences
and fix grammar.

No functional change.

Suggested by:	alc
Reviewed by:	alc
2016-05-25 10:09:23 +00:00
ian
fa8c81268a Spaces->tab in comment. 2016-05-23 20:13:17 +00:00
ian
2af15fd49f Oops, fix a paste-o commited in r300533. 2016-05-23 20:12:38 +00:00
ian
2308d1c500 Use the new(-ish) CP15_SCTLR macro to generate system control reg accesses
where possible.  In the places that doesn't work (multi-line inline asm,
and places where the old armv4 cpufuncs mechanism is used), annotate the
accesses with a comment that includes SCTLR.  Now a grep -i sctlr can find
all the system control register manipulations.

No functional changes.
2016-05-23 20:07:17 +00:00
skra
790244c47d INTRNG - support new interrupt mapping type INTR_MAP_DATA_GPIO
introduced in r298738.

Reviewed by:	ian
2016-05-23 18:16:21 +00:00
skra
f7192b1fcd INTRNG - use gpio generic interrupt modes definitions added in r298738.
Reviewed by:	ian
2016-05-23 18:12:52 +00:00
loos
f73b4006ff Fix the deciKelvin to Celsius conversion in kernel.
After r285994, sysctl(8) was fixed to use 273.15 instead of 273.20 as 0C
reference and as result, the temperature read in sysctl(8) now exibits a
+0.1C difference.

This commit fix the kernel references to match the reference value used in
sysctl(8) after r285994.

Sponsored by:	Rubicon Communications (Netgate)
2016-05-22 13:58:32 +00:00
skra
1f47b7e46f INTRNG - implement pic_post_filter method. This method is fundamental
one and must always be implemented for a PIC. There is no default for
it intentionally.
2016-05-22 11:42:34 +00:00
skra
a17f3c7f95 Fix some format strings to make them either correct or uniform.
No functional change.
2016-05-22 09:59:43 +00:00
ian
04232be1fd Adjust _ALIGNBYTES to the proper value for arm and armv6 arches. Modern
compilers can emit arm instructions that require 8-byte alignment.  The
alignment-sensitive instructions were added in armv5, which has to be
supported by our combined v4/v5 kernels, so the value is set uncoditionally
for all arm architecture versions.

Also adjust the comment to explain in more detail why the macros have the
form and values they do.

Per advice from bde@, maintain the unsignedness of the value of _ALIGNBYTES
(but do so using his second choice of allowing sizeof() to supply the
unsignedness, rather than just hardcoding '8U', which in my mind would
require an even more verbose comment to explain why it's right).  Also
explain in the comment that the resulting type of _ALIGN() is equivelent
to uinptr_t on arm (32-bit unsigned int), but it's purposely spelled as
"unsigned" to avoid problems with including other header files.  Even
including machine/_types.h to allow use of __uintptr_t causes compilation
failures because of this header being included (indirectly) in asm code.

The discussion that led to this change (albeit at a glacial pace) is at
https://lists.freebsd.org/pipermail/svn-src-head/2014-November/064593.html
2016-05-21 16:52:38 +00:00
imp
7a794263a9 Remove hf appending code from param.h for machine arch name.
Submitted by: ian@ andyt@
2016-05-20 19:18:32 +00:00
gonzo
3d792906ce Use OF_prop_free instead of direct call to free(9)
Reviewed by:	ganbold
2016-05-18 23:41:58 +00:00
andrew
5755bcaba9 Return the struct intr_pic pointer from intr_pic_register. This will be
needed in later changes where we may not be able to lock the pic list lock
to perform a lookup, e.g. from within interrupt context.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-05-18 15:05:44 +00:00
andrew
f7a973e64a Implement atomic_cmpset_acq_64 and atomic_cmpset_rel_64 on arm and armeb.
This should allow r300113 to build there.

Sponsored by:	ABT Systems Ltd
2016-05-18 13:09:52 +00:00
manu
627859d86b Add driver for "generic-ohci" as defined by FDT.
If platform support EXT_RESOURCES, clocks and resets are handled out of
the box.
If not driver can be subclassed using the generic_usb interface.
generic_usb name was choosed because at one point I'll add generic-ehci
FDT driver.

Reviewed by:	jmcneill, hselasky
Approved by:	andrew (mentor)
Differential Revision:	https://reviews.freebsd.org/D5481
2016-05-17 17:46:12 +00:00
bz
083ca1a6af The GIC (v2 at least) has a bit in the TYPER register to indicate whether the GIC
supports the Security Extensions or not. This bit is not the same as the CPU one.
Currently we are not checking for either before trying to write to the special
registers.  This can lead to problems on hardware or simulators that do not
provide the security extensions.  Add the missing checks. Their interactions with
the CPU flag is not entirely clear to me but using a macro will make it easier
to quickly adjust the condition once the CPU bits are sorted as well.

Reviewed by:	br
Sponsored by:	DARPA/AFRL
Differential Revision:	https://reviews.freebsd.org/D6397
2016-05-17 13:12:26 +00:00
eadler
156fd4834a Don't repeat the the word 'the'
(one manual change to fix grammar)

Confirmed With: db
Approved by: secteam (not really, but this is a comment typo fix)
2016-05-17 12:52:31 +00:00
bz
60974e1116 Add HWPMC_HOOKS to std.armv6 to make them available
so the module could be loaded.

Discussed with:	andrew
Reviewed by:	andrew
Sponsored by:	DARPA/AFRL
Differential Revision:	https://reviews.freebsd.org/D6359
2016-05-16 19:07:58 +00:00
andrew
f1a8e245ae Introduce MSI and MSI-X support to intrng. This adds a new msi device
interface with 5 methods to mirror the 5 MSI/MSI-X methods in the pcib
interface. The pcib driver will need to perform a device specific lookup
to find the MSI controller and pass this to intrng as the xref. Intrng
will finally find the controller and have it handle the requested operation.

Obtained from:	ABT Systems Ltd
MFH:		yes
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D5985
2016-05-16 09:11:40 +00:00
jmcneill
080d30771a Add Allwinner A83T thermal sensor controller support.
The A83T thermal sensor controller has three sensors. Sensor 0 corresponds
to CPU cluster 0, sensor 1 to CPU cluster 1, and sensor 2 to the GPU. This
driver exports the temperature sensor readings via sysctl.

Calibration data is obtained from SRAM found in the Secure ID module.

Reviewed by:		manu
Differential Revision:	https://reviews.freebsd.org/D6378
2016-05-15 22:36:55 +00:00
jmcneill
fe308664e7 Reduce complexity of RSB by always using polling mode. Unfortunately
gpiobus methods can be called with non-sleepable locks held.

Reviewed by:	mmel
2016-05-15 16:43:47 +00:00
jmcneill
64532e8758 Add support for the AXP813/AXP818 power key and GPIO pins. 2016-05-15 15:54:41 +00:00
jmcneill
719c4dbf8a Allow RSB to be used from interrupt handlers.
The driver uses polling mode if cold or !THREAD_CAN_SLEEP() and now
implements the bus_* interface.
2016-05-15 15:52:34 +00:00
mmel
04d6bbac79 TEGRA: Also attach gpioc to tegra_gpio driver. Forgotten in r299854. 2016-05-15 15:31:44 +00:00
mmel
915b5c77ef TEGRA: Don't use common name 'iicb' for tegra specific IIC driver.
Using commn name for different drivers breaks generic kernel creation.
2016-05-15 15:14:46 +00:00
mmel
5815e95d81 TEGRA: Don't use common name 'gpio' for tegra specific GPIO driver.
Using commn name for different drivers breaks generic kernel creation.
2016-05-15 14:47:50 +00:00
manu
39696f1b57 Allow arm generic_timer code to be included even if not present in the
SoC.

Reviewed by:	andrew
Approved by:	cognet (mentor)
Differential Revision:	https://reviews.freebsd.org/D6372
2016-05-15 13:20:59 +00:00
jmcneill
9d3d62e74b Add and enable Allwinner RSB and AXP81x power management IC drivers. 2016-05-14 23:34:57 +00:00
jmcneill
e7a22a83ed Add a basic driver for X-Powers AXP813 and AXP818 power management ICs.
This driver simply installs a shutdown event handler for handling
RB_POWEROFF at shutdown. Tested on a Sinovoip BananaPi BPI-M3.
2016-05-14 23:33:57 +00:00
jmcneill
25b22e2f07 Add a driver for the Allwinner Reduced Serial Bus (RSB).
The RSB controller speaks a simplified two wire protocol at speeds up to
20MHz. It is used on sun8i and sun9i family SoCs to communicate with
power management ICs.

RSB isn't really I2C or SMBus, but the driver exposes an iicbus interface
to simplify power management IC drivers (which may need to support both
RSB and I2C connectivity).
2016-05-14 23:27:54 +00:00
jmcneill
1a19f256d1 Update comment at top of file to mention all currently supported Allwinner
SoCs. Previously mentioned A20 and A31, added A31S, A83T, and H3.
2016-05-14 10:39:57 +00:00
gonzo
97137b2e28 Use OF_prop_free instead of direct call to free(9)
Reviewed by:	mmel@
2016-05-14 05:00:17 +00:00
gonzo
55d8594415 Use OF_prop_free instead of direct call to free(9)
Approved by:	jmcneill
2016-05-13 22:28:02 +00:00
gonzo
4bfe2ceb33 Use OF_prop_free instead of direct call to free(9) 2016-05-13 22:05:16 +00:00
manu
6964acf1f0 Add support for Allwinner H3 SoC.
For now clocks, GPIO, Pinmux, UART, MMC, EHCI is supported.
Tested on OrangePi-One

Reviewed by:	jmcneill
Approved by:	cognet (mentor)
Differential Revision:	https://reviews.freebsd.org/D6311
2016-05-13 18:20:54 +00:00
gonzo
23a2d5f593 Add OF_prop_free function as a counterpart for OF_*prop_alloc
- Introduce new OF API function OF_prop_free to free memory allocated by
  OF_getprop_alloc and OF_getencprop_alloc. Current code just calls free(9)
  with M_OFWPROP memory class which assumes knowledge about OF_*prop_alloc
  functions' internals and leads to unneccessary code coupling

- Convert some of the free(..., M_OFWPROP) instances to OF_prop_free

Files affected by this commit are the ones I was able to test on real
hardware. The rest of free(..., M_OFWPROP) instances will be handled with
idividual maintainers

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D6315
2016-05-11 18:20:02 +00:00
gonzo
b05aea41fa Pass device tree node as a part of gpio_pin_get_by_ofw_XXX API
Current API assumes that "gpios" property belongs to the device's node but for
some binding it's not true: gpiokeys has set of child nodes with this property.

Patch adds new argument instead of replacing device_t because device_t will be
used to track ownership for allocated pins

Reviewed by:	mmel
Differential Revision:	https://reviews.freebsd.org/D6277
2016-05-10 20:02:03 +00:00
manu
bcdd9068f7 When PLATFORM_SMP is enabled, check if tunable hw.ncpu is set and valid
(>= 1 and <= real ncores) and set mp_ncpus to it.

Approved by:	andrew (mentor)
Differential Revision:	https://reviews.freebsd.org/D6151
2016-05-10 19:11:25 +00:00
manu
7adfd9bb61 Merge a20_mp_start_ap and a31_mp_start_ap into one function.
This function works with all smp non-multicluster allwinner SoC (A20, A31, A31S and H3).

Approved by:	cognet (mentor)
Differential Revision:	https://reviews.freebsd.org/D6269
2016-05-10 18:00:37 +00:00
skra
a172d95fac INTRNG - update gpio pin capabilities according to r299198. 2016-05-08 09:01:30 +00:00
skra
48408bced4 INTRNG - update gpio pin capabilities according to r299166.
Note that the updated comment is valid only for INTRNG. This should not
be a problem as not INTRNG code is left in place for debugging reasons
only and should not be used anymore. It's anticipated that this old
code will be removed soon.
2016-05-08 08:57:50 +00:00
skra
17e4d8bd45 INTRNG - support new interrupt mapping type INTR_MAP_DATA_GPIO
introduced in r298738.
2016-05-06 20:57:41 +00:00
skra
7384b6e034 INTRNG - use gpio interrupt modes definitions added in r298738 and
implement also GPIO_INTR_EDGE_BOTH mode. All reasonable interrupt
modes are supported now.
2016-05-06 20:55:14 +00:00
skra
3bddc92a33 INTRNG - support new interrupt mapping type INTR_MAP_DATA_GPIO
introduced in r298738.
2016-05-06 08:59:25 +00:00
skra
5320545e5d INTRNG - use gpio interrupt modes definitions added in r298738 and
implement also GPIO_INTR_EDGE_BOTH mode. All reasonable interrupt
modes are supported now.
2016-05-06 08:56:46 +00:00
jhb
469bc5c414 Fix <sys/_bitset.h> and <sys/_cpuset.h> to not require <sys/param.h>.
- Hardcode '8' instead of NBBY in _BITSET_BITS.
- Define a private version of 'howmany' for use in __bitset_words().
- While here, move a few more things out of _bitset.h and _cpuset.h to
  bitset.h and cpuset.h, respectively.  The only things left in
  _bitset.h and _cpuset.h are the bits needed to define a bitset
  structure.

Reviewed by:	bde, kib (ish)
2016-05-05 15:43:26 +00:00
skra
ee35e13013 INTRNG - redefine struct intr_map_data to avoid headers pollution. Each
struct associated with some type defined in enum intr_map_data_type
must have struct intr_map_data on the top of its own definition now.
When such structs are used, correct type and size must be filled in.

There are three such structs defined in sys/intr.h now. Their
definitions should be moved to corresponding headers by follow-up
commits.

While this change was propagated to all INTRNG like PICs,
pic_map_intr() method implementations were corrected on some places.
For this specific method, it's ensured by a caller that the 'data'
argument passed to this method is never NULL. Also, the return error
values were standardized there.
2016-05-05 13:31:19 +00:00
jmcneill
2fab455b80 Add support for the Allwinner A83T (sun8iw6p1) SoC.
Clocks, GPIO, UART, SD card / eMMC, USB, watchdog, and ethernet are
supported. Note that the A83T contains two clusters of four Cortex-A7
CPUs, and only CPUs in first cluster are started for now.

Tested on a Sinovoip Banana Pi BPI-M3.
2016-05-05 09:41:57 +00:00
jmcneill
4be5f4b925 Add driver for Allwinner A83T/H3/A64 Gigabit Ethernet.
The datasheets refer to this controller as EMAC, not to be confused with
the fast ethernet controller (also named EMAC) found in A10/A20 SoCs.

Tested on a BananaPi M3 (A83T), which uses an external RGMII PHY (RTL8211E).

Reviewed by:		adrian
Differential Revision:	https://reviews.freebsd.org/D6169
2016-05-04 20:06:20 +00:00
bz
ba335e3838 While gem5 is not qemu, we treat it as "simulators" or "virtual environments".
Add the needed hardcoded gem5 attachments for the UART there, re-using all
the other bits.

In collaboration with:	andrew
Sponsored by:		DARPA/AFRL
Reviewed by:		andrew
MFC after:		2 weeks
Differential Revision:	https://reviews.freebsd.org/D6204
2016-05-04 16:24:12 +00:00
bz
64ae5d371f The virtual timer is optional on ARM64. Properly handle that condition. [1]
In case we do not have an interrupt assignment for the virtual timer,
force the physical timer.
Also skip resource allocation for any timer we do not have an interrupt
assignment for.

In collaboration with:	andrew
Submitted by:		br ([1] from his gem5 arm64 work)
Sponsored by:		DARPA/AFRL
Reviewed by:		andrew
MFC after:		2 weeks
Differential Revision:	https://reviews.freebsd.org/D6203
2016-05-04 16:15:39 +00:00
bz
a3bf622b6a The ARM generic timer keeps ticking even if disabled or it expired.
In case of updating it with a very low value it might expire again
after writing the tval but before updating ctrl. In that case we do
lose the status bit saying that the timer expired and we will consequently
not get an interrupt for it, leaving the timer in a "dead" state.

In order to solve this increase the minimum period with what the timer
can be loaded to something higher.

Found & analysed with:	gem5
Debugged with:		andrew
Sponsored by:		DARPA/AFRL
Reviewed by:		andrew
MFC after:		2 weeks
Differential Revision:	https://reviews.freebsd.org/D6202
2016-05-04 16:09:51 +00:00
pfg
eac6031c8a sys/arm: Minor spelling fixes.
Only affects comments: no functional change.
2016-05-04 15:48:59 +00:00
manu
be5da69837 ACK the interrupt after disabling it, this avoid an interrupt storm.
Approved by:	andrew (mentor)
2016-04-30 18:07:13 +00:00
andrew
de62827a8a Add a MULTIDELAY option to allow the ARM kernel to have multiple DELAY
implementations. Early in the boot the kernel will use an approximate,
however after the timer has been probed it will switch to a more accurate
implementation.

Reviewed by:	manu
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D5762
2016-04-30 17:27:33 +00:00
pfg
e72339bbf0 sys: Make use of our rounddown() macro when sys/param.h is available.
No functional change.
2016-04-30 14:41:18 +00:00
jhb
050f1049b2 Move 'device pci' for the PCI bus driver to the MI NOTES file.
The PCI bus was already listed in all of the MD NOTES files and the
driver should at least compile on all platforms.
2016-04-29 23:53:55 +00:00
jhb
b08d82b7ef Remove vestiges of IEEE-488/GPIB drivers removed in r276214. 2016-04-29 22:29:33 +00:00
gonzo
036d9a357d Add driver for AM33xx SoC touchscreen
Split ADC driver in two halves: ADC(analog ot digital) and
TSC(touchscreen). Touchscreen driver is fully functional
up to the point of reporting samples. This part will be added
once FreeBSD has API for touchscreen.

Tested on: Beaglebone Black + 4DCAPE-43T
Reviewed by:	loos
Differential Revision:	https://reviews.freebsd.org/D5847
2016-04-29 20:31:49 +00:00
mmel
bc75177023 TEGRA: Add interrupt support for Tegra GPIO controller. 2016-04-28 13:00:40 +00:00
mmel
947f5872a5 ARM: Use kernel pmap as intermediate mapping in context switch.
On ARM, we can directly switch between translation tables only when
the size of the mapping for any given virtual address is the same in
the old and new translation tables. The load of new TTB and subsequent
TLB flush is not atomic operation. So speculative page table walk can
load TLB entry from new mapping while rest of TLB entries are still the
old ones. In worst case, this can lead to situation when TLB cache can
contain multiple matching TLB entries. One (from old mapping) L2 entry
for VA + 4k and one (from new mapping) L1 entry for VA.

Thus, we must switch to kernel pmap translation table as intermediate
mapping because all sizes of these (old pmap and kernel pmap) mappings
are same (or unmapped). The same is true for switch from kernel pmap
translation table to new pmap one.
2016-04-28 12:05:07 +00:00
manu
babc28ae54 Add support for the Non-maskable interrupt driver found in the Allwinner A20 and A31 SoCs.
This is normally used for the PMU.

Reviewed by:	andrew
Approved by:	andrew (mentor)
Differential Revision:	https://reviews.freebsd.org/D5663
2016-04-27 20:49:57 +00:00
gonzo
d120f378ee Add dtb/zynq to the list of extra modules required by Zedboard 2016-04-26 21:11:52 +00:00
bz
3a3f015eb3 Mark the unused period argument __unused.
Reviewed by:	andrew
MFC after:	2 weeks
Sponsored by:	DARPA/AFRL
2016-04-26 15:34:00 +00:00
pfg
d47c7f961b sys/arm: make use of the howmany() macro when available.
We have a howmany() macro in the <sys/param.h> header that is
convenient to re-use as it makes things easier to read.
2016-04-26 14:47:52 +00:00
jmcneill
3bbf377c1a Fix calculation of LCD CH1 SCLK1 output frequency when SCLK2 /2 is used
as source.

PR:		208680
Reported by:	David Binderman <dcb314@hotmail.com>
2016-04-26 12:36:12 +00:00
jmcneill
831dd4bc2f Add support for 8-bit eMMC.
Set MMC_CAP_4_BIT_DATA and MMC_CAP_8_BIT_DATA based on the "bus-width"
DT property and reduce maximum bus frequency from 52MHz to 50MHz to match
the capabilities of the clock provider.

Tested on a BananaPi BPI-M3 (A83T).
2016-04-26 12:02:36 +00:00
br
778cc5a811 Move arm's devmap to some generic place, so it can be used
by other architectures.

Reviewed by:	imp
Differential Revision:	https://reviews.freebsd.org/D6091
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
2016-04-26 11:53:37 +00:00
manu
edea0f925c Convert A10 interrupt controller to INTRNG
Reviewed by:	skra
Approved by:	cognet (mentor)
Differential Revision:	https://reviews.freebsd.org/D5573
2016-04-26 11:15:48 +00:00
jmcneill
50e552f99c Add support for Allwinner A31/A31S R-GPIO (CPUs-PORT) controller.
Submitted by:		Emmanuel Vadot <manu@bidouilliste.com>
Reviewed by:		jmcneill
Differential Revision:	https://reviews.freebsd.org/D5930
2016-04-23 13:59:18 +00:00
skra
813182b56b Fix duplicate TLB entries issue during section promotion/demotion.
Such situation is defined as UNPREDICTABLE by arm arm manual.

This patch fixes all explicit TLB fetches which could cause this issue
and speculative TLB fetches for sections mapped in user address space.
Speculative TLB fetches for sections mapped in kernel address space are
not fixed yet as the break-before-make approach must be implemented for
kernel mappings too. This means that promoted/demoted section will be
unmapped for a while. Either kernel stack the promotion/demotion is
being done on or L1 page table(s) which must be modified may be mapped
by this section. Thus the fix will not be so simple like for userland
mappings.

The issue was detectable only on Cortex-A8 platforms and only very
rarely. It was reported few times. First, it was by Mikael Urankar
in June 2015. He helped to identify the mechanism of this issue, but
we were not sure how to fix it correctly until now.

PR:		208381
Reported by:	Mikael Urankar (mikael.urankar at gmail.com)
Reviewed by:	kib
2016-04-22 06:42:50 +00:00
skra
61c734ce11 Don't use atomic operations for page table entries and handle access
and R/W emulation aborts under pmap lock.

There were two reasons for using of atomic operations:
(1) the pmap code is based on i386 one where they are used,
(2) there was an idea that access and R/W emulation aborts should be
    handled as quick as possible, without pmap locking.

However, the atomic operations in i386 pmap code are used only because
page table entries may be modified by hardware. At the beginning, we
were not sure that it's the only reason. So even if arm hardware does
not modify them, we did not risk to not use them at that time. Further,
it turns out after some testing that using of pmap lock for access and
R/W emulation aborts does not bring any extra cost and there was no
measurable difference. Thus, we have decided finally to use pmap lock
for all operations on page table entries and so, there is no reason for
atomic operations on them. This makes the code cleaner and safer.

This decision introduce a question if it's safe to use pmap lock for
access and R/W emulation aborts. Anyhow, there may happen two cases in
general:
(A) Aborts while the pmap lock is locked already - this should not
happen as pmap lock is not recursive. However, under pmap lock only
internal kernel data should be accessed and such data should be mapped
with A bit set and NM bit cleared. If double abort happens, then
a mapping of data which has caused it must be fixed.
(B) Aborts while another lock(s) is/are locked - this already can
happen. There is no difference here if it's either access or R/W
emulation abort, or if it's some other abort.

Reviewed by:	kib
2016-04-22 06:32:27 +00:00
skra
d9fab45f91 Add four functions which check a virtual address for stage 1 privileged
(PL1) and unprivileged (PL0) read/write access. As cp15 virtual to
physical address translation operations are used, interrupts must be
disabled to get consistent result when they are called.

These functions should be used only in very specific occasions like
during abort handling or kernel debugging. One of them is going to be
used in pmap_fault(). However, complete function set is added. It cost
nothing, as they are inlined.

While here, fix comment of #endif.

Reviewed by:	kib
2016-04-22 06:26:45 +00:00
pfg
729533413f sys: use our roundup2/rounddown2() macros when param.h is available.
rounddown2 tends to produce longer lines than the original code
and when the code has a high indentation level it was not really
advantageous to do the replacement.

This tries to strike a balance between readability using the macros
and flexibility of having the expressions, so not everything is
converted.
2016-04-21 19:57:40 +00:00
gonzo
b98e219695 Use proper type of tag in bcm2835_mbox_fb_init
bcm2835_mbox_fb_init sets configuration so SET_VIRTUAL_OFFSET should be used
instead of GET_VIRTUAL_OFFSET

Submitted by:	Sylvain Garrigues <sylvain@sylvaingarrigues.com>
2016-04-21 18:58:06 +00:00
jmcneill
c253d598f3 Replace the A20 kernel config with a generic ALLWINNER kernel config that
supports A20, A31, and A31S. Adds support for the BananaPi M2 (A31S) board.

Submitted by:		Emmanuel Vadot <manu@bidouilliste.com>
Reviewed by:		jmcneill
Differential Revision:	https://reviews.freebsd.org/D5580
2016-04-21 16:49:04 +00:00
andrew
d70958b7ed Make the GIC SGI global variables static, they are only ever used within
within this file.

Approved by:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-04-21 14:04:56 +00:00
gonzo
f58f247bd2 Force framebuffer virtual viewport to be the same as physical
VideoCore reports garbage in viewport geometry fields unless
viewport was set previously by earlier stage boot loader. So
when booting FreeBSD kernel directly from VideoCore's start.elf
framebuffer intialization fails due to invalid vxres, vyres
values. Make sure we request viewport to be equal to physical
resolution

Submitted by:	Sylvain Garrigues <sylvain@sylvaingarrigues.com>
2016-04-20 22:38:00 +00:00
pfg
15369e2805 Use our nitems() macro when param.h is available.
Replacements specific to arm, mips, pc98, powerpc and sparc64.

Discussed in:	freebsd-current
2016-04-20 15:45:55 +00:00
gonzo
709b38ddd3 Fix build for Pi kernels with syscons enabled 2016-04-19 23:30:22 +00:00
andrew
b72ace02b4 Rename ARM_INTRNG and MIPS_INTRNG to INTRNG. This will help with machine
independent code that needs to know about INTRNG such as PCI drivers.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-04-15 16:05:41 +00:00
pfg
2056617741 arm: for pointers replace 0 with NULL.
These are mostly cosmetical, no functional change.

Found with devel/coccinelle.
2016-04-15 14:30:40 +00:00
andrew
09cc69da94 Add a flag field to struct gic_irqsrc and use it to mark when we should
write to the End of Interrupt (EOI) register before handling the interrupt.
This should be a noop as it will be set for all edge triggered interrupts,
however this will not be the case for MSI interrupts. These are also edge
triggered, however we should not write to the EOI register until later in
arm_gic_pre_ithread.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
2016-04-15 14:28:34 +00:00
andrew
39ed2ac149 Add initial GICv2m support to the arm GIC driver. This will be used to
support MSI and MSI-X interrupts, however intrng needs updates before this
can happen.

For now we just attach the driver until the MSI API is ready.

Obtained from:	ABT Systems Ltd
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D5950
2016-04-15 14:19:25 +00:00
gonzo
7a8ad5bdd4 Fix UART3 and UART4 clock offsets.
Original values were copy-pasted from UART1 and UART2

PR:		197037
Submitted by:	Scott Ellis <scott@jumpnowtek.com>
2016-04-13 21:39:45 +00:00
gonzo
eb5df9db73 Multiple fixes in VCHI audio driver:
- Pre-buffer audio data to VideoCore so there are no audible glitches when
    driver is too late to provide samples
- Start actual playback when there is some prebuffered audio,
    it fixes audible noisy click in the beginning of playback
- Use #defines instead of hardcoded values where appropriate
- Fix copy-pasted comment

PR:		208678
2016-04-13 05:28:27 +00:00
pfg
b63211eed5 Cleanup unnecessary semicolons from the kernel.
Found with devel/coccinelle.
2016-04-10 23:07:00 +00:00
jmcneill
60b0ddf59c Enable PHY regulator when the optional "phy-supply" property is present.
Submitted by:	Emmanuel Vadot <manu@bidouilliste.com>
2016-04-09 11:23:46 +00:00
jmcneill
f96cd9f3c1 Fix incorrect pin definitions for Allwinner A31. 2016-04-08 23:11:00 +00:00
jmcneill
64d68e8b7e Attach hwreset resources at the same time as clock resources. 2016-04-08 23:07:16 +00:00
jmcneill
6ec3e5b242 Add function for mapping SRAM-D area to USB0 (OTG) controller. Use a lower
pass number to ensure that this driver is loaded before EMAC or OTG,
regardless of the order of nodes in the DT.
2016-04-08 10:54:59 +00:00