Commit Graph

9 Commits

Author SHA1 Message Date
tmm
0d2b3aeaaa Add ASI definitions of UltraSPARC-III (Cu) processors, and add some
previously missing US-I and II ones.
2002-07-16 16:22:25 +00:00
jake
ceb8ef47f2 Add asis for the upa config reg, which contains the hardware cpu id, and
for the interrupt send register, which is used for dispatching ipis.
2002-01-08 04:29:50 +00:00
tmm
30ac245755 Header file updates needed for the cache code: add/correct some ASI
definitions and add PAGE_*_MIN and -_MAX macros.
2001-11-09 19:37:52 +00:00
jake
e9a17647c3 The definition for ASI_IMMU_TAG_TARGET_REG was wrong. Sort. 2001-09-03 22:02:15 +00:00
jake
ed59961343 Add a definition for the load store unit control register. 2001-08-20 23:31:41 +00:00
jake
a9e7523870 Add asis for interrupt registers. 2001-08-10 04:17:29 +00:00
obrien
f202ead276 The author isn't a [UC] Regents. Correct the copyright language. 2001-08-09 02:09:34 +00:00
tmm
91c3a007e5 Add floating point context switching code for sparc64.
Reviewed by:	jake
2001-08-04 18:55:15 +00:00
jake
fb7edc502f Flesh out the sparc64 port considerably. This contains:
- mostly complete kernel pmap support, and tested but currently turned
  off userland pmap support
- low level assembly language trap, context switching and support code
- fully implemented atomic.h and supporting cpufunc.h
- some support for kernel debugging with ddb
- various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00