the race where interrupt thread can complete the request for which
timeout has fired and while mpt_timeout has blocked on mpt_lock.
Do a best effort to keep 4.x ang Giant-locked configurartions
compiling still.
Reported by: ups
Reviewed by: scottl
specifically SPI controllers now also work in big-endian
machines and some conversions relevant for FC and SAS
controllers as well as support for ILP32 machines which all
were omitted in previous attempts are now also implemented.
The IOCTL-interface is intentionally left (and where needed
actually changed) to be completely little-endian as otherwise
we would have to add conversion code for every possible
configuration page to mpt(4), which didn't seem the right
thing to do, neither did converting only half of the user-
interface to the native byte order.
This change was tested on amd64 (SAS+SPI), i386 (SAS) and
sparc64 (SAS+SPI). Due to lack of the necessary hardware
the target mode code is still left to be made endian-clean.
Reviewed by: scottl
MFC after: 1 month
to kproc_xxx as they actually make whole processes.
Thos makes way for us to add REAL kthread_create() and friends
that actually make theads. it turns out that most of these
calls actually end up being moved back to the thread version
when it's added. but we need to make this cosmetic change first.
I'd LOVE to do this rename in 7.0 so that we can eventually MFC the
new kthread_xxx() calls.
now takes a device_t to be the parent of the bus that is being created.
Most SIMs have been updated with a reasonable argument, but a few exceptions
just pass NULL for now. This argument isn't used yet and the newbus
integration likely won't be ready until after 7.0-RELEASE.
mpt.h:
Add support for reading extended configuration pages.
mpt_cam.c:
Do a top level topology scan on the SAS controller. If any SATA
device are discovered in this scan, send a passthrough FIS to set
the write cache. This is controllable through the following
tunable at boot:
hw.mpt.enable_sata_wc:
-1 = Do not configure, use the controller default
0 = Disable the write cache
1 = Enable the write cache
The default is -1. This tunable is just a hack and may be
deprecated in the future.
Turning on the write cache alleviates the write performance problems with
SATA that many people have observed. It is not recommend for those who
value data reliability! I cannot stress this strongly enough. However,
it is useful in certain circumstances, and it brings the performence in line
with what a generic SATA controller running under the FreeBSD ATA driver
provides (and the ATA driver has had the WC enabled by default for years).
use to synchornize and protect all data objects that are used for that
SIM. Drivers that are not yet MPSAFE register Giant and operate as
usual. RIght now, no drivers are MPSAFE, though a few will be changed
in the coming week as this work settles down.
The driver API has changed, so all CAM drivers will need to be recompiled.
The userland API has not changed, so tools like camcontrol do not need to
be recompiled.
attachment of new devices that arrive (and we notice them
via async Fibre Channel events). We've always had the
right thing (of sorts) happen when devices go away- this
is the corollary function that makes multipath failover
actually work.
MFC after: 2 weeks
read wasn't flagging the SYNC mode was enabled. The temp
values for offset and sync period were uint8_t, but were
being assigned and shifted from a uint32_t value.
This didn't show up in testing because a random number
of 1030 cards set a bit that says "honor BIOS negotiation",
which means this whole code path was skipped.
This should clear up at least some of the negotation
issues that have been seen.
Fix things to use the LSI-Logic Fusion Library mask and shift names for
offset and sync, no matter how awkward they are, in preference to just
plain numbers.
This allows us to play nicely on SANs when we have target mode
enabled in f/w but have neither the scsi_targbh enabled or
scsi_targ with a target enabled.
the CAM_NEW_TRAN_CODE that has been in the tree for some years now.
This first step consists solely of adding to or correcting
CAM_NEW_TRAN_CODE pieces in the kernel source tree such
that a both a GENERIC (at least on i386) and a LINT build
with CAM_NEW_TRAN_CODE as an option will compile correctly
and run (at least with some the h/w I have).
After a short settle time, the other pieces (making
CAM_NEW_TRAN_CODE the default and updating libcam
and camcontrol) will be brought in.
This will be an incompatible change in that the size of structures
related to XPT_PATH_INQ and XPT_{GET,SET}_TRAN_SETTINGS change
in both size and content. However, basic system operation and
basic system utilities work well enough with this change.
Reviewed by: freebsd-scsi and specific stakeholders
Unfortunately, the QUEUE FULL event only tells you Bus && Target.
It doesn't tell you lun. In order for the XPT_REL_SIMQ action to
work, we have to have a real lun. But which one? For now, just
iterate over MPT_MAX_LUNS.
Practically speaking, this is only going to be happening for lower
quality SAS or SATA drives behind the SAS controller, which means
only lun 0, so it's not so bad.
Helpful Reminder Nagging from: John Baldwin, Fred Whiteside
MFC after: 5 days
is to able to be called after *all* attach and enable events are done.
We establish a SYSINIT hook to call this handler. The current usage for it
is to add scsi target resources *after* all enables are done. There seems
to be some dependencies between different halves of a dual-port with respect
to target mode.
Put in more meaningful event messages for some events- in particular
QUEUE FULL events so we can see what the queue depth was when the
IOC sent us this message.
MFC after: 1 week
desired role configuration instead of existing role. This gets
us out of the mess where we configured a role of NONE (or were
LAN only, for example), but didn't continue to attach the CAM
module (because we had neither initiator nor target role
set). Unfortunately, the code that rewrites NVRAM to match
actual to desired role only works if the CAM module attaches.
MFC after: 2 weeks
mark it as timed out. Don't try and free the config
request for read_cfg_header that times out because
it's still active. Put in code for the config reply
handler that will then free up timed out requests.
Fix the FC_PRIMITIVE_SEND completion to not try
and free a command twice. Dunno how this possibly
could have been working for awhile.
MFC after: 2 weeks
out ELS buffers but *don't* hang out commands,
we hang folks on the SAN because the LSI-Logic
f/w apparently sends back BUSY or QFULL or some
darn thing.
If we add command buffers, we have to respond to
them sensibly even if we don't have any upstream
listeners (scsi_targ or scsi_targ_bh), so put in
some local command reponse stuff.
MFC after: 2 weeks
actually go write the config page. This fixes the long standing
problem about updating NVRAM on Fibre Channel cards and seems
so far to not break SPI config page writes.
Put back role setting into mpt. That is, you can set a desired role
for mpt as a hint. On the next reboot, it'll pick that up and redo
the NVRAM settings appropriately and warn you that this won't take
effect until the next reboot. This saves people the step of having
to find a BIOS utilities disk to set target and/or initiator role
for the MPT cards.
Don't enable/disable I/O space except for SAS adapters.
This fixes a problem with VMware 4.5 Workstation.
Fix an egregious bug introduced to target mode so it actually
will not panic when you first enable a lun.
Minor fixes:
Take more infor from port facts and configuration pages.
MFC after: 1 week
Clean out the abortive start to homegrown, per-mpt,
Domain Validation. This should really be done at a
higher level.
Use the PIM_SEQSCAN flag for U320- this seems to correct
cases of being unable to consistently negotiate U320 in
the cases where I'd seen this before.
Between this and other recent checkins, this driver is
pretty close to being ready for MFC.
Reviewed by: scottl, ken, scsi@
MFC after: 1 week
fixing speed negotiation.
Also fix the mpt_execute_req function to actually
match mpt_execute_req_a64. This may explain why
i386 users were having more grief.
can see the results of SPI negotiation w/o being overwhelmed
with other crap).
+ For U320 devices, check against both Settings *and* DV flags before
deciding whether we need to skip actual SPI settings for a device.
+ Go back to creating a 'physical disk' side of a raid/passthru bus that
is limited to the number of maximum physical disks. Actually, this isn't
probably *quite* right yet for one RAID volume, and if we ever end up
with finding a device that supports more than one RAID volume (not likely),
it probably won't quite be right either.
The problem here is that the creating of this 'physical' passthru sim is
just a cheap way to leverage off the CAM midlayer to do our negotiation
for us on the subentities that make up a RAID volume. It almost causes
more trouble than it is worth because we have to remember which side
we're talking to in terms of forming commands and which target ids are
real and so on. Bleah.
+ Skip trying to actually do SPI settings for the RAID volumes on the
real side of the raid/passthru bus pair- this just confuses the issue.
The underlying real physical devices will have the negotiation performed
and the Raid volume will inherit the resultant settings. At the sime time,
non-RAID devices can be on the same real bus, so *do* perform negotiations
with them.
+ At the end of doing all of the settings twiddling, *ahem*, remember to
go update the settings on the card itself (dunno how this got nuked).
At this point, negotiations *seem* to be being done (again) correctly for
both RAID volumes and their subentities. And they seem to be *mostly*
now right for other non-RAID entities on the same bus (I ended up with
3 out of 8 other disks still at narror/async- haven't the slightest
idea why yes).
Finally, negotiations on a normal bus seem to work (again).
There's still more work coming into this area, but we're in the
final stretch.
