Commit Graph

105 Commits

Author SHA1 Message Date
Marius Strobl
efd4fc3fb3 o Flesh out the generic IEEE 802.3 annex 31B full duplex flow control
support in mii(4):
  - Merge generic flow control advertisement (which can be enabled by
    passing by MIIF_DOPAUSE to mii_attach(9)) and parsing support from
    NetBSD into mii_physubr.c and ukphy_subr.c. Unlike as in NetBSD,
    IFM_FLOW isn't implemented as a global option via the "don't care
    mask" but instead as a media specific option this. This has the
    following advantages:
    o allows flow control advertisement with autonegotiation to be
      turned on and off via ifconfig(8) with the default typically
      being off (though MIIF_FORCEPAUSE has been added causing flow
      control to be always advertised, allowing to easily MFC this
      changes for drivers that previously used home-grown support for
      flow control that behaved that way without breaking POLA)
    o allows to deal with PHY drivers where flow control advertisement
      with manual selection doesn't work or at least isn't implemented,
      like it's the case with brgphy(4), e1000phy(4) and ip1000phy(4),
      by setting MIIF_NOMANPAUSE
    o the available combinations of media options are readily available
      from the `ifconfig -m` output
  - Add IFM_FLOW to IFM_SHARED_OPTION_DESCRIPTIONS and IFM_ETH_RXPAUSE
    and IFM_ETH_TXPAUSE to IFM_SUBTYPE_ETHERNET_OPTION_DESCRIPTIONS so
    these are understood by ifconfig(8).
o Make the master/slave support in mii(4) actually usable:
  - Change IFM_ETH_MASTER from being implemented as a global option via
    the "don't care mask" to a media specific one as it actually is only
    applicable to IFM_1000_T to date.
  - Let mii_phy_setmedia() set GTCR_MAN_MS in IFM_1000_T slave mode to
    actually configure manually selected slave mode (like we also do in
    the PHY specific implementations).
  - Add IFM_ETH_MASTER to IFM_SUBTYPE_ETHERNET_OPTION_DESCRIPTIONS so it
    is understood by ifconfig(8).
o Switch bge(4), bce(4), msk(4), nfe(4) and stge(4) along with brgphy(4),
  e1000phy(4) and ip1000phy(4) to use the generic flow control support
  instead of home-grown solutions via IFM_FLAGs. This includes changing
  these PHY drivers and smcphy(4) to no longer unconditionally advertise
  support for flow control but only if the selected media has IFM_FLOW
  set (or MIIF_FORCEPAUSE is set) and implemented for these media variants,
  i.e. typically only for copper.
o Switch brgphy(4), ciphy(4), e1000phy(4) and ip1000phy(4) to report and
  set IFM_1000_T master mode via IFM_ETH_MASTER instead of via IFF_LINK0
  and some IFM_FLAGn.
o Switch brgphy(4) to add at least the the supported copper media based on
  the contents of the BMSR via mii_phy_add_media() instead of hardcoding
  them. The latter approach seems to have developed historically, besides
  causing unnecessary code duplication it was also undesirable because
  brgphy_mii_phy_auto() already based the capability advertisement on the
  contents of the BMSR though.
o Let brgphy(4) set IFM_1000_T master mode on all supported PHY and not
  just BCM5701. Apparently this was a misinterpretation of a workaround
  in the Linux tg3 driver; BCM5701 seem to require RGPHY_1000CTL_MSE and
  BRGPHY_1000CTL_MSC to be set when configuring autonegotiation but
  this doesn't mean we can't set these as well on other PHYs for manual
  media selection.
o Let ukphy_status() report IFM_1000_T master mode via IFM_ETH_MASTER so
  IFM_1000_T master mode support now is generally available with all PHY
  drivers.
o Don't let e1000phy(4) set master/slave bits for IFM_1000_SX as it's
  not applicable there.

Reviewed by:	yongari (plus additional testing)
Obtained from:	NetBSD (partially), OpenBSD (partially)
MFC after:	2 weeks
2010-11-14 13:26:10 +00:00
Rebecca Cran
b1ce21c6ef Fix typos.
PR:	bin/148894
Submitted by:	olgeni
2010-11-09 10:59:09 +00:00
Marius Strobl
8e5d93dbb4 Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
2010-10-15 14:52:11 +00:00
John Baldwin
d1a02e0932 Catch up to rename of the constant for the Master Data Parity Error bit in
the PCI status register.

Pointed out by:	mdf
Pointy hat to:	jhb
2010-09-09 20:26:30 +00:00
Pyun YongHyeon
3edfecaa37 When VLAN hardware tagging is disabled, make sure to disable VLAN
checksum offloading as well as TSO over VLAN.

Reported by:	jhb
2010-05-04 22:24:19 +00:00
Pyun YongHyeon
31fefd0d5d Make sure to check whether driver is running before processing
received frames. Also check driver has valid ifp pointer before
calling msk_stop() in device_shutdown handler. While I'm here
remove unnecessary accesses to interrupt mask registers in
device_shutdown handler because driver puts the controller into
reset state.
With these changes, msk(4) now survive from heavy RX traffic(1byte
UDP frame) while reboot is in progress.

Reported by:	Mark Atkinson < atkin901 <> gmail dot com >
2010-05-04 17:12:36 +00:00
Pyun YongHyeon
3d763c3133 Drop driver lock before exiting from interrupt handler.
Submitted by:	jhb
MFC after:	3 days
2010-05-04 17:02:34 +00:00
Pyun YongHyeon
e19bd6ee55 Add basic support for Marvell 88E8059 Yukon Optima.
Tested by:	James LaLagna < jameslalagna <> gmail dot com >
MFC after:	5 days
2010-04-30 18:58:55 +00:00
Pyun YongHyeon
7c8db6fd16 Disable non-ASF packet flushing on Yukon Extreme as vendor's driver
does. Without this change, Yukon Extreme seems to generate lots of
RX FIFO overruns even though controller has available RX buffers.
These excessive RX FIFO overruns generated lots of pause frames
which in turn killed devices plugged into switch. It seems there is
still occasional RX frame corruption on Yukon Extreme but this
change seems to fix the pause frame storm.

Reported by:	jhb
Tested by:	jhb
MFC after:	5 days
2010-04-30 18:04:46 +00:00
Pyun YongHyeon
106b2e2ff2 Both RX_GMF_LP_THR and RX_GMF_UP_THR must be 16 bits register. If
it is 8bits register then RX FIFO size can't exceed 2KB which is
not true for almost all Yukon II controller.
2010-04-30 00:34:00 +00:00
Pyun YongHyeon
6da6d0a9e3 With r206844, CSUM_TCP is also set for CSUM_TSO case. Modify
drivers to take into account for the change. Basically CSUM_TSO
should be checked before checking CSUM_TCP.
2010-04-19 22:10:40 +00:00
Pyun YongHyeon
07fa07514b Partial revert r204545.
Just relying on status LE ownership of status block seems to cause
poor performance. Always read current status index register first
and then check status ownership as we had before. Accessing status
index register seems to trigger immediate status update if
controller have pending status updates.

MFC after:	1 week
Reported by:	Andre Albsmeier <Andre.Albsmeier <> siemens dot com>
Tested by:	Andre Albsmeier <Andre.Albsmeier <> siemens dot com>
2010-04-07 17:12:57 +00:00
Pyun YongHyeon
b45923a62d It seems PCI_OUR_REG_[1-5] registers are not mapped on PCI
configuration space on Yukon Ultra(88E8056) such that accesses to
these registers were NOPs which in turn make msk(4) instable on
this controller. Use indirect access method to access
PCI_OUR_REG_[1-5] registers. This should fix a long standing
instability bug which prevented msk(4) working on Yukon Ultra.
Special thanks to koitsu who gave me remote access to his system.

PR:	kern/114631, kern/116853
MFC after:	1 week
2010-03-14 23:23:57 +00:00
Pyun YongHyeon
388214e4f2 Implement Rx checksum offloading for Yukon EC, Yukon Ultra,
Yukon FE and Yukon Ultra2. These controllers provide very simple
checksum computation mechanism and it requires additional pseudo
header checksum computation in upper stack. Even though I couldn't
see much performance difference with/without Rx checksum offloading
it may help notebook based controllers.

Actually controller can compute two checksum value by giving
different starting position of checksum computation on received
frame. However, for long time, Marvell's checksum offloading engine
have been known to have several silicon bugs so don't blindly trust
computed partial checksum value. Instead, compute partial checksum
twice by giving the same checksum computation position and compare
the result. If the value is different it's clear indication of
hardware bug. This configuration lose IP checksum offloading
capability but I think it's better to take safe route.
Note, Rx checksum offloading for Yukon XL was still disabled due to
known silicon bug.
2010-03-12 18:41:41 +00:00
Pyun YongHyeon
c876b43f42 Remove taskqueue based interrupt handling. After r204541 msk(4)
does not generate excessive interrupts any more so we don't need
to have two copies of interrupt handler.
While I'm here remove two STAT_PUT_IDX register accesses in LE
status event handler. After r204539 msk(4) always sync status LEs
so there is no need to resort to reading STAT_PUT_IDX register to
know the end of status LE processing. Just trust status LE's
ownership bit.
2010-03-02 01:45:02 +00:00
Pyun YongHyeon
cf570c1f34 Implement rudimentary interrupt moderation with programmable
countdown timer register. The timer resolution may vary among
controllers but the value would be represented by core clock
cycles. msk(4) will automatically computes number of required clock
cycles from given micro-seconds unit.
The default interrupt holdoff timer value is 100us which will
ensure less than 10k interrupts under load. The timer value can be
changed with dev.mskc.0.int_holdoff sysctl node.

Note, the interrupt moderation is shared resource on dual-port
controllers so you can't use separate interrupt moderation value
for each port. This means we can't stop interrupt moderation in
driver stop routine. Also have msk_tick() reclaim transmitted Tx
buffers as safety belt. With this change there is no need to check
missing Tx completion interrupt in watchdog handler, so remove it.
2010-03-01 23:39:43 +00:00
Pyun YongHyeon
42f3ea9fc2 Make sure to enable flow-control only if established link is
full-duplex. Previously msk(4) used to allow flow-control on
1000baseT half-duplex media. Also GMAC pause is enabled if link
partner is capable of handling it.
While I'm here use IFM_OPTIONS instead of using IFM_GMASK to check
optional flags of link.
2010-03-01 22:55:35 +00:00
Pyun YongHyeon
17f6f326e9 Properly sync status LEs after processing. 2010-03-01 22:43:22 +00:00
Pyun YongHyeon
8c1643b6db Remove trailing white spaces. 2010-02-26 19:38:12 +00:00
Pyun YongHyeon
c72f075a24 Allocate single MSI message. msk(4) used to allocate 2 MSI messages
for controllers like 88E8053 which reports two MSI messages.
Because we don't get anything useful things with 2 MSI messages,
allocating 1 MSI message would be more sane approach.
While I'm here, enable MSI for dual-port controllers too. Because
status block is shared for dual-port controllers, I don't think
msk(4) will encounter problem for using MSI on dual-port
controllers.
2010-02-26 19:37:03 +00:00
Pyun YongHyeon
7420e9dc9d Don't hardcod register offset to set PCIe max read request size.
The register offset is not valid on 88E8072 controller. Also don't
blindly increase max read request size to 4096, instead, use 2048
which seems to be more sane value and only change the value if the
hardware default size(512) was used on that register.
For PCIX controllers, use system defined constant rather than using
magic value.
While I'm here stop showing negotiated link width.
2010-02-26 19:18:29 +00:00
Pyun YongHyeon
1b7757c024 Optimize inserting LE for TX checksum computation. Controller does
not require checksum LE configuration if checksum start and write
position is the same as before. So keep track last checksum start
and write position and insert new LE whenever the position is
changed. This reduces number of LEs used in TX path as well as
slightly enhance TX performance.
2010-02-26 18:18:02 +00:00
Pyun YongHyeon
4858893b6e Add TSO support on VLANs. Controller requires VLAN hardware tagging
to make TSO work over VLANs.
2010-02-26 17:33:43 +00:00
Pyun YongHyeon
d06930af52 Reuse the configured LE for VLAN if new LE was created for TSO.
Only old controllers need to create new LE for TSO. This change
makes TSO work over VLANs.
2010-02-26 17:27:16 +00:00
Pyun YongHyeon
cf5756a6bf Correct inversed programming of ethernet hardware address on
big-endian architecture.

Submitted by:	C. Jayachandran <c.jayachandran at gmail dot com> (initial version)
2010-02-20 22:24:24 +00:00
Pyun YongHyeon
84e3651eb3 Yukon Ultra2 has 126MHz clock. 2010-01-22 20:15:49 +00:00
Pyun YongHyeon
a91981e4ba s/Mhz/MHz/g
Submitted by:	N.J. Mann <njm <> njm dot me dot uk >
2010-01-22 20:10:12 +00:00
Pyun YongHyeon
77e6010f24 It seems generation of link state change of e1000phy(4) is not
reliable on some Marvell PHYs. If msk(4) know it still does not
have established link check whether msk(4) missed the link state
change by looking into polled link state.

Reported by:	Mel Flynn < mel.flynn+fbsd.current <> mailing.thruhere dot net >,
		Gleb Kurtsou <gleb.kurtsou <> gmail dot com >
Tested by:	Gleb Kurtsou <gleb.kurtsou <> gmail dot com >
2009-11-17 18:19:45 +00:00
Pyun YongHyeon
76202a1601 Add preliminary Yukon Ultra 2 support(88E8057). The controller
looks very similar to Yukon EC Ultra.

Tested by:	 kalin m ( kalin <> el dot net )
2009-11-07 01:14:09 +00:00
John Baldwin
f802264db1 Take a step towards removing if_watchdog/if_timer. Don't explicitly set
if_watchdog/if_timer to NULL/0 when initializing an ifnet.  if_alloc()
sets those members to NULL/0 already.

(Missed this driver in the earlier commit.)
2009-11-06 20:07:16 +00:00
Pyun YongHyeon
ff08021657 It's normal to see Rx FIFO overruns under high network load and
showing the message creates other side-effects. Remove the Rx
FIFO overrun message in interrupt handler. msk(4) should recover
from the FIFO overruns without any user intervention. Users can
still check the Rx FIFO overrun counter from MAC MIB statistics
maintained in driver(dev.msk.0.stats.rx.overflows).
2009-11-06 18:51:05 +00:00
Pyun YongHyeon
56964c4c9f Remove unnecessary header file. 2009-11-06 18:36:09 +00:00
Ulf Lilleengen
0e0ed74fcc - Add support for Marvell Yukon 88E8042 device.
Submitted by:	Mario Lobo <mlobo -at- digiart.art.br>
Approved by:	yongari
2009-10-25 21:46:38 +00:00
Pyun YongHyeon
60d3251abb Add DGE-560SX(Yukon XL) to the supported device list. Many thanks
to "Eugene Perevyazko <john <> dnepro dot net>" who kindly gave
remote access to system with DGE-560SX.
2009-09-28 21:11:31 +00:00
Pyun YongHyeon
cde64af338 Add workaround for Yukon XL which has hardware bug that can't flush
FIFO.
2009-09-28 21:07:19 +00:00
Pyun YongHyeon
fcb62a8b01 Add hack to pass controller specific information to phy driver.
Unlike most other PHYs there is no easy way to know which media
type the PHY supports on Marvell PHYs. MIIF_HAVEFIBER flags is now
passed via bus-specific instance variable of a device. While I'm
here add 88E1112 specific work around to set SIGDET polarity low.
Many thanks "Eugene Perevyazko <john <> dnepro dot net>" who kindly
gave remote access to system with DGE-560SX.
2009-09-28 21:03:28 +00:00
Pyun YongHyeon
40d7192b1c Fix MIB statistics clear routine. This should fix alignment errors on sparc64.
Reported by:	Garrett Damore < gdamore <> opensolaris dot org >
2009-09-28 20:03:37 +00:00
Poul-Henning Kamp
6778431478 Revert previous commit and add myself to the list of people who should
know better than to commit with a cat in the area.
2009-09-08 13:19:05 +00:00
Poul-Henning Kamp
b34421bf9c Add necessary include. 2009-09-08 13:16:55 +00:00
Robert Watson
eb956cd041 Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs.  This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.

For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.

Approved by:	re (kib)
MFC after:	6 weeks
2009-06-26 11:45:06 +00:00
Pyun YongHyeon
a56fe1f085 Add Yukon Extreme device ids, 88E8071 and 88E8072.
While I'm here correct description of 88E8070. 88E8070 is Yukon
Extreme and have gigabit PHY.
2009-06-02 05:08:57 +00:00
Pyun YongHyeon
efb74172a5 Add Rx checksum offloading support for Yukon FE+ and Yukon Extreme.
These controllers use newer descriptor format and the new descriptor
format uses status LE to indicate the status of checksum. Rx
checksummed value used in previous controllers were very cryptic
and I failed to understand how to use them. In addition most
controllers in previous generations had Rx checksum offloading bug.

While I'm here introduce a MSK_FLAG_NORX_CSUM flag to bypass
checking Rx checksum offloading as Yukon FE+ A0 has status LE bug.
2009-06-02 04:59:29 +00:00
Pyun YongHyeon
ebb25bfab5 Add frame parser capability of Yukon FE+ and Yukon Extreme. With
this feature hardware automatically computes TCP/UDP payload
offset. Introduce MSK_FLAG_AUTOTX_CSUM to mark the capability.
Yukon Extreme B0 revision is known to have a silicon for the
feature so disable it. Yukon Extreme B0 still can do Tx checksum
offloading but CPU have to compute TCP/UDP payload offset. To
enable traditional checksum offloading, disable automatic Tx
checksum calculation capability.
Yukon Extreme A0 revision could not use store-and-forward mode for
jumbo frames(silicon bug) so disable Tx checksum offloading for
jumbo frames.

I believe controllers that have MSK_FLAG_AUTOTX_CSUM capability or
new descriptor format do not have Tx checksum offload bug so
disable checksum offloading workaround for for short frames.

Tested by:	jhb, Warren Block ( wblock <> wonkity dot com )
2009-06-02 04:35:44 +00:00
Pyun YongHyeon
daf292270b Add preliminary Yukon Extreme support and register definitions.
Yukon Extreme uses new descriptor format for TSO and has Tx frame
parser which greatly reduces CPU cycles spent in computing TCP/UDP
payload offset calculation in Tx checksum offloading path. The new
descriptor format also removed TCP/UDP payload computation for TSO
which in turn results in better TSO performance. It seems Yukon
Extreme has a lot of new (unknown) features but only basic
offloading is supported at this time. So far there are two known
issues.
 o Sometimes Rx overrun errors happen when pulling data over
   gigabit link. Running over 100Mbps seem to ok.
 o Ethernet hardware address shows all-zeroed value on 88E8070.
   Assigning ethernet address with ifconfig is necessary to make it
   work.
Support for Yukon Extreme is not perfect but it would be better
than having a non-working device. Special thanks to jbh who fixed
several bugs of initial patch.

Tested by:	jhb, Warren Block ( wblock <> wonkity dot com )
2009-06-02 04:00:17 +00:00
Pyun YongHyeon
f972d4c6fb Correct controller description for 88E8035, 88E8036, 88E8038 and
88E8039. These are fast ethernet controllers.
2009-05-25 08:26:39 +00:00
Pyun YongHyeon
b7e1e144e9 Simplify SIOCSIFFLAGS handler. 2009-05-25 08:02:05 +00:00
Pyun YongHyeon
98e02aebef Be consistent with other capability checking. 2009-05-25 07:59:30 +00:00
Pyun YongHyeon
89e2266651 Don't reinitialize controller when interface is already running. 2009-05-25 07:56:14 +00:00
Pyun YongHyeon
6f5a0d1f39 If interface is not UP, don't return media status. 2009-05-25 07:50:14 +00:00
Pyun YongHyeon
1290998502 Add device ids for Yukon FE+(88E8040, 88E8040T, 88E8048 and 88E8070). 2009-05-25 07:48:00 +00:00