Commit Graph

156 Commits

Author SHA1 Message Date
cognet
64e57a5c7f Check if the device is marked as dma-coherent in the FDT, and if so, let
busdma know, so that on architectures where dma isn't always coherent, we
know we don't have to write-back/invalidates cachelines on DMA operations.

Reviewed by:	andrew, mav
2017-04-26 16:13:22 +00:00
mav
1384f37b76 Block FPDMA TRIM for ASMedia HBAs.
Experiments show FPDMA TRIM command timeouts on ASMedia HBAs, while the
same SSDs working fine on Intel HBAs.

MFC after:	2 weeks
2017-04-18 08:04:15 +00:00
mav
c4653e3c5f Remove dead mentions of CAM target mode APIs from drivers.
This makes grepping kernel for target mode implementation much easier.
2017-02-19 17:27:58 +00:00
mav
b4ef14b0fe Partially workaround ASMedia HBA error recovery.
Taking closer look on my ASM1062 I found that it has bunch of issues around
error recovery: reported wrong CCS, failed commands reported as completed,
READ LOG EXT times out after NCQ error.  This patch workarounds first two
problems, that were making ATAPI devices close to unusable on these HBAs.

MFC after:	2 weeks
2017-01-25 18:16:17 +00:00
wma
5468bcb8d3 Enable optional soft reset in AHCI
It occurred that some Marvell integrated controllers
require additional time after soft reset to work properly.
Introduce new quirk (AHCI_Q_MRVL_SR_DEL), that enable
such operation.

Submitted by:          Konrad Adamczyk <ka@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Stormshield
Reviewed by:           mav
Differential revision: https://reviews.freebsd.org/D9221
2017-01-25 10:32:57 +00:00
asomers
2d89a50f96 Always null-terminate ccb_pathinq.(sim_vid|hba_vid|dev_name)
The sim_vid, hba_vid, and dev_name fields of struct ccb_pathinq are
fixed-length strings. AFAICT the only place they're read is in
sbin/camcontrol/camcontrol.c, which assumes they'll be null-terminated.
However, the kernel doesn't null-terminate them. A bunch of copy-pasted code
uses strncpy to write them, and doesn't guarantee null-termination. For at
least 4 drivers (mpr, mps, ciss, and hyperv), the hba_vid field actually
overflows. You can see the result by doing "camcontrol negotiate da0 -v".

This change null-terminates those fields everywhere they're set in the
kernel. It also shortens a few strings to ensure they'll fit within the
16-character field.

PR:		215474
Reported by:	Coverity
CID:		1009997 1010000 1010001 1010002 1010003 1010004 1010005
CID:		1331519 1010006 1215097 1010007 1288967 1010008 1306000
CID:		1211924 1010009 1010010 1010011 1010012 1010013 1010014
CID:		1147190 1010017 1010016 1010018 1216435 1010020 1010021
CID:		1010022 1009666 1018185 1010023 1010025 1010026 1010027
CID:		1010028 1010029 1010030 1010031 1010033 1018186 1018187
CID:		1010035 1010036 1010042 1010041 1010040 1010039
Reviewed by:	imp, sephe, slm
MFC after:	4 weeks
Sponsored by:	Spectra Logic Corp
Differential Revision:	https://reviews.freebsd.org/D9037
Differential Revision:	https://reviews.freebsd.org/D9038
2017-01-04 20:26:42 +00:00
mav
1fa171dfd8 Process port interrupt even is PxIS register is zero.
ASMedia ASM1062 AHCI chips with some fancy firmware handling PMP inside
seems sometimes forgeting to set bits in PxIS, causing command timeouts.
Removal of this check fixes the issue by the theoretical cost of slightly
higher CPU usage in some odd cases, but this is what Linux does too.

MFC after:	1 month
2016-11-28 16:23:32 +00:00
mav
df6befa4e8 Fix channel initialization in FBS mode.
Due to reading initialized variable, FIS receive area was always allocated
as 256 bytes, suitable for command-based switching, instead of 4096 bytes,
required for FIS-based switching.  This caused memory corruption in case of
port multipliers used on FBS-capable HBAs (Marvell).

MFC after:	1 week
2016-09-07 13:51:34 +00:00
mav
93c50303d0 In AHCI_IRQ_MODE_AFTER mode do not clear interrupts below.
This is probably a NOP change since IS register is not activery used for
interrupts below the shared, but it looked odd to clear interrupts we did
not handle.
2016-07-17 12:45:58 +00:00
mav
e22db3f99c Do not consider the last interrupt shared if there are enough interrupts
for all channels.
2016-07-17 12:31:31 +00:00
mav
10701d40cc Fix ahci(4) driver attach to controller with 32 ports.
Incorrect sign expansion in variables that supposed to be a bit fields
caused infinite loop.  Fixing this allows system properly detect maximal
possible 32 devices configured on AHCI HBA of BHyVe.  That case did not
happen in a wild before due to lack of hardware AHCI HBAs with 32 ports.

Approved by:	re (gjb@)
MFC after:	1 week
2016-07-07 22:10:10 +00:00
ken
7eeed3c838 Add support for managing Shingled Magnetic Recording (SMR) drives.
This change includes support for SCSI SMR drives (which conform to the
Zoned Block Commands or ZBC spec) and ATA SMR drives (which conform to
the Zoned ATA Command Set or ZAC spec) behind SAS expanders.

This includes full management support through the GEOM BIO interface, and
through a new userland utility, zonectl(8), and through camcontrol(8).

This is now ready for filesystems to use to detect and manage zoned drives.
(There is no work in progress that I know of to use this for ZFS or UFS, if
anyone is interested, let me know and I may have some suggestions.)

Also, improve ATA command passthrough and dispatch support, both via ATA
and ATA passthrough over SCSI.

Also, add support to camcontrol(8) for the ATA Extended Power Conditions
feature set.  You can now manage ATA device power states, and set various
idle time thresholds for a drive to enter lower power states.

Note that this change cannot be MFCed in full, because it depends on
changes to the struct bio API that break compatilibity.  In order to
avoid breaking the stable API, only changes that don't touch or depend on
the struct bio changes can be merged.  For example, the camcontrol(8)
changes don't depend on the new bio API, but zonectl(8) and the probe
changes to the da(4) and ada(4) drivers do depend on it.

Also note that the SMR changes have not yet been tested with an actual
SCSI ZBC device, or a SCSI to ATA translation layer (SAT) that supports
ZBC to ZAC translation.  I have not yet gotten a suitable drive or SAT
layer, so any testing help would be appreciated.  These changes have been
tested with Seagate Host Aware SATA drives attached to both SAS and SATA
controllers.  Also, I do not have any SATA Host Managed devices, and I
suspect that it may take additional (hopefully minor) changes to support
them.

Thanks to Seagate for supplying the test hardware and answering questions.

sbin/camcontrol/Makefile:
	Add epc.c and zone.c.

sbin/camcontrol/camcontrol.8:
	Document the zone and epc subcommands.

sbin/camcontrol/camcontrol.c:
	Add the zone and epc subcommands.

	Add auxiliary register support to build_ata_cmd().  Make sure to
	set the CAM_ATAIO_NEEDRESULT, CAM_ATAIO_DMA, and CAM_ATAIO_FPDMA
	flags as appropriate for ATA commands.

	Add a new get_ata_status() function to parse ATA result from SCSI
	sense descriptors (for ATA passthrough over SCSI) and ATA I/O
	requests.

sbin/camcontrol/camcontrol.h:
	Update the build_ata_cmd() prototype

	Add get_ata_status(), zone(), and epc().

sbin/camcontrol/epc.c:
	Support for ATA Extended Power Conditions features.  This includes
	support for all features documented in the ACS-4 Revision 12
	specification from t13.org (dated February 18, 2016).

	The EPC feature set allows putting a drive into a power power mode
	immediately, or setting timeouts so that the drive will
	automatically enter progressively lower power states after various
	idle times.

sbin/camcontrol/fwdownload.c:
	Update the firmware download code for the new build_ata_cmd()
	arguments.

sbin/camcontrol/zone.c:
	Implement support for Shingled Magnetic Recording (SMR) drives
	via SCSI Zoned Block Commands (ZBC) and ATA Zoned Device ATA
	Command Set (ZAC).

	These specs were developed in concert, and are functionally
	identical.  The primary differences are due to SCSI and ATA
	differences.  (SCSI is big endian, ATA is little endian, for
	example.)

	This includes support for all commands defined in the ZBC and
	ZAC specs.

sys/cam/ata/ata_all.c:
	Decode a number of additional ATA command names in ata_op_string().

	Add a new CCB building function, ata_read_log().

	Add ata_zac_mgmt_in() and ata_zac_mgmt_out() CCB building
	functions.  These support both DMA and NCQ encapsulation.

sys/cam/ata/ata_all.h:
	Add prototypes for ata_read_log(), ata_zac_mgmt_out(), and
	ata_zac_mgmt_in().

sys/cam/ata/ata_da.c:
	Revamp the ada(4) driver to support zoned devices.

	Add four new probe states to gather information needed for zone
	support.

	Add a new adasetflags() function to avoid duplication of large
	blocks of flag setting between the async handler and register
	functions.

	Add new sysctl variables that describe zone support and paramters.

	Add support for the new BIO_ZONE bio, and all of its subcommands:
	DISK_ZONE_OPEN, DISK_ZONE_CLOSE, DISK_ZONE_FINISH, DISK_ZONE_RWP,
	DISK_ZONE_REPORT_ZONES, and DISK_ZONE_GET_PARAMS.

sys/cam/scsi/scsi_all.c:
	Add command descriptions for the ZBC IN/OUT commands.

	Add descriptions for ZBC Host Managed devices.

	Add a new function, scsi_ata_pass() to do ATA passthrough over
	SCSI.  This will eventually replace scsi_ata_pass_16() -- it
	can create the 12, 16, and 32-byte variants of the ATA
	PASS-THROUGH command, and supports setting all of the
	registers defined as of SAT-4, Revision 5 (March 11, 2016).

	Change scsi_ata_identify() to use scsi_ata_pass() instead of
	scsi_ata_pass_16().

	Add a new scsi_ata_read_log() function to facilitate reading
	ATA logs via SCSI.

sys/cam/scsi/scsi_all.h:
	Add the new ATA PASS-THROUGH(32) command CDB.  Add extended and
	variable CDB opcodes.

	Add Zoned Block Device Characteristics VPD page.

	Add ATA Return SCSI sense descriptor.

	Add prototypes for scsi_ata_read_log() and scsi_ata_pass().

sys/cam/scsi/scsi_da.c:
	Revamp the da(4) driver to support zoned devices.

	Add five new probe states, four of which are needed for ATA
	devices.

	Add five new sysctl variables that describe zone support and
	parameters.

	The da(4) driver supports SCSI ZBC devices, as well as ATA ZAC
	devices when they are attached via a SCSI to ATA Translation (SAT)
	layer.  Since ZBC -> ZAC translation is a new feature in the T10
	SAT-4 spec, most SATA drives will be supported via ATA commands
	sent via the SCSI ATA PASS-THROUGH command.  The da(4) driver will
	prefer the ZBC interface, if it is available, for performance
	reasons, but will use the ATA PASS-THROUGH interface to the ZAC
	command set if the SAT layer doesn't support translation yet.
	As I mentioned above, ZBC command support is untested.

	Add support for the new BIO_ZONE bio, and all of its subcommands:
	DISK_ZONE_OPEN, DISK_ZONE_CLOSE, DISK_ZONE_FINISH, DISK_ZONE_RWP,
	DISK_ZONE_REPORT_ZONES, and DISK_ZONE_GET_PARAMS.

	Add scsi_zbc_in() and scsi_zbc_out() CCB building functions.

	Add scsi_ata_zac_mgmt_out() and scsi_ata_zac_mgmt_in() CCB/CDB
	building functions.  Note that these have return values, unlike
	almost all other CCB building functions in CAM.  The reason is
	that they can fail, depending upon the particular combination
	of input parameters.  The primary failure case is if the user
	wants NCQ, but fails to specify additional CDB storage.  NCQ
	requires using the 32-byte version of the SCSI ATA PASS-THROUGH
	command, and the current CAM CDB size is 16 bytes.

sys/cam/scsi/scsi_da.h:
	Add ZBC IN and ZBC OUT CDBs and opcodes.

	Add SCSI Report Zones data structures.

	Add scsi_zbc_in(), scsi_zbc_out(), scsi_ata_zac_mgmt_out(), and
	scsi_ata_zac_mgmt_in() prototypes.

sys/dev/ahci/ahci.c:
	Fix SEND / RECEIVE FPDMA QUEUED in the ahci(4) driver.

	ahci_setup_fis() previously set the top bits of the sector count
	register in the FIS to 0 for FPDMA commands.  This is okay for
	read and write, because the PRIO field is in the only thing in
	those bits, and we don't implement that further up the stack.

	But, for SEND and RECEIVE FPDMA QUEUED, the subcommand is in that
	byte, so it needs to be transmitted to the drive.

	In ahci_setup_fis(), always set the the top 8 bits of the
	sector count register.  We need it in both the standard
	and NCQ / FPDMA cases.

sys/geom/eli/g_eli.c:
	Pass BIO_ZONE commands through the GELI class.

sys/geom/geom.h:
	Add g_io_zonecmd() prototype.

sys/geom/geom_dev.c:
	Add new DIOCZONECMD ioctl, which allows sending zone commands to
	disks.

sys/geom/geom_disk.c:
	Add support for BIO_ZONE commands.

sys/geom/geom_disk.h:
	Add a new flag, DISKFLAG_CANZONE, that indicates that a given
	GEOM disk client can handle BIO_ZONE commands.

sys/geom/geom_io.c:
	Add a new function, g_io_zonecmd(), that handles execution of
	BIO_ZONE commands.

	Add permissions check for BIO_ZONE commands.

	Add command decoding for BIO_ZONE commands.

sys/geom/geom_subr.c:
	Add DDB command decoding for BIO_ZONE commands.

sys/kern/subr_devstat.c:
	Record statistics for REPORT ZONES commands.  Note that the
	number of bytes transferred for REPORT ZONES won't quite match
	what is received from the harware.  This is because we're
	necessarily counting bytes coming from the da(4) / ada(4) drivers,
	which are using the disk_zone.h interface to communicate up
	the stack.  The structure sizes it uses are slightly different
	than the SCSI and ATA structure sizes.

sys/sys/ata.h:
	Add many bit and structure definitions for ZAC, NCQ, and EPC
	command support.

sys/sys/bio.h:
	Convert the bio_cmd field to a straight enumeration.  This will
	yield more space for additional commands in the future.  After
	change r297955 and other related changes, this is now possible.
	Converting to an enumeration will also prevent use as a bitmask
	in the future.

sys/sys/disk.h:
	Define the DIOCZONECMD ioctl.

sys/sys/disk_zone.h:
	Add a new API for managing zoned disks.  This is very close to
	the SCSI ZBC and ATA ZAC standards, but uses integers in native
	byte order instead of big endian (SCSI) or little endian (ATA)
	byte arrays.

	This is intended to offer to the complete feature set of the ZBC
	and ZAC disk management without requiring the application developer
	to include SCSI or ATA headers.  We also use one set of headers
	for ioctl consumers and kernel bio-level consumers.

sys/sys/param.h:
	Bump __FreeBSD_version for sys/bio.h command changes, and inclusion
	of SMR support.

usr.sbin/Makefile:
	Add the zonectl utility.

usr.sbin/diskinfo/diskinfo.c
	Add disk zoning capability to the 'diskinfo -v' output.

usr.sbin/zonectl/Makefile:
	Add zonectl makefile.

usr.sbin/zonectl/zonectl.8
	zonectl(8) man page.

usr.sbin/zonectl/zonectl.c
	The zonectl(8) utility.  This allows managing SCSI or ATA zoned
	disks via the disk_zone.h API.  You can report zones, reset write
	pointers, get parameters, etc.

Sponsored by:	Spectra Logic
Differential Revision:	https://reviews.freebsd.org/D6147
Reviewed by:	wblock (documentation)
2016-05-19 14:08:36 +00:00
pfg
eed4bd22ad sys/dev: minor spelling fixes.
Most affect comments, very few have user-visible effects.
2016-05-03 03:41:25 +00:00
imp
692609bdac Implement Auxiliary register. Add PIM_ATA_EXT flag to flag that a SIM
can handle it, and add the code to add it to the FIS that's sent to
the drive. The mvs driver is the only other ATA driver in the system,
and its hardware doesn't appear to support setting the Auxiliary
register.

Differential Revision: https://reviews.freebsd.org/D5598
2016-04-17 05:24:36 +00:00
imp
91b03b024c New CAM I/O scheduler for FreeBSD. The default I/O scheduler is the same
as before. The common scheduling bits have moved from inline code in
each of the CAM periph drivers into a library that implements the
default scheduling.

In addition, a number of rate-limiting and I/O preference options can
be enabled by adding CAM_IOSCHED_NETFLIX to your config file. A number
of extra stats are also maintained. CAM_IOSCHED_NETFLIX isn't on by
default because it uses a separate BIO_READ and BIO_WRITE queue, so
doesn't honor BIO_ORDERED between these two types of operations. We
already didn't honor it for BIO_DELETE, and we don't depend on
BIO_ORDERED between reads and writes anywhere in the system (it is
currently used with BIO_FLUSH in ZFS to make sure some writes are
complete before others start and as a poor-man's soft dependency in
one place in UFS where we won't be issuing READs until after the
operation completes). However, out of an abundance of caution, it
isn't enabled by default.

Plus, this also brings in NCQ TRIM support for those SSDs that support
it. A black list is also provided for known rogues that use NCQ trim
as an excuse to corrupt the drive. It was difficult to separate out
into a separate commit.

This code has run in production at Netflix for over a year now.

Sponsored by: Netflix, Inc
Differential Revision: https://reviews.freebsd.org/D4609
2016-04-14 21:47:58 +00:00
jhibbits
2bd36fcded Convert a long to rman_res_t, fixing a sign extension bug.
ahci.c had one signed long, which was passed into rman, rather than u_long.
After the switch of rman_res_t from size u_long to size uintmax_t, the sign
extension caused ranges to get messed up, and ahcich* to not attach.

There may be more signed longs used in this way, which will be fixed as they're
reported.

Reported by:	pho
2016-03-20 14:21:07 +00:00
jhibbits
31bb8ee5bd Convert rman to use rman_res_t instead of u_long
Summary:
Migrate to using the semi-opaque type rman_res_t to specify rman resources.  For
now, this is still compatible with u_long.

This is step one in migrating rman to use uintmax_t for resources instead of
u_long.

Going forward, this could feasibly be used to specify architecture-specific
definitions of resource ranges, rather than baking a specific integer type into
the API.

This change has been broken out to facilitate MFC'ing drivers back to 10 without
breaking ABI.

Reviewed By: jhb
Sponsored by:	Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5075
2016-01-27 02:23:54 +00:00
mmel
37a790bf19 AHCI: Fix AHCI driver for ARM.
On ARM, we must ensure proper interdevice write ordering.
The AHCI interrupt status register must be updated in HW before
registers in interrupt controller.
Unfortunately, only way how we can do it is readback.

Discussed with:	mav
Approved by:	kib (mentor)
Differential Revision: https://reviews.freebsd.org/D4240
2015-11-29 11:28:04 +00:00
mmel
e5ec37dff7 AHCI: Use bus_dmamap_sync(9) when accessing DMA buffers.
Reviewed by:	mav
Approved by:	kib (mentor)
Differential Revision: https://reviews.freebsd.org/D4240
2015-11-28 14:30:42 +00:00
zbb
d8c34e18a3 Introduce support for MSI-X interrupts in AHCI
- Allocate resources for MSI-X table and PBA if necessary
- Add function ahci_free_mem() to free all resources

Reviewed by:   jhb, mav
Obtained from: Semihalf
Sponsored by:  The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D3009
2015-07-22 09:46:22 +00:00
loos
608f583b4a Add AHCI attachment code for Allwinner A10/A20 SoCs.
The Allwinner SoC has an AHCI device on its internal main bus rather
than the PCI bus.  This SoC is somewhat underdocumented, and its SATA
controller is no exception.  The methods to support this chip were
harvested from the Linux Allwinner SDK, and then constants invented to
describe what's going on based on low-level constants contained in the
SATA standard and guess work.

This SoC requires a specific AHCI channel setup in order to start the
operations on the channel properly.

Clock setup and AHCI channel setup idea came from NetBSD.

Tested on Cubieboard 2 and Banana pi (and attachment on Cubieboard by
Pratik Singhal).

Differential Revision:	https://reviews.freebsd.org/D737
Submitted by:	imp
Reviewed by:	imp, ganbold, mav, andrew
2015-07-03 14:11:01 +00:00
mav
013bf140e5 Reduce priority of ATA/SATA drivers.
Legacy ata(4) -> BUS_PROBE_LOW_PRIORITY;  more functional ahci(4), siis(4),
mvs(4) -> BUS_PROBE_DEFAULT;  BUS_PROBE_VENDOR leave for vendor drivers.

MFC after:	2 weeks
2015-03-23 19:47:52 +00:00
zbb
a4d05ea2c7 Introduce Annapurna Labs AHCI support
Overview:
* implemented quirk for forcing SATA interface enable
* restore value to status register - this enables link autonegotiation

Modifications:
* devid:vendorid field
* quirk for forcing PI setting (BIOS is doing that on PC-like systems)
* write to capabilites field to enable phy link initialization

Submitted by:  Wojciech Macek <wma@semihalf.com>
Reviewed by:   imp, mav
Obtained from: Semihalf
2015-03-17 18:59:47 +00:00
mav
2934f1983b For some uniformity move ahci_ch_init() call under the lock.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	2 weeks
2015-02-26 12:51:05 +00:00
marius
0090bedb0f - Const'ify the ahci_ids table.
- Use DEVMETHOD_END.
- Use NULL instead of 0 for pointers.

MFC after:	3 days
2014-12-28 20:42:28 +00:00
smh
32fcf1d195 style (9) nits
Use return (val); instead of return val;

Differential Revision:	D838
MFC after:	2 weeks
Sponsored by:	Multiplay
2014-12-21 16:38:29 +00:00
smh
feb854cc72 Return the error from ahci_setup_interrupt in ahci_attach
Previously ahci_attach returned a hard coded ENXIO instead of the value
from ahci_setup_interrupt. This is effectively a NOOP change as currently
ahci_setup_interrupt only ever returns 0 or ENXIO, so just there to protect
against any future changes to that.

Differential Revision:	D838
MFC after:	2 weeks
Sponsored by:	Multiplay
2014-12-21 16:32:57 +00:00
smh
1bbb36e3f1 Clamp ahci max irq's to AHCI_MAX_IRQS
This prevents the possiblity of any overruns on the statically allocated
struct irqs field.

Differential Revision:	D838
MFC after:	2 weeks
X-MFC-With:	r276012
Sponsored by:	Multiplay
2014-12-21 16:15:29 +00:00
smh
dd63bf99a2 Prevent overflow issues in timeout processing
Previously, any timeout value for which (timeout * hz) will overflow the
signed integer, will give weird results, since callout(9) routines will
convert negative values of ticks to '1'. For unsigned integer overflow we
will get sufficiently smaller timeout values than expected.

Switch from callout_reset, which requires conversion to int based ticks
to callout_reset_sbt to avoid this.

Also correct isci to correctly resolve ccb timeout.

This was based on the original work done by Eygene Ryabinkin
<rea@freebsd.org> back in 5 Aug 2011 which used a macro to help avoid
the overlow.

Differential Revision:	https://reviews.freebsd.org/D1157
Reviewed by:	mav, davide
MFC after:	1 month
Sponsored by:	Multiplay
2014-11-21 21:01:24 +00:00
ian
d84874573a A dma tag alignment should be 1 (not 0) when a device can dma at any address. 2014-11-06 18:15:16 +00:00
mav
f2b4d1f9d5 Use r271207 optimization only for MSI-enabled HBAs.
It was found that VirtualBox' AHCI does not allow nterrupt to be cleared
before the interrupt status register is read, causing interrupt storm.

AHCI specification allows to skip this register use when multi-vector MSI
is enabled and so interrupting port is known.  For single-vector MSI that
is not stated explicitly, but if the port is only one, it is obviously
known too.
2014-10-06 10:58:54 +00:00
smh
f42f85e74d Use a local STAILQ for unlocked done CCB processing in ahci direct mode
Previously it was possible for issues e.g. use after free, to result
from processing the done queue while not holding the channel lock.

While this should never happen in practice, unexpected code flows
which result in two threads processing from the same queue may
be possible.

We now use a local STAILQ to prevent this ever being an issue.

Sponsored by:	Multiplay
2014-09-27 19:14:22 +00:00
mav
56921b198b Initialize variables before resource_int_value().
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
2014-09-12 08:37:21 +00:00
mav
07b6763268 Bunch of microoptimizations to reduce dereferences and cache collisions. 2014-09-08 12:11:49 +00:00
mav
c630f40d3c Save one register read (AHCI_IS) for AHCI controllers with only one port.
For controllers with only one port (like PCIe or M.2 SSDs) interrupt can
come from only one source, and skipping read saves few percents of CPU time.

MFC after:	1 month
H/W donated by:	I/O Switch
2014-09-06 19:43:48 +00:00
imp
6b8d76a0a6 Restore order of interrupt setup. Minor problems can result by
setting up the interrupts too early:

Reviewed by: mav@
Sponsored by: Netflix
2014-09-06 18:20:50 +00:00
mav
1091f6dff6 Fix typo in comments.
Submitted by:	Benedict Reuschling <bcr@FreeBSD.org>
MFC after:	6 days
2014-09-06 15:37:55 +00:00
mav
a76d5e2b8d Invert AHCI_Q_NOBSYRES quirk meaning, waiting for readiness by default.
I gave up to update list of Marvell chips that require this quirk.
The final nail was growing number of PCIe/M.2 SSDs where Marvell chips
have PCI IDs of different vendors.

MFC after:	1 week
H/W donated by:	I/O Switch
2014-09-05 13:45:14 +00:00
imp
83e922af4a Separate out PCI attachment from the main AHCI driver. Move checks of
PCI IDs into quirks, which mostly fit (though you'd get no argument
from me that AHCI_Q_SATA1_UNIT0 is oddly specific). Set these quirks
in the PCI attachment. Make some shared functions public so that PCI
and possibly other bus attachments can use them.

The split isn't perfect yet, but it is functional. The split will be
perfected as other bus attachments for AHCI are written.

Sponsored by: Netflix
Reviewed by: kan, mav
Differential Revision: https://reviews.freebsd.org/D699
2014-09-04 22:22:53 +00:00
imp
ece11978bc We were returning 20 bytes as the FIS size to send, but only
initializing 16. Initialize all 20 so we don't send garbage in the
Auxiliary register. The SATA standard mandates a 5 dword length for
the Host to Device FIS.

Sponsored by: Netflix
2014-08-30 02:13:09 +00:00
jhb
de01564f85 Don't bother clearing maps for static DMA allocations to NULL. Instead,
leave them as purely opaque values that are only set by bus_dmamem_alloc().
2014-06-17 18:10:06 +00:00
mav
43701d4645 Correct AMD chipsets identification.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	2 weeks
2014-04-17 14:16:02 +00:00
mav
7cf333c5cb Add ID for one more ASMedia AHCI-compatible controller.
Reported by:	ignace.peeters@gmail.com
MFC after:	2 weeks
2014-01-17 17:16:49 +00:00
zbb
541c54820f Revert r260165: Proper configuration of unmapped_buf_allowed should be used
To avoid failures in bus_dmamap_sync() on ARM unmapped_buf_allowed should
be set to 0. Hence, ARM-specific changes in AHCI should not be applied.
2014-01-02 11:24:04 +00:00
zbb
9c9582b429 Use only mapped BIOs on ARM
Using unmapped BIOs causes failure inside bus_dmamap_sync, since
this function requires valid MVA address, which is not present
if mapping is not set up.

Submitted by:	Wojciech Macek <wma@semihalf.com>
Obtained from:	Semihalf
2014-01-01 20:26:08 +00:00
zbb
2df622e3b7 Do not attach to PCI bridges in AHCI driver
Some vendors use the same VID:PID combination in AHCI and PCI bridge cards

Submitted by:	Wojciech Macek <wma@semihalf.com>
Obtained from:	Semihalf
2014-01-01 20:18:03 +00:00
mav
5ecd12665c Add few more minor parts of DevSleep support from AHCI 1.3.1 proposal. 2013-11-15 15:14:07 +00:00
mav
616c9705f8 Add some more IDs for Intel ATA, AHCI and USB controllers. 2013-11-15 10:28:59 +00:00
mav
99ff385fd0 Merge CAM locking changes from the projects/camlock branch to radically
reduce lock congestion and improve SMP scalability of the SCSI/ATA stack,
preparing the ground for the coming next GEOM direct dispatch support.

Replace big per-SIM locks with bunch of smaller ones:
 - per-LUN locks to protect device and peripheral drivers state;
 - per-target locks to protect list of LUNs on target;
 - per-bus locks to protect reference counting;
 - per-send queue locks to protect queue of CCBs to be sent;
 - per-done queue locks to protect queue of completed CCBs;
 - remaining per-SIM locks now protect only HBA driver internals.

While holding LUN lock it is allowed (while not recommended for performance
reasons) to take SIM lock.  The opposite acquisition order is forbidden.
All the other locks are leaf locks, that can be taken anywhere, but should
not be cascaded.  Many functions, such as: xpt_action(), xpt_done(),
xpt_async(), xpt_create_path(), etc. are no longer require (but allow) SIM
lock to be held.

To keep compatibility and solve cases where SIM lock can't be dropped, all
xpt_async() calls in addition to xpt_done() calls are queued to completion
threads for async processing in clean environment without SIM lock held.

Instead of single CAM SWI thread, used for commands completion processing
before, use multiple (depending on number of CPUs) threads.  Load balanced
between them using "hash" of the device B:T:L address.

HBA drivers that can drop SIM lock during completion processing and have
sufficient number of completion threads to efficiently scale to multiple
CPUs can use new function xpt_done_direct() to avoid extra context switch.
Make ahci(4) driver to use this mechanism depending on hardware setup.

Sponsored by:	iXsystems, Inc.
MFC after:	2 months
2013-10-21 12:00:26 +00:00
gavin
ce93c74acc Support the PCI-Express SSD in the new MacBook Air (model A1465)
Submitted by:	Johannes Lundberg <johannes brilliantservice.co.jp>
MFC after:	3 days
2013-08-28 14:29:33 +00:00