Commit Graph

1954 Commits

Author SHA1 Message Date
raj
39bb31b171 Remove redundant check, we catch ULE platform support in common
sys/kern/sched_ule.c
2012-05-27 10:32:10 +00:00
raj
7136f7f893 Let us manage differences of Book-E PowerPC variations i.e. vendor /
implementation specific vs. the common architecture definition.

Bring PPC4XX defines (PSL, SPR, TLB). Note the new definitions under
BOOKE_PPC4XX are not used in the code yet.

This change set is not supposed to affect existing E500 support, it's just
another reorg step before bringing support for E500mc, E5500 and PPC465.

Obtained from:	AppliedMicro, Freescale, Semihalf
2012-05-27 10:25:20 +00:00
raj
f58c0d7427 Import eSDHC driver for Freescale integrated controller.
Obtained from:	Freescale, Semihalf
Written by:	Michal Dubiel
2012-05-26 21:07:15 +00:00
raj
dc343feae3 Move OpenPIC FDT bus glue to a shared location, so that other PowerPC
platforms can use it, not only MPC85XX.

This is just reorg, no functional changes.
2012-05-26 21:02:49 +00:00
raj
e87745389c Retrieve CPU number info from the device tree.
Obtained from:	Freescale, Semihalf.
2012-05-26 13:42:55 +00:00
raj
8c2ef762a7 Rename e500 prefix to match other Book-E CPU variations. CPU id tidbits for
the new cores.

Obtained from:	Freescale, Semihalf.
2012-05-26 13:36:18 +00:00
raj
0557f549f6 Provide SPR definitions for newer Book-E (E500mc, E5500, PPC465).
Obtained from:	Freescale, Semihalf.
2012-05-26 12:39:23 +00:00
raj
9e109ca411 Unify SPR defines formatting, no funtional changes. 2012-05-26 12:15:13 +00:00
raj
c4e990d23d Update HID defines for E500mc and E5500 CPU cores.
Obtained from:	Freescale, Semihalf
2012-05-25 21:12:24 +00:00
raj
cb9537b464 Fix physical address type to vm_paddr_t also for powerpc64. 2012-05-25 18:17:26 +00:00
raj
0c51e3a0d5 Missing vm_paddr_t bits which should have been part of r235936. 2012-05-25 15:13:55 +00:00
bz
9254329b05 Add a missing " to get closer to compiling. 2012-05-24 23:46:17 +00:00
nwhitehorn
cb2f55559e Atomic operation acquire barriers also need to be isync on 64-bit systems. 2012-05-24 22:14:39 +00:00
marcel
3184129b6e Revert isync for ILP32 to sync as per my original change that I discussed
with Nathan. Leave __ATOMIC_ACQ as an isync as per Nathan.
2012-05-24 22:06:00 +00:00
bz
cd8b136e12 MFp4 bz_ipv6_fast:
in_cksum.h required ip.h to be included for struct ip.  To be
  able to use some general checksum functions like in_addword()
  in a non-IPv4 context, limit the (also exported to user space)
  IPv4 specific functions to the times, when the ip.h header is
  present and IPVERSION is defined (to 4).

  We should consider more general checksum (updating) functions
  to also allow easier incremental checksum updates in the L3/4
  stack and firewalls, as well as ponder further requirements by
  certain NIC drivers needing slightly different pseudo values
  in offloading cases.  Thinking in terms of a better "library".

  Sponsored by:	The FreeBSD Foundation
  Sponsored by:	iXsystems

Reviewed by:	gnn (as part of the whole)
MFC After:	3 days
2012-05-24 22:00:48 +00:00
marcel
5ba5b2308f A few improvements:
1.  Define all registers. These definitions are needed to support
    the FCM driver for direct-connect NAND.
2.  Repurpose lbc_read_reg() and lbc_write_reg() for use by localbus
    attached device drivers. Use bus_space functions directly in the
    lbc driver itself.
3.  Be smarter about programming LAWs and mapping memory. The ranges
    defined in the FDT are per bank (= chip select) and since we can
    have up to 8 banks, we could easily use more than 8 LAWs or TLB
    enrties when per-bank memory ranges need multiple LAWs or TLBs
    due to alignment or size constraints.
    We now combine all memory ranges into the fewest possible set of
    contiguous regions and program the hardware for that. Thus, a
    cleverly written FDT with 8 devices may still only need 1 LAW or
    1 TLB entry. Note that the memory ranges can be assigned randomly
    to the banks. We sort as we build to handle that.
4.  Support the FCM when programming the OR register. This is mostly
    for documention purposes as we do not have a way to define the
    mode for a bank.
5.  Remove Semihalf-ism: do not define DEBUG (only to undefine it
    again).
2012-05-24 21:23:13 +00:00
raj
91f8a79888 Fix physical address type to vm_paddr_t. 2012-05-24 21:13:24 +00:00
marcel
fece2de465 Remove Semihakf-ism. DEBUG is a kernel configuration option. It
should not be defined in source files.
2012-05-24 21:09:38 +00:00
marcel
4015ece7fb Just return if the size of the window is 0. This can happen when the
FDT does not define all ranges possible for a particular node (e.g.
PCI).
While here, only update the trgt_mem and trgt_io pointers if there's
no error. This avoids that we knowingly write an invalid target (= -1).
2012-05-24 21:07:10 +00:00
marcel
2c73b7699a Either the I/O port range or the memory mapped I/O range may not be
defined in the FDT. The range will have a zero size in that case.
2012-05-24 21:01:35 +00:00
marcel
eeea3251f8 o Rename kernload_ap to bp_kernelload. This to introduce a common prefix
for variables that live in the boot page.
o   Add bp_trace (yes, it's in the boot page) that gets zeroed before we
    try to wake a core and to which the core being woken can write markers
    so that we know where the core was in case it doesn't wake up. The
    boot code does not yet write markers (too follow).
o   Disable the boot page translation to allow the last 4K page to be used
    for whatever we please. It would get mapped otherwise.
o   Fix kernstart in the case of SMP. The start argument is typically page
    aligned due to the alignment requirements that come with having a boot
    page. The point of using trunc_page is that we get the actual load
    address given that the entry point is immediately following the ELF
    headers. In the SMP case this ended up exactly 4K after the load
    address. Hence subtracting 1 from start.
2012-05-24 20:58:40 +00:00
marcel
c933e51f6c Fix the memory barriers for CPUs that do not like lwsync and wedge or cause
exceptions early enough during boot that the kernel will do ithe same.
Use lwsync only when compiling for LP64 and revert to the more proven isync
when compiling for ILP32. Note that in the end (i.e. between revision 222198
and this change) ILP32 changed from using sync to using isync. As per Nathan
the isync is needed to make sure I/O accesses are properly serialized with
locks and isync tends to be more effecient than sync.

While here, undefine __ATOMIC_ACQ and __ATOMIC_REL at the end of the file
so as not to leak their definitions.

Discussed with: nwhitehorn
2012-05-24 20:45:44 +00:00
nwhitehorn
e83623fb1f Replace the list of PVOs owned by each PMAP with an RB tree. This simplifies
range operations like pmap_remove() and pmap_protect() as well as allowing
simple operations like pmap_extract() not to involve any global state.
This substantially reduces lock coverages for the global table lock and
improves concurrency.
2012-05-20 14:33:28 +00:00
nwhitehorn
68e9eabdbf Fix final bugs in memory barriers on PowerPC:
- Use isync/lwsync unconditionally for acquire/release. Use of isync
  guarantees a complete memory barrier, which is important for serialization
  of bus space accesses with mutexes on multi-processor systems.
- Go back to using sync as the I/O memory barrier, which solves the same
  problem as above with respect to mutex release using lwsync, while not
  penalizing non-I/O operations like a return to sync on the atomic release
  operations would.
- Place an acquisition barrier around thread lock acquisition in
  cpu_switchin().
2012-05-04 16:00:22 +00:00
dim
81a3e2b46d Add a convenience macro for the returns_twice attribute, and apply it to
the prototypes of the appropriate functions (getcontext, savectx,
setjmp, sigsetjmp and vfork).

MFC after:	2 weeks
2012-04-29 11:04:31 +00:00
nwhitehorn
98252594c8 Fix build on 32-bit systems. 2012-04-28 14:42:49 +00:00
nwhitehorn
d4577289f5 After switching mutexes to use lwsync, they no longer provide sufficient
guarantees on acquire for the tlbie mutex. Conversely, the TLB invalidation
sequence provides guarantees that do not need to be redundantly applied on
release. Roll a small custom lock that is just right. Simultaneously,
convert the SLB tree changes back to lwsync, as changing them to sync
was a misdiagnosis of the tlbie barrier problem this commit actually fixes.
2012-04-28 00:12:23 +00:00
nwhitehorn
337d2f2292 Switch the default I/O memory barrier to eieio, as it should be. This
does not appear to cause any problems due to fixes elsewhere.

MFC after:	2 months
2012-04-24 13:37:43 +00:00
nwhitehorn
d5494b21d8 Revert r234581 for this file. The lockless SLB tree code does in fact need
a heavyweight sync instead of a lightweight sync to function properly.
Thanks to mdf for the clarification.
2012-04-24 13:36:41 +00:00
nwhitehorn
1f2cd3bf47 Fix copy-and-paste error in r230400.
MFC after: 3 days
2012-04-23 20:53:50 +00:00
nwhitehorn
ff8c08b546 Fix missing header for powerpc_iomb().
Pointy hat to:	me
2012-04-23 15:47:07 +00:00
nwhitehorn
265701f492 Provide a clearer split between read/write and acquire/release barriers.
This should really, actually be correct now.
2012-04-22 22:27:35 +00:00
nwhitehorn
19e4decf83 Correctly specify assembler constrains for synchronization instructions.
MFC after: 3 days
2012-04-22 21:55:19 +00:00
nwhitehorn
f4ccf1d6d0 Clarify what we are doing in r234583 a little better: eieio and isync do
not provide general barriers, but only barriers in the context of the
atomic sequences here. As such, make them private and keep the global
*mb() routines using a variant of sync.
2012-04-22 21:11:01 +00:00
nwhitehorn
9735a82985 On non-64-bit systems (which generally don't have lwsync), use eieio and
isync to implement read and write barriers, following Appendix B.2 of
Book II of the architecture manual. This provides a 25% speed increase
to fork() on the PowerPC G4.
2012-04-22 20:23:34 +00:00
nwhitehorn
086dac3dc0 Use lwsync to provide memory barriers on systems that support it instead
of sync (lwsync is an alternate encoding of sync on systems that do not
support it, providing graceful fallback). This provides more than an order
of magnitude reduction in the time required to acquire or release a mutex.

MFC after:	2 months
2012-04-22 19:00:51 +00:00
nwhitehorn
0e093d4003 Remove dead code. The routines in atomic.S did not work properly anyway, and
were everywhere unused. If we turn out to need them, they should be
reimplemented.

MFC after:	2 weeks
2012-04-22 18:56:56 +00:00
nwhitehorn
666d3956e9 Replace eieio; sync for creating bus-space memory barriers with sync.
sync performs a strict superset of the functions of eieio, so using both
is redundant. While here, expand bus barriers to all bus_space operations,
since many drivers do not correctly use bus_space_barrier().

In principle, we can also replace sync just with eieio, for a significant
performance increase, but it remains to be seen whether any poorly-written
drivers currently depend on the side effects of sync to properly function.

MFC after:	1 week
2012-04-22 18:54:51 +00:00
nwhitehorn
d394621163 Avoid a lock order reversal in pmap_extract_and_hold() from relocking
the page. This PMAP requires an additional lock besides the PMAP lock
in pmap_extract_and_hold(), which vm_page_pa_tryrelock() did not release.

Suggested by:	kib
MFC after:	4 days
2012-04-22 17:58:30 +00:00
nwhitehorn
5af196c3d0 Organize some members of ucontext_t in the same order they are in the
trap frame. These are usually not used, and so this changes very little.

MFC after:	5 days
2012-04-21 14:39:47 +00:00
nwhitehorn
8f2d167ee3 Make sure all pending operations have completed on the existing thread
before (potentially) migrating it to a different CPU.

MFC after:	5 days
2012-04-20 23:01:36 +00:00
nwhitehorn
d89ad2c78a We don't need kcopy() in any of the remaining places it is used, so
remove it.

MFC after:	2 weeks
2012-04-11 22:23:50 +00:00
nwhitehorn
e1fa94aa4e Only manipulate the PGA_EXECUTABLE flag on managed pages. This is a proxy
for whether the page is physical. On dense phys mem systems (32-bit),
VM_PHYS_TO_PAGE will not return NULL for device memory pages if device
memory is above physical memory even if there is no allocated vm_page.
Attempting to use the returned page could then cause either memory
corruption or a page fault.
2012-04-11 21:56:55 +00:00
nwhitehorn
31bc0a8bff Fix error in r233949. Synchronizing icaches on uncacheable pages turns out
not to be a good idea, and of course the PV entry list for a page is never
empty after the page has been mapped.
2012-04-11 20:28:05 +00:00
nwhitehorn
5ff92b1d9c Do not restore the register holding the TLS pointer when doing various
usermode context switches (long jumps and ucontext operations). If these
are used across threads, multiple threads can end up with the same TLS base.
Madness will then result.

This makes behavior on PPC match that on x86 systems and on Linux.

MFC after:	10 days
2012-04-11 00:00:40 +00:00
nwhitehorn
a8563567c4 Execute an initial ptesync if and only if the PTE is actually being
invalidated, as opposed to a ref/changed bit update.
2012-04-06 22:33:13 +00:00
nwhitehorn
6c37128bdd Substantially reduce the scope of the locks held in pmap_enter(), which
improves concurrency slightly.
2012-04-06 18:18:48 +00:00
nwhitehorn
9c79ae8eea Reduce the frequency that the PowerPC/AIM pmaps invalidate instruction
caches, by invalidating kernel icaches only when needed and not flushing
user caches for shared pages.

Suggested by:	kib
MFC after:	2 weeks
2012-04-06 16:03:38 +00:00
nwhitehorn
e05a39a26d Give the kernel pmap lock a different name than user pmap locks. It has
(slightly) different semantics and renaming it prevents a (harmless)
WITNESS warning during bootup for 32-bit kernels on 64-bit CPUs.

MFC after:	5 days
2012-04-06 16:00:37 +00:00
jhb
98fa920cd5 - Rename VM_MEMATTR_UNCACHED to VM_MEMATTR_WEAK_UNCACHEABLE on x86 to
be less ambiguous and more clearly identify what it means.  This
  attribute is what Intel refers to as UC-, and it's only difference
  relative to normal UC memory is that a WC MTRR will override a UC-
  PAT entry causing the memory to be treated as WC, whereas a UC PAT
  entry will always override the MTRR.
- Remove the VM_MEMATTR_UNCACHED alias from powerpc.
2012-03-29 16:51:22 +00:00
nwhitehorn
dc06a3cb59 Allow multiple inclusion of trap.h. This has always been broken, but
until recently never caused problems.
2012-03-29 02:02:14 +00:00
fabient
5edfb77dd3 Add software PMC support.
New kernel events can be added at various location for sampling or counting.
This will for example allow easy system profiling whatever the processor is
with known tools like pmcstat(8).

Simultaneous usage of software PMC and hardware PMC is possible, for example
looking at the lock acquire failure, page fault while sampling on
instructions.

Sponsored by: NETASQ
MFC after:	1 month
2012-03-28 20:58:30 +00:00
nwhitehorn
03485ae3df More PMAP performance improvements: skip 256 MB segments entirely if they
are are not mapped during ranged operations and reduce the scope of the
tlbie lock only to the actual tlbie instruction instead of the entire
sequence. There are a few more optimization possibilities here as well.
2012-03-28 17:25:29 +00:00
nwhitehorn
78cf971b20 Make sure to call vm_page_dirty() before the pmap lock is released to
prevent a race where another process could conclude the page was clean.

Submitted by:	alc
2012-03-27 01:26:00 +00:00
nwhitehorn
3bbb70297a More PMAP concurrency improvements: replace the table lock and (almost) all
uses of the page queues mutex with a new rwlock that protects the page
table and the PV lists. This reduces system time during a parallel
buildworld by 35%.

Reviewed by:	alc
2012-03-27 01:24:18 +00:00
nwhitehorn
13688ae964 More PMAP performance improvements: on powerpc64, when TLBIE can be run
with exceptions enabled, leave them enabled and use a regular mutex to
guard TLB invalidations instead of a spinlock.
2012-03-25 06:01:34 +00:00
nwhitehorn
30ea2f9f86 Only call vm_page_dirty() on pages that are writable in order not to
confuse the VM.
2012-03-24 22:32:19 +00:00
nwhitehorn
2cab577d3a Following suggestions from alc, skip wired mappings in pmap_remove_pages()
and remove moea64_attr_*() in favor of direct calls to vm_page_dirty()
and friends.
2012-03-24 19:59:14 +00:00
ed
619ab2327e Remove pty(4) from our kernel configurations.
As of FreeBSD 8, this driver should not be used. Applications that use
posix_openpt(2) and openpty(3) use the pts(4) that is built into the
kernel unconditionally. If it turns out high profile depend on the
pty(4) module anyway, I'd rather get those fixed. So please report any
issues to me.

The pty(4) module is still available as a kernel module of course, so a
simple `kldload pty' can be used to run old-style pseudo-terminals.
2012-03-21 08:38:42 +00:00
andreast
86771720e4 Provide a fix for certain PowerMacs where the U3 i2c lacks the interrupt
info.

Tested by:	Robert Hish
MFC after:	1 week
2012-03-19 18:03:20 +00:00
nwhitehorn
fcd574676f Remove acquisition of VM page queues lock from pmap_protect(). Any actual
manipulation of the pvo_vlink and pvo_olink entries is already protected
by the table lock, so most remaining instances of the acquisition of the
page queues lock can likely be replaced with the table lock, or removed
if the table lock is already held.

Reviewed by:	alc
2012-03-18 13:22:42 +00:00
nwhitehorn
6a20b9d5e1 Make ofw_bus_get_node() consistently return -1 when there is no associated
OF node, instead of a random mixture of 0 and -1. Update all checks for 0
to check for -1 instead.

MFC after:	4 weeks
2012-03-15 22:53:39 +00:00
nwhitehorn
9a147d4aa9 Implement pmap_remove_pages(). This will be added later to the 32-bit MMU
module.

Suggested by:	alc
2012-03-15 22:50:48 +00:00
nwhitehorn
61f538e719 Improve algorithm for deciding whether to loop through all process pages
or look them up individually in pmap_remove() and apply the same logic
in the other ranged operation (pmap_protect). This speeds up make
installworld by a factor of 2 on powerpc64.

MFC after:	1 week
2012-03-15 19:36:52 +00:00
nwhitehorn
71beaf7fd7 Use LIST_FOREACH_SAFE() instead of LIST_FOREACH() in pmap_remove(), since
the point of this loop is to remove elements. This worked by accident before.

MFC after:	2 days
2012-03-14 20:19:49 +00:00
dim
cf2c2fde9c Add casts to __uint16_t to the __bswap16() macros on all arches which
didn't already have them.  This is because the ternary expression will
return int, due to the Usual Arithmetic Conversions.  Such casts are not
needed for the 32 and 64 bit variants.

While here, add additional parentheses around the x86 variant, to
protect against unintended consequences.

MFC after:	2 weeks
2012-03-09 20:34:31 +00:00
attilio
9906b913d9 Disable the option VFS_ALLOW_NONMPSAFE by default on all the supported
platforms.
This will make every attempt to mount a non-mpsafe filesystem to the
kernel forbidden, unless it is expressely compiled with
VFS_ALLOW_NONMPSAFE option.

This patch is part of the effort of killing non-MPSAFE filesystems
from the tree.

No MFC is expected for this patch.
2012-03-06 20:01:25 +00:00
andreast
2e83fcc661 Restore proper dot symbol creation for assembly files in the kernel build case.
Without this patch we were not able to see the assembly function.
Only the function descriptor was visible.

- Distinguish between user-land and kernel when creating the ENTRY() point of
  assembly source.
- Make the ENTRY() macro more readable, replace the .align directive with the
  gas platform independant .p2align directive.
- Create an END()macro for later use to provide traceback tables on powerpc64.
2012-03-04 11:55:28 +00:00
andreast
81229669a4 Add support for PWM controlled fans. I found these fans on my PowerMac9,1.
These fans are not located under the same node as the the RPM controlled ones,
So I had to adapt the current source to parse and fill the properties correctly.
To control the fans we can set the PWM ratio via sysctl between 20 and 100%.

Tested by:	nwhitehorn
MFC after:	3 weeks
2012-03-04 08:43:33 +00:00
jhb
d6e546f14a - Add a bus_dma tag to each PCI bus that is a child of a Host-PCI bridge.
The tag enforces a single restriction that all DMA transactions must not
  cross a 4GB boundary.  Note that while this restriction technically only
  applies to PCI-express, this change applies it to all PCI devices as it
  is simpler to implement that way and errs on the side of caution.
- Add a softc structure for PCI bus devices to hold the bus_dma tag and
  a new pci_attach_common() routine that performs actions common to the
  attach phase of all PCI bus drivers.  Right now this only consists of
  a bootverbose printf and the allocate of a bus_dma tag if necessary.
- Adjust all PCI bus drivers to allocate a PCI bus softc and to call
  pci_attach_common() from their attach routines.

MFC after:	2 weeks
2012-03-02 20:38:04 +00:00
jhb
5013ab31bd - Change contigmalloc() to use the vm_paddr_t type instead of an unsigned
long for specifying a boundary constraint.
- Change bus_dma tags to use bus_addr_t instead of bus_size_t for boundary
  constraints.

These allow boundary constraints to be fully expressed for cases where
sizeof(bus_addr_t) != sizeof(bus_size_t).  Specifically, it allows a
driver to properly specify a 4GB boundary in a PAE kernel.

Note that this cannot be safely MFC'd without a lot of compat shims due
to KBI changes, so I do not intend to merge it.

Reviewed by:	scottl
2012-03-01 19:58:34 +00:00
jhibbits
76b96a73a2 Add backlight control to ATI-graphics PowerBooks and iBooks.
Approved by:	nwhitehorn (mentor)
MFC after:	1 week
2012-02-26 13:45:25 +00:00
andreast
a7373d1fb4 Enable the new PCI-PCI bridge driver by default.
Tested on 32- and 64-bit PowerMac.
2012-02-19 10:10:12 +00:00
nwhitehorn
b5854e1423 Improve error handling in smusat(4).
MFC after:	4 days
2012-02-15 16:59:24 +00:00
nwhitehorn
b81e3d3b8f The bus resource adjustment API is not meant to work on active resources.
Return an error if a driver attempts this, and, if INVARIANTS is on,
panic.

Reviewed by:	jhb
2012-02-07 19:14:13 +00:00
nwhitehorn
412d48f588 Inherit from PCI bridge driver instead of manually specifying all of its
methods.

Obtained from:	sparc64
MFC after:	1 week
2012-02-05 20:07:45 +00:00
andreast
bf13243b53 Replace the assembler macro WEAK_ALIAS with a new macro WEAK_REFERENCE which
has the same API as __weak_reference(). Give 'x' in SYS.h a more meaningful
name.

Tested on 32- and 64-bit PowerMac.

Reviewed by:	bde
2012-02-05 20:04:43 +00:00
nwhitehorn
d550d4616b Make sure to remap adjusted resources. 2012-02-05 16:54:26 +00:00
andreast
d8b750398a Revert the _NOPROF entries on cpu_throw, cpu_switch and savectx. They can be
profiled too now.

MFC after:	2 weeks
2012-02-05 15:59:18 +00:00
nwhitehorn
095a7d3286 Add support for bus_adjust_resource() on all PowerPC/AIM PCI bridges. With
this change, NEW_PCIB appears to work without incident at least on a G5
iMac. More testing will be required before it is turned on in GENERIC.
2012-02-05 00:51:59 +00:00
nwhitehorn
ba0ed234c7 Compatibility with IBM firmware. 2012-02-04 23:25:18 +00:00
nwhitehorn
eec8bcf6e6 Miffed r230993 due to a one-character typo while reviewing the patch. 2012-02-04 20:04:35 +00:00
nwhitehorn
704bf01027 Unify OF PCI infrastructure, including changing from parsing the device
tree based on heuristics to parsing it based on the spec. This should also
lay the foundation for NEW_PCIB on PowerPC.

MFC after:	3 months
2012-02-04 19:54:13 +00:00
nwhitehorn
8c3a18753f Avoid warnings about duplicate modules.
MFC after:	2 weeks
2012-02-04 19:50:26 +00:00
kib
9b85c8ca68 Fix build for the case of powerpc64 kernel without COMPAT_FREEBSD32.
MFC after:	2 months
2012-01-30 19:31:17 +00:00
kib
6392be1eb8 Finally, try to enable the nxstacks on amd64 and powerpc64 for both 64bit
and 32bit ABIs. Also try to enable nxstacks for PAE/i386 when supported,
and some variants of powerpc32.

MFC after:	2 months (if ever)
2012-01-30 07:56:00 +00:00
das
9feb719605 Add C11 macros describing subnormal numbers to float.h.
Reviewed by:	bde
2012-01-23 06:36:41 +00:00
andreast
cec8421d47 This commit adds profiling support for powerpc64. Now we can do application
profiling and kernel profiling. To enable kernel profiling one has to build
kgmon(8). I will enable the build once I managed to build and test powerpc
(32-bit) kernels with profiling support.

- add a powerpc64 PROF_PROLOGUE for _mcount.
- add macros to avoid adding the PROF_PROLOGUE in certain assembly entries.
- apply these macros where needed.
- add size information to the MCOUNT function.

MFC after:	3 weeks, together with r230291
2012-01-20 22:34:19 +00:00
nwhitehorn
d22191faaa Prevent an error resulting from signed/unsigned comparison on systems
that do not comply with the OF spec.

Submitted by:	Anders Gavare
MFC after:	1 week
2012-01-20 22:24:39 +00:00
das
eb8ecc65f7 Add parentheses where required. Without them, `sizeof LDBL_MAX'
is a syntax error and shouldn't be, while `1 FLT_ROUNDS' isn't a
syntax error and should be.  Thanks to bde for the examples.
2012-01-20 06:51:41 +00:00
das
48c614390e Fix the value of float_t to match what is implied by FLT_EVAL_METHOD. 2012-01-16 20:17:51 +00:00
das
8b40681e9a Change the definition of FLT_EVAL_METHOD from 1 to 0. A value of 1 implies
that the compiler promotes floats to double precision in computations, but
inspection of the output of a cross-compiler indicates that this isn't the
case on powerpc.
2012-01-16 20:17:29 +00:00
nwhitehorn
4371f8aebb Pick a constant high IRQ value for the PS3 IPI, which lets PS3 devices be
usefully loaded and unloaded as modules.

Submitted by:	geoffrey dot levand at mail dot ru
MFC after:	2 weeks
2012-01-15 18:26:43 +00:00
nwhitehorn
64487bd46e Now that we can tolerate LPAR context switches on the PS3 hypervisor, going
to hypervisor-idle on both threads will not hang the kernel.
2012-01-15 16:57:18 +00:00
nwhitehorn
19c997ffb1 Rework SLB trap handling so that double-faults into an SLB trap handler are
possible, and double faults within an SLB trap handler are not. The result
is that it possible to take an SLB fault at any time, on any address, for
any reason, at any point in the kernel.

This lets us do two important things. First, it removes the (soft) 16 GB RAM
ceiling on PPC64 as well as any architectural limitations on KVA space.
Second, it lets the kernel tolerate poorly designed hypervisors that
have a tendency to fail to restore the SLB properly after a hypervisor
context switch.

MFC after:	6 weeks
2012-01-15 00:08:14 +00:00
jhibbits
ca439f51f0 Add PWM monitoring sysctl to G4 MDD (Windtunnel) fan driver. While there, clean
up some style nits.

Approved by:	nwhitehorn (mentor)
MFC after:	3 days
2012-01-12 22:21:20 +00:00
nwhitehorn
fbc68e09a0 Add a memory barrier to bus_dmamap_sync(), as should have always been
present. We need a sync instead of eieio, as eieio does not enforce storage
ordering between main and device memory.
2012-01-11 16:53:51 +00:00
andreast
451744fb3c Fix build on powerpc64 too. The same as r229640. 2012-01-05 22:06:01 +00:00
adrian
0478fd27f9 Fix build. 2012-01-05 20:19:33 +00:00
andreast
0fa8414b70 Introduce internal macros for __U/INT64_C to define the U/INT64_MAX/MIN
values properly. The previous definition only worked if __STDC_LIMIT_MACROS
and __STDC_CONSTANT_MACROS were defined at the same time.
2012-01-04 16:02:52 +00:00