Commit Graph

113 Commits

Author SHA1 Message Date
Scott Long
f7a74e061b Add a new sysctl, dev.cxgbe.N.rsrv_noflow, and a companion tunable,
hw.cxgbe.rsrv_noflow.  When set, queue 0 of the port is reserved for
TX packets without a flowid.  The hash value of packets with a flowid
is bumped up by 1.  The intent is to provide a private queue for
link-level packets like LACP that is unlikely to overflow or suffer
deep queue latency.

Reviewed by:	np
Obtained from:	Netflix
MFC after:	3 days
2014-02-06 18:40:38 +00:00
Navdeep Parhar
454813ff9c cxgbe(4): Use the port's tx channel to identify it to t4_clr_port_stats.
MFC after:	3 days
2014-02-06 02:34:29 +00:00
Adrian Chadd
3af0f449ae Add an option to enable or disable the small RX packet copying that
is done to improve performance of small frames.

When doing RX packing, the RX copying isn't necessarily required.

Reviewed by:	np
2014-01-02 23:23:33 +00:00
Navdeep Parhar
93e9cae3fa Read card capabilities after firmware initialization, instead of setting
them up as part of firmware initialization (which the driver gets to do
only if it's the master driver).

Read the range of tids available for the ETHOFLD functionality if it's
enabled.

New is_ftid() and is_etid() functions to test whether a tid falls within
the range of filter tids or ETHOFLD tids respectively.

MFC after:	2 weeks
2013-12-14 03:08:03 +00:00
Adrian Chadd
ac68deae6d Print out the full PCIe link negotiation during dmesg.
I found this useful when checking whether a NIC is in a PCIE 3.0 8x slot
or not.

Reviewed by:	np
Sponsored by:	Netflix, inc.
2013-12-10 00:07:04 +00:00
Navdeep Parhar
d419aaa126 Unstaticize t4_list and t4_uld_list. This works around a clang
annoyance[1] and allows kgdb to find these symbols.

[1] http://lists.freebsd.org/pipermail/freebsd-hackers/2012-November/041166.html

MFC after:	3 days
2013-12-09 23:33:57 +00:00
Navdeep Parhar
273ef9912d cxgbe(4): save a copy of the RSS map for each port for the driver's use. 2013-12-08 17:47:37 +00:00
Navdeep Parhar
05337b80ee cxgbe(4): T4_SET_SCHED_CLASS and T4_SET_SCHED_QUEUE ioctls to program
scheduling classes in the chip and to bind tx queue(s) to a scheduling
class respectively.  These can be used for various kinds of tx traffic
throttling (to force selected tx queues to drain at a fixed Kbps rate,
or a % of the port's total bandwidth, or at a fixed pps rate, etc.).

Obtained from:	Chelsio
2013-12-03 18:34:52 +00:00
Navdeep Parhar
245a0bd40a cxgbe(4): update the internal list of device features.
MFC after:	3 days
2013-11-21 20:07:58 +00:00
Navdeep Parhar
1192eeb8a3 cxgbe(4): Tidy up the display for payload memory statistics (pm_stats).
# sysctl -n dev.t4nex.0.misc.pm_stats
# sysctl -n dev.t5nex.0.misc.pm_stats

MFC after:	1 week
2013-11-07 00:25:49 +00:00
Navdeep Parhar
be2c01211c cxgbe(4): Exclude MPS_RPLC_MAP_CTL (0x11114) from the register dump. Turns
out it's a write-only register with strange side effects on read.

Submitted by:	gnn
MFC after:	3 days
2013-11-04 21:06:21 +00:00
Navdeep Parhar
48d05478bf cxgbe(4): Update T4 and T5 firmwares to 1.9.12.0 2013-10-14 21:25:07 +00:00
Gleb Smirnoff
4cdc1f5421 There are some high performance NICs that count statistics in hardware,
and there are ifnets, that do that via counter(9). Provide a flag that
would skip cache line trashing '+=' operation in ether_input().

Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
Reviewed by:	melifaro, adrian
Approved by:	re (marius)
2013-10-09 19:04:40 +00:00
Navdeep Parhar
480e603c79 Merge r254386 from user/np/cxl_tuning. Add an INET|INET6 check missing
in said revision.

r254386:
Flush inactive LRO entries periodically.
2013-08-29 06:26:22 +00:00
Navdeep Parhar
319a31ea18 Change t4_list_lock and t4_uld_list_lock from mutexes to sx'es.
- tom_uninit had to be reworked not to hold the adapter lock (a mutex)
  around t4_deactivate_uld, which acquires the uld_list_lock.
- the ifc_match for the interface cloner that creates the tracer ifnet
  had to be reworked as the kernel calls ifc_match with the global
  if_cloners_mtx held.
2013-08-28 20:59:22 +00:00
Navdeep Parhar
9800517691 Add hooks in base cxgbe(4) for the iWARP upper-layer driver. Update a
couple of assertions in the TOE driver as well.
2013-08-28 20:45:45 +00:00
Navdeep Parhar
8a59745fca Use correct mailbox and PCIe PF number when querying RDMA parameters. 2013-08-26 19:02:52 +00:00
Navdeep Parhar
2485eeee37 Display P/N information in the description.
Submitted by:	gnn
MFC after:	3 days
2013-08-20 18:22:04 +00:00
Navdeep Parhar
82342de26d Display temperature sensor data. Shows -1 if sensor not
available on the card.

# sysctl dev.t4nex.0.temperature
# sysctl dev.t5nex.0.temperature
2013-08-02 18:05:42 +00:00
Navdeep Parhar
6e22f9f3da Display SGE tunables in the sysctl tree.
dev.t5nex.0.fl_pktshift: payload DMA offset in rx buffer (bytes)
dev.t5nex.0.fl_pad: payload pad boundary (bytes)
dev.t5nex.0.spg_len: status page size (bytes)
dev.t5nex.0.cong_drop: congestion drop setting

Discussed with:	scottl
2013-07-31 05:12:51 +00:00
Navdeep Parhar
2393220538 Display a string instead of a numeric code in the linkdnrc sysctl.
Submitted by:	gnn@
2013-07-27 07:43:43 +00:00
Navdeep Parhar
716c9e1b58 Expand the list of devices claimed by cxgbe(4). 2013-07-27 00:53:07 +00:00
Navdeep Parhar
caf20efcde Add support for packet-sniffing tracers to cxgbe(4). This works with
all T4 and T5 based cards and is useful for analyzing TSO, LRO, TOE, and
for general purpose monitoring without tapping any cxgbe or cxl ifnet
directly.

Tracers on the T4/T5 chips provide access to Ethernet frames exactly as
they were received from or transmitted on the wire.  On transmit, a
tracer will capture a frame after TSO segmentation, hw VLAN tag
insertion, hw L3 & L4 checksum insertion, etc.  It will also capture
frames generated by the TCP offload engine (TOE traffic is normally
invisible to the kernel).  On receive, a tracer will capture a frame
before hw VLAN extraction, runt filtering, other badness filtering,
before the steering/drop/L2-rewrite filters or the TOE have had a go at
it, and of course before sw LRO in the driver.

There are 4 tracers on a chip.  A tracer can trace only in one direction
(tx or rx).  For now cxgbetool will set up tracers to capture the first
128B of every transmitted or received frame on a given port.  This is a
small subset of what the hardware can do.  A pseudo ifnet with the same
name as the nexus driver (t4nex0 or t5nex0) will be created for tracing.
The data delivered to this ifnet is an additional copy made inside the
chip.  Normal delivery to cxgbe<n> or cxl<n> will be made as usual.

/* watch cxl0, which is the first port hanging off t5nex0. */
# cxgbetool t5nex0 tracer 0 tx0  (watch what cxl0 is transmitting)
# cxgbetool t5nex0 tracer 1 rx0  (watch what cxl0 is receiving)
# cxgbetool t5nex0 tracer list
# tcpdump -i t5nex0   <== all that cxl0 sees and puts on the wire

If you were doing TSO, a tcpdump on cxl0 may have shown you ~64K
"frames" with no L3/L4 checksum but this will show you the frames that
were actually transmitted.

/* all done */
# cxgbetool t5nex0 tracer 0 disable
# cxgbetool t5nex0 tracer 1 disable
# cxgbetool t5nex0 tracer list
# ifconfig t5nex0 destroy
2013-07-26 22:04:11 +00:00
Navdeep Parhar
2b66d73259 Attach to the 4x10G T540-CR card. 2013-07-11 19:09:31 +00:00
Navdeep Parhar
3a760ee793 - Show the reason why link is down if this information is available.
- Display the temperature and PHY firmware version of the BT PHY.

MFC after:	1 day
2013-07-05 01:53:51 +00:00
Navdeep Parhar
6eb3180fb2 - Make note of interface MTU change if the rx queues exist, and not just
when the interface is up.
- Add a tunable to control the TOE's rx coalesce feature (enabled by
  default as it always has been).  Consider the interface MTU or the
  coalesce size when deciding which cluster zone to use to fill the
  offload rx queue's free list.  The tunable is:
  dev.{t4nex,t5nex}.<N>.toe.rx_coalesce

MFC after:	1 day
2013-07-04 21:19:01 +00:00
Navdeep Parhar
6300655cc1 On-the-fly changes to the interrupt coalescing timer should apply to the
TOE rx queues too.

MFC after:	1 day
2013-07-04 20:17:39 +00:00
Navdeep Parhar
c337fa30af - Read all TP parameters in one place.
- Read the filter mode, calculate various shifts, and use them
  properly during active open (in select_ntuple).

MFC after:	1 day
2013-07-04 17:55:52 +00:00
Navdeep Parhar
f72b68a1bf - Include the T5 firmware with the driver.
- Update the T4 firmware to the latest.
- Minor reorganization and updates to the version macros, etc.

Obtained from:	Chelsio
MFC after:	1 day
2013-07-03 23:52:15 +00:00
Navdeep Parhar
87c7afeb55 Add a sysctl to get the number of filters available.
sysctl dev.t4nex.<N>.nfilters
sysctl dev.t5nex.<N>.nfilters

MFC after:	3 days
2013-07-01 17:31:04 +00:00
Navdeep Parhar
9942898697 Update T5 register ranges. This is so that regdump skips over registers
with read side-effects.

MFC after:	3 days
2013-06-27 18:59:07 +00:00
Navdeep Parhar
ad13c6af54 cxgbe(4): Never install a firmware if hw.cxgbe.fw_install is 0.
MFC after:	1 week
2013-06-05 20:57:52 +00:00
Navdeep Parhar
9050afc0a0 cxgbe(4): Provide accurate hit count for filters on T5 cards. The
location within the TCB and the size have both changed.

MFC after:	1 week
2013-06-04 02:25:25 +00:00
Navdeep Parhar
9e4ffff197 cxgbe(4): Some more debug sysctls. These work on both T4 and T5 based
cards.

dev.t5nex.0.misc.cim_ma_la: CIM MA logic analyzer
dev.t5nex.0.misc.cim_pif_la: CIM PIF logic analyzer
dev.t5nex.0.misc.mps_tcam: MPS TCAM entries
dev.t5nex.0.misc.tp_la: TP logic analyzer
dev.t5nex.0.misc.ulprx_la: ULPRX logic analyzer

Obtained from:	Chelsio
MFC after:	1 week
2013-06-01 02:07:37 +00:00
Konstantin Belousov
5ada86640b Add dependencies on the firmware, which allows the loading of the cxgb
and cxgbe modules.

Reviewed and approved by:	np
MFC after:	1 week
2013-05-16 13:07:02 +00:00
Navdeep Parhar
d607c7477c Deal correctly with 40G ports that don't have any transceiver plugged
in.  Do not claim that they have unknown tranceivers.

MFC after:	3 days
2013-05-13 20:00:03 +00:00
Navdeep Parhar
959cbee5b0 cxgbe: Switch to a better way to install firmware.
MFC after:	1 week
2013-05-03 20:09:17 +00:00
Navdeep Parhar
249b2994d4 Attach to the T580 (2 x 40G) card.
MFC after:	1 week.
2013-04-30 06:30:21 +00:00
Navdeep Parhar
8cf31b85b5 - Provide accurate ifmedia information so that 40G ports/transceivers are
displayed properly in ifconfig, etc.

- Use the same number of tx and rx queues for a 40G port as for a 10G port.

MFC after:	1 week
2013-04-30 05:51:52 +00:00
Navdeep Parhar
c0bc8af9b7 Add pciids of the T5 based cards. The ones that I haven't tested with
cxgbe(4) are disabled for now.  This will change.

MFC after:	2 weeks
2013-04-11 23:40:05 +00:00
Navdeep Parhar
77ad3c4146 Cosmetic change (s/wrwc/wcwr/;s/WRWC/WCWR/).
MFC after:	3 days.
2013-04-11 22:49:29 +00:00
Navdeep Parhar
e7fdf38bbb Get rid of a couple of stray \n's.
MFC after:	3 days.
2013-04-11 21:17:49 +00:00
Navdeep Parhar
53e8e49dcf There is no need for elaborate queries and error checking when trying to
set FW4MSG_ENCAP.

MFC after:	3 days
2013-04-11 21:15:35 +00:00
Navdeep Parhar
408b98ef5a - Explain clearly why a different firmware is being installed (if/when
it is being installed).  Improve other error messages while here.

- Select special FPGA specific configuration profile when appropriate.

MFC after:	3 days
2013-04-11 19:39:40 +00:00
Navdeep Parhar
13bf4b0798 cxgbe(4): Ensure that the MOD_LOAD handler runs before either t4nex or
t5nex attach to their devices.

MFC after:	3 days
2013-04-11 17:50:50 +00:00
Navdeep Parhar
d14b0ac129 cxgbe(4): Add support for Chelsio's Terminator 5 (aka T5) ASIC. This
includes support for the NIC and TOE features of the 40G, 10G, and
1G/100M cards based on the T5.

The ASIC is mostly backward compatible with the Terminator 4 so cxgbe(4)
has been updated instead of writing a brand new driver.  T5 cards will
show up as cxl (short for cxlgb) ports attached to the t5nex bus driver.

Sponsored by:	Chelsio
2013-03-30 02:26:20 +00:00
Navdeep Parhar
d78bd33fac cxgbe(4): Consider all the API versions of the interfaces exported by
the firmware (instead of just the main firmware version) when evaluating
firmware compatibility.  Document the new "hw.cxgbe.fw_install" knob
being introduced here.

This should fix kern/173584 too.  Setting hw.cxgbe.fw_install=2 will
mostly do what was requested in the PR but it's a bit more intelligent
in that it won't reinstall the same firmware repeatedly if the knob is
left set.

PR:		kern/173584
MFC after:	5 days
2013-02-26 20:35:54 +00:00
Navdeep Parhar
0abd31e2f7 cxgbe(4): Ask the card's firmware to pad up tiny CPLs by encapsulating
them in a firmware message if it is able to do so.  This works out
better for one of the FIFOs in the chip.

MFC after:	5 days
2013-02-26 00:27:27 +00:00
Navdeep Parhar
c1508f2bad cxgbe(4): Add sysctls to extract debug information from the chip:
dev.t4nex.X.misc.cim_la         logic analyzer dump
dev.t4nex.X.misc.cim_qcfg       queue configuration
dev.t4nex.X.misc.cim_ibq_xxx    inbound queues
dev.t4nex.X.misc.cim_obq_xxx    outbound queues

Obtained from:	Chelsio
MFC after:	1 week
2013-02-21 20:13:15 +00:00
Navdeep Parhar
bf3db9ebd8 Do not hold locks around hardware context reads.
MFC after:	3 days
2013-02-09 00:35:28 +00:00