The newbus lock is responsible for protecting newbus internIal structures,
device states and devclass flags. It is necessary to hold it when all
such datas are accessed. For the other operations, softc locking should
ensure enough protection to avoid races.
Newbus lock is automatically held when virtual operations on the device
and bus are invoked when loading the driver or when the suspend/resume
take place. For other 'spourious' operations trying to access/modify
the newbus topology, newbus lock needs to be automatically acquired and
dropped.
For the moment Giant is also acquired in some key point (modules subsystem)
in order to avoid problems before the 8.0 release as module handlers could
make assumptions about it. This Giant locking should go just after
the release happens.
Please keep in mind that the public interface can be expanded in order
to provide more support, if there are really necessities at some point
and also some bugs could arise as long as the patch needs a bit of
further testing.
Bump __FreeBSD_version in order to reflect the newbus lock introduction.
Reviewed by: ed, hps, jhb, imp, mav, scottl
No answer by: ariff, thompsa, yongari
Tested by: pho,
G. Trematerra <giovanni dot trematerra at gmail dot com>,
Brandon Gooch <jamesbrandongooch at gmail dot com>
Sponsored by: Yahoo! Incorporated
Approved by: re (ksmith)
requesting IDENTIFY from slave device first. This order is important
for proper cable type detection by master device.
PR: kern/136438
Approved by: re (kib)
modularize it so that new transports can be created.
Add a transport for SATA
Add a periph+protocol layer for ATA
Add a driver for AHCI-compliant hardware.
Add a maxio field to CAM so that drivers can advertise their max
I/O capability. Modify various drivers so that they are insulated
from the value of MAXPHYS.
The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel. The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives. It also supports port multipliers.
ATA drives are accessed via 'ada' device nodes. ATAPI drives are
accessed via 'cd' device nodes. They can all be enumerated and manipulated
via camcontrol, just like SCSI drives. SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol. See the camcontrol manpage for further
details. Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.
This code is very experimental at the moment. The userland ABI/API has
changed, so applications will need to be recompiled. It may change
further in the near future. The 'ada' device name may also change as
more infrastructure is completed in this project. The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.
Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed. In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.
The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols. It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware. While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged. Help with new transports is also encouraged.
Submitted by: scottl, mav
Approved by: re
MAXPHYS. Current ataahci driver memory allocation scheme includes only
64 items in DMA S/G table, and so not guarantied to support transactions
with more then 252K data.
Approved by: re (kensmith)
MFC after: 2 weeks
is invalid because the ioctl happens without prior open. The ioctl
got introduced to provide backward compatibility for extended
partitions, but it ended up not being used because it didn't work
as expected. Since there are no consumers of the ioctl and the
implementation is broken, the best fix is to remove the code
entirely.
Spotted by: phk
Approved by: re (kensmith)
This removes unnecessary PCI #includes dependency for systems with ATA
controllers living at non-PCI buses.
Submitted by: Piotr Ziecik
Obtained from: Semihalf
routine and save the resources using a chipset-data structure. Use these
preallocated resources to setup resources for the SATA channels to avoid
asking the PCI bus to allocate the same BAR multiple times.
Tested by: bms
MFC after: 1 week
chipset-specific code to attach chipset-specific data.
- Use chipset-specific data in the acard and promise chipsets rather than
changing the ivars of ATA PCI devices. ivars are reserved for use by the
parent bus driver and are _not_ available for use by devices directly.
This fixes a panic during sysctl -a with certain Promise controllers with
ACPI enabled.
Reviewed by: mav
Tested by: Magnus Kling (kingfon @ gmail) (on 7)
MFC after: 3 days
- Generate fake channel interrupts even if channel busy with previous
request to let it finish. Without this, dumping requests were just queued
and never processed.
- Drop pre-dump requests queue on dumping. ATA code, working in dumping
(interruptless) mode, unable to handle long request queue. Actually, to get
coherent dump we anyway should do as few unrelated actions as possible.
Feature is controlled by hint.ata.X.pm_level tunable:
0 - PM disabled, old behaviour, default.
1 - device is allowed to initiate PM state change, host is passive.
2 - host initiates PARTIAL state transition every time port is idle.
3 - host initiates SLUMBER state transition every time port is idle.
PARTIAL state has up to 100us (50us for me) wakeup latency, but for my
ICH8M saves 0.5W of power per drive. SLUMBER state has up to 10ms (3.5ms
for me) wakeup latency, but saves 0.8W of power.
Modes 2 and 3 are implemented only for AHCI driver now.
Interface power management is incompatible with device presence detection
(host receives no signal from drive, so unable to monitor it), so later is
disabled when PM is used.
controllers may be configured as legacy IDE mode by modifying subclass and
progif without actually changing PCI device IDs. Instead of complicating
code, we always force AHCI mode while probing. Also we restore AHCI mode
while resuming per ATI/AMD register programming/requirement guides.
- Fix SB700/800 "combined" mode. Unlike SB600, this PATA controller can
combine two SATA ports and emulate one PATA channel as primary or secondary
depending on BIOS configuration. When the combined mode is disabled, this
channel disappears and it works just like SB600 PATA controller, however.
- Add more PCI device IDs for SB700/800 and adjust device descriptions.
SB800 shares the same PCI device IDs and added two more SATA IDs.
the ATA status register with a 4-byte read request. This updates it, and
subsequent 1-byte reads will return the correct result.
This commit adds a hack to do this, which is currently ifdef'd powerpc,
although Linux and Darwin do this unconditionally on all platforms.
Add ch_suspend/ch_resume methods for PCI controllers and implement them
for AHCI. Refactor AHCI channel initialization according to it.
Fix Port Multipliers operation. It is far from perfect yet, but works now.
Tested with JMicron JMB363 AHCI + SiI 3726 PMP pair.
Previous version was also tested with SiI 4726 PMP.
Hardware sponsored by: Vitsch Electronics / VEHosting.nl
both disks, or if we should suppress the slave drive. Default to
suppressing the slave, in the case that this REQIURED tuple turns out
to not actually be present...
ready status. Most of controllers managed to issue coommand and set BUSY
bit almost simultaneously, before we will read it, but at least JMicron JMB363
don't. Ignore timeout errors to keep old behavior when error there was
impossible.
For me this fixes timeout errors on the first command after channel attach
or reinit. Boot in my case is not affected, as there is much time passing
between reset and next command giving reset time to complete.
done in other places. Until we have no support for command queueing we have
no any benefit from FBS, while enabling it only here somehow leads to
"port not ready" errors on Intel 63XXESB2 controller.
Tested by: Larry Rosenman <ler AT lerctr.org>
and partially r188903. Revert breaks new drives detection on reinit to the
state as it was before me, but fixes series of new bugs reported by some
people.
Unconditional queueing of ata_completed() calls can lead to deadlock if
due to timeout ata_reinit() was called at the same thread by previous
ata_completed(). Calling of ata_identify() on ata_reinit() in current
implementation opens numerous races and deadlocks.
Problems I was touching here are still exist and should be addresed, but
probably in different way.
drivers' probe routines. It allows not to sleep and so not drop Giant inside
ata_identify() critical section and so avoid crash if it reentered on
request timeout. Reentering of probe call checked inside of it.
Give device own knowledge about it's type (ata/atapi/atapicam). It is not
a good idea to ask channel status for device type inside ata_getparam().
Add softc memory deallocation on device destruction.
