Commit Graph

132 Commits

Author SHA1 Message Date
cem
a8f54ee656 pciconf(8): Replace an assert with errx
The condition can be hit with simple user input, so it isn't an invariant.
Just error out.

PR:		217003
Reported by:	Vladislav V. Prodan <admin at support.od.ua>
Sponsored by:	Dell EMC Isilon
2017-02-11 18:04:43 +00:00
cem
d6b83981c4 pciconf(8): Reallow trailing colon in selectors
Reallow device selectors to have a trailing colon, as documented in the
manual page.  This was broken along with some unrelated cleanups in
r295806.

PR:		215979
Reported by:	David Boyd <David.Boyd49 at twc.com>
Sponsored by:	Dell EMC Isilon
2017-01-12 00:34:37 +00:00
mav
50b1df2a7c Add names for some DASP devices.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	1 week
2016-10-21 15:23:54 +00:00
vangyzen
8478efdf71 Fix some logic in PCIe HotPlug; display EI status
The interpretation of the Electromechanical Interlock Status was
inverted, so we disengaged the EI if a card was inserted.
Fix it to engage the EI if a card is inserted.

When displaying the slot capabilites/status with pciconf:

- We inverted the sense of the Power Controller Control bit,
  saying the power was off when it was really on (according to
  this bit).  Fix that.

- Display the status of the Electromechanical Interlock:
        EI(engaged)
        EI(disengaged)

Reviewed by:	jhb
MFC after:	3 days
Sponsored by:	Dell Inc.
Differential Revision:	https://reviews.freebsd.org/D7426
2016-08-05 23:23:48 +00:00
eadler
156fd4834a Don't repeat the the word 'the'
(one manual change to fix grammar)

Confirmed With: db
Approved by: secteam (not really, but this is a comment typo fix)
2016-05-17 12:52:31 +00:00
jhb
5fdd1034fa Output information about PCI-e devices with slots.
In particular this includes additional information on HotPlug capable
slots.
2016-04-02 01:59:53 +00:00
jhb
803903b35d Various updates to the PCI-express capability output.
- Group the output so that it follows the capability register set more
  closely.  The first line now contains device information and the
  second line contains link information.  As a result, ARI status is now
  output on the first line, and the link width is moved down to the second
  line of link information.
- Only read the DEVICE_CAP2 register to check for ARI if the capability
  version is >= 2.
- Don't output any link information if the link capability and status
  registers are zero.
- Label the MSI interrupt index value as "MSI" instead of "IRQ".
2016-04-02 01:55:43 +00:00
pfg
05d67f0149 pciconf: Silence a GCC warning.
Fix the build on sparc64 and powerpc.

Taken from:	wma
2016-02-26 23:12:59 +00:00
wma
15f8acc5ed Change format string in pciconf EA to jx
Fix compilation error introduced by r296081
2016-02-26 10:24:24 +00:00
wma
c652e74751 Add support for Enhanced Allocation in pciconf
* Modified pciconf to print EA capability structure
 * Added register description to pcireg.h

Obtained from:         Semihalf
Sponsored by:          Cavium
Approved by:           cognet (mentor)
Reviewed by:           jhb
Differential revision: https://reviews.freebsd.org/D5440
2016-02-26 08:35:04 +00:00
se
73c7c751cd Fix possible out-of-bounds access detected by Ulrich Spörleins "scan-build".
Some invalid PCI device selectors could cause read access to an initialized
variable next to the array (local loop index variable).

While here, the parser has been made more strict with regard to the syntax
of PCI device selectors as documented in the man-page. E.g. "pci:" used to
be interpreted as "pci0:0".

MFC after:	3 days
2016-02-19 14:01:35 +00:00
se
4afdb85262 Use __unused instead of casting to void to silence the unused parameter
warning.

Fix the indentation of 2 lines to conform with the style of this file.

Submitted by:	jhb
2016-02-18 20:20:36 +00:00
se
94a9d119b9 Make WARNS=6 safe.
Tested with Clang 3.7.1, GCC 4.2.1 and GCC 4.8.5 on amd64.
2016-02-18 15:23:25 +00:00
jhb
4647004788 Add a new -B flag for use with list mode (-l) that lists details about
bridges.  Currently this includes information about what resources a
bridge decodes on the upstream side for use by downstream devices including
bus numbers, I/O port resources, and memory resources.  Windows and bus
ranges are enumerated for both PCI-PCI bridges and PCI-CardBus bridges.

To simplify the implementation, all enumeration is done by reading the
appropriate config space registers directly rather than querying the
bridge driver in the kernel via new ioctls.  This does result in a few
limitations.

First, an unimplemented window in a PCI-PCI bridge cannot be accurately
detected as accurate detection requires writing to the window base
register.  That is not safe for pciconf(8).  Instead, this assumes that
any window where both the base and limit read as all zeroes is
unimplemented.

Second, the PCI-PCI bridge driver in a tree has a few quirks for
PCI-PCI bridges that use subtractive decoding but do not indicate that
via the progif config register.  The list of quirks is duplicated in
pciconf's source.

Reviewed by:	imp
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D4171
2015-11-23 23:48:07 +00:00
jhb
42d9b66898 Note if relaxed ordering or no snoop is enabled for each PCI-express device.
MFC after:	1 week
2015-11-05 20:24:56 +00:00
bapt
50ceb9f7c2 Prefer pciids database from ports if present
Given the pciids database on ports is updated more often than the one in base
prefer this version if present, otherwise read the one from base.

MFC after:	1 week
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D3391
2015-09-06 20:05:29 +00:00
sjg
008d7c831f Add META_MODE support.
Off by default, build behaves normally.
WITH_META_MODE we get auto objdir creation, the ability to
start build from anywhere in the tree.

Still need to add real targets under targets/ to build packages.

Differential Revision:       D2796
Reviewed by: brooks imp
2015-06-13 19:20:56 +00:00
sjg
75a137820d dirdeps.mk now sets DEP_RELDIR 2015-06-08 23:35:17 +00:00
sjg
65145fa4c8 Merge sync of head 2015-05-27 01:19:58 +00:00
jhb
e4683250d1 Reassign copyright statements on several files from Advanced
Computing Technologies LLC to Hudson River Trading LLC.

Approved by:	Hudson River Trading LLC (who owns ACT LLC)
MFC after:	1 week
2015-04-23 14:22:20 +00:00
rstone
b7fc2d31bd Teach pciconf how to dump out SR-IOV capability
Differential Revision:	https://reviews.freebsd.org/D1639
Reviewed by:		jhb
MFC after:		1 month
Sponsored by:		Sandvine Inc.
2015-03-01 00:59:35 +00:00
dim
51dfb55a00 Fix the following clang 3.6.0 warnings in pciconf:
usr.sbin/pciconf/pciconf.c:237:12: error: address of array 'p->pd_name' will
always evaluate to 'true' [-Werror,-Wpointer-bool-conversion]
                            (p->pd_name && *p->pd_name) ? p->pd_name :
                             ~~~^~~~~~~ ~~
usr.sbin/pciconf/pciconf.c:239:12: error: address of array 'p->pd_name' will
always evaluate to 'true' [-Werror,-Wpointer-bool-conversion]
                            (p->pd_name && *p->pd_name) ? (int)p->pd_unit :
                             ~~~^~~~~~~ ~~

The pd_name field of struct pci_conf is an array, so it can never be null.
Remove the unnecessary check.
2015-01-28 21:21:35 +00:00
sjg
b137080f19 Merge from head@274682 2014-11-19 01:07:58 +00:00
markj
6094cae3ca Fix some buglets in the error-handling of getdevice(). In particular, report
an error if the argument to pciconf -a doesn't have a unit number, rather
than triggering an assertion failure.

PR:		194506
Reported by:	Anthony Cornehl <accornehl@gmail.com>
Sponsored by:	EMC / Isilon Storage Division
2014-10-22 23:35:56 +00:00
sjg
d7cd1d425c Merge head from 7/28 2014-08-19 06:50:54 +00:00
mav
d4d9cd2fe3 Add IOMMU PCI subclass, found on Tyan S8236 motherboard.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	2 weeks
2014-05-20 14:39:22 +00:00
sjg
5860f0d106 Updated dependencies 2014-05-16 14:09:51 +00:00
sjg
1a7e48acf1 Updated dependencies 2014-05-10 05:16:28 +00:00
sjg
5e568154a0 Merge head 2014-04-28 07:50:45 +00:00
rstone
3c8f124628 Print status of ARI capability in pciconf -c
Teach pciconf how to print out the status (enabled/disabled) of the ARI
capability on PCI Root Complexes and Downstream Ports.

MFC after:	2 months
Sponsored by:	Sandvine Inc.
2014-04-01 16:03:52 +00:00
jhb
69c2b2b5df Add support for displaying VPD for PCI devices via pciconf.
- Store the length of each read-only VPD value since not all values are
  guaranteed to be ASCII values (though most are).
- Add a new pciio ioctl to fetch VPD for a single PCI device.  The values
  are returned as a list of variable length records, one for the device
  name and each keyword.
- Add a new -V flag to pciconf's list mode which displays VPD data for
  each device.

MFC after:	1 week
2014-01-20 20:56:09 +00:00
jhb
ba5bbb1d2a - Allow PCI devices that are attached to a driver to be identified by their
device name instead of just the selector.
- Accept an optional device argument to -l to restrict the output to only
  listing details about a single device.  This is mostly useful in
  conjunction with other flags like -e or -c to allow a user to query
  details about a single device.

MFC after:	1 week
2014-01-20 15:51:02 +00:00
sjg
62bb106222 Merge from head 2013-09-05 20:18:59 +00:00
jkim
040e350119 Decode PCIe ASPM capability and status. 2013-07-18 20:59:58 +00:00
kib
b7a5435147 Decode new HT 3.00 and 3.10 capabilities.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	1 week
2013-05-17 14:05:31 +00:00
sjg
97d8b94956 sync from head 2013-04-12 20:48:55 +00:00
sjg
6d37b86f2b Updated dependencies 2013-03-11 17:21:52 +00:00
sjg
0ee5295509 Updated dependencies 2013-02-16 01:23:54 +00:00
neel
329d8f638f Use the entire 64 bits of 'bar.pbi_length' when printing the bar size.
This allows bar sizes greater than or equal to 4GB to be displayed correctly.
2013-02-10 19:35:40 +00:00
obrien
3028e3f8ab Sync with HEAD. 2013-02-08 16:10:16 +00:00
jhb
b313f550e1 Install <dev/agp/agpreg.h> and <dev/pci/pcireg.h> as userland headers
in /usr/include.

MFC after:	2 weeks
2013-02-05 18:55:09 +00:00
neel
be7ba5de0e Display MSI-X table and PBA offsets when displaying information about MSI-X
capability.

Reviewed by:	jhb, jimharris (initial version)
2013-02-01 19:24:16 +00:00
sjg
778e93c51a Sync from head 2012-11-04 02:52:03 +00:00
jimharris
e85387fbf1 For PCI Express capability, if max link width is greater than zero, print
the current and max link speed.

Sponsored by:	Intel
Discussed with:	jhb
MFC after:	1 week
2012-10-25 17:22:37 +00:00
imp
3903889bbd Indent ecaps the same way we indent caps.
MFC after:	3 days
2012-10-19 22:48:22 +00:00
gavin
9f412b9646 The correct generic term for PCIS_STORAGE_NVM is "NVM" not "NVM Express".
Submitted by:	jimharris
MFC after:	6 days
2012-09-20 08:30:17 +00:00
gavin
7d7784d2dd Recognise NVM Express devices and pretty-print their name.
MFC after:	1 week
2012-09-19 18:22:14 +00:00
gavin
5005c75c5d Align the PCI Express #defines with the style used for the PCI-X
#defines.  This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.

This is a mostly mechanical rename:
  s/PCIR_EXPRESS_/PCIER_/g
  s/PCIM_EXP_/PCIEM_/g
  s/PCIM_LINK_/PCIEM_LINK_/g

When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.

Discussed with:	jhb
MFC after:	1 week
2012-09-18 22:04:59 +00:00
jhb
5bb226a48f - Denote PCI-e endpoints that support FLR.
- Make parsing of PCI-e extended capabilities assume that future version
  numbers are backwards compatible.
- Add new AER error descriptions.
- Add descriptions for more PCI-e extended capabilities.

MFC after:	1 week
2012-09-13 19:08:31 +00:00
gavin
77e9cd7f1e - If the PCIe "SLOT" flag is set, include this in the capability output
- Fix printing of PCIe interrupt number, the shift was incorrect.

MFC after:	1 week
2012-09-05 18:27:45 +00:00