edcafce33d
MFC after: 4 days
84 lines
2.8 KiB
C
84 lines
2.8 KiB
C
/*-
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* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
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* Copyright (c) 2015-2016 Andriy Voskoboinyk <avos@FreeBSD.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $
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* $FreeBSD$
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*/
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#ifndef R92C_VAR_H
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#define R92C_VAR_H
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#include <dev/rtwn/rtl8192c/r92c_rom_defs.h>
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struct r92c_softc {
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uint8_t rs_flags;
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#define R92C_FLAG_ASSOCIATED 0x01
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uint8_t chip;
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#define R92C_CHIP_92C 0x01
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#define R92C_CHIP_92C_1T2R 0x02
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#define R92C_CHIP_UMC_A_CUT 0x04
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#ifndef RTWN_WITHOUT_UCODE
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struct callout rs_c2h_report;
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int rs_c2h_timeout;
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int rs_c2h_pending;
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int rs_c2h_paused;
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#endif
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#define R92C_TX_PAUSED_THRESHOLD 20
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void *rs_txpwr;
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const void *rs_txagc;
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uint8_t board_type;
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uint8_t regulatory;
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uint8_t crystalcap;
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uint8_t pa_setting;
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void (*rs_scan_start)(struct ieee80211com *);
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void (*rs_scan_end)(struct ieee80211com *);
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void (*rs_set_bw20)(struct rtwn_softc *, uint8_t);
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void (*rs_get_txpower)(struct rtwn_softc *, int,
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struct ieee80211_channel *, uint8_t[]);
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void (*rs_set_gain)(struct rtwn_softc *, uint8_t);
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void (*rs_tx_enable_ampdu)(void *, int);
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void (*rs_tx_setup_hwseq)(void *);
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void (*rs_tx_setup_macid)(void *, int);
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void (*rs_set_rom_opts)(struct rtwn_softc *, uint8_t *);
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int rf_read_delay[3];
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uint32_t rf_chnlbw[R92C_MAX_CHAINS];
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};
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#define R92C_SOFTC(_sc) ((struct r92c_softc *)((_sc)->sc_priv))
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#define rtwn_r92c_set_bw20(_sc, _chan) \
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((R92C_SOFTC(_sc)->rs_set_bw20)((_sc), (_chan)))
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#define rtwn_r92c_get_txpower(_sc, _chain, _c, _power) \
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((R92C_SOFTC(_sc)->rs_get_txpower)((_sc), (_chain), (_c), (_power)))
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#define rtwn_r92c_set_gain(_sc, _gain) \
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((R92C_SOFTC(_sc)->rs_set_gain)((_sc), (_gain)))
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#define rtwn_r92c_tx_enable_ampdu(_sc, _buf, _enable) \
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((R92C_SOFTC(_sc)->rs_tx_enable_ampdu)((_buf), (_enable)))
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#define rtwn_r92c_tx_setup_hwseq(_sc, _buf) \
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((R92C_SOFTC(_sc)->rs_tx_setup_hwseq)((_buf)))
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#define rtwn_r92c_tx_setup_macid(_sc, _buf, _id) \
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((R92C_SOFTC(_sc)->rs_tx_setup_macid)((_buf), (_id)))
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#define rtwn_r92c_set_rom_opts(_sc, _buf) \
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((R92C_SOFTC(_sc)->rs_set_rom_opts)((_sc), (_buf)))
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#endif /* R92C_VAR_H */
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