013f2062be
and programming interface codes match. Sponsored by: Intel
422 lines
9.8 KiB
C
422 lines
9.8 KiB
C
/*-
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* Copyright (C) 2012 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/module.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include "nvme_private.h"
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struct nvme_consumer {
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nvme_consumer_cb_fn_t cb_fn;
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void *cb_arg;
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};
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struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS];
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MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations");
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static int nvme_probe(device_t);
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static int nvme_attach(device_t);
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static int nvme_detach(device_t);
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static devclass_t nvme_devclass;
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static device_method_t nvme_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, nvme_probe),
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DEVMETHOD(device_attach, nvme_attach),
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DEVMETHOD(device_detach, nvme_detach),
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{ 0, 0 }
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};
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static driver_t nvme_pci_driver = {
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"nvme",
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nvme_pci_methods,
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sizeof(struct nvme_controller),
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};
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DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, 0, 0);
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MODULE_VERSION(nvme, 1);
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static struct _pcsid
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{
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u_int32_t type;
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const char *desc;
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} pci_ids[] = {
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{ 0x01118086, "NVMe Controller" },
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{ CHATHAM_PCI_ID, "Chatham Prototype NVMe Controller" },
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{ IDT_PCI_ID, "IDT NVMe Controller" },
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{ 0x00000000, NULL }
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};
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static int
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nvme_probe (device_t device)
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{
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struct _pcsid *ep;
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int probe_val = ENXIO;
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u_int32_t type;
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type = pci_get_devid(device);
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ep = pci_ids;
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#if defined(PCIS_STORAGE_NVM)
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if (pci_get_class(device) == PCIC_STORAGE &&
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pci_get_subclass(device) == PCIS_STORAGE_NVM &&
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pci_get_progif(device) == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0)
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probe_val = BUS_PROBE_GENERIC;
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#endif
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while (ep->type && ep->type != type)
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++ep;
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if (ep->desc) {
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device_set_desc(device, ep->desc);
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probe_val = BUS_PROBE_DEFAULT;
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}
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return (probe_val);
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}
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static void
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nvme_load(void)
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{
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}
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static void
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nvme_unload(void)
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{
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}
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static void
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nvme_shutdown(void)
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{
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device_t *devlist;
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struct nvme_controller *ctrlr;
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union cc_register cc;
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union csts_register csts;
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int dev, devcount;
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if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
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return;
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for (dev = 0; dev < devcount; dev++) {
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/*
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* Only notify controller of shutdown when a real shutdown is
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* in process, not when a module unload occurs. It seems at
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* least some controllers (Chatham at least) don't let you
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* re-enable the controller after shutdown notification has
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* been received.
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*/
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ctrlr = DEVICE2SOFTC(devlist[dev]);
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cc.raw = nvme_mmio_read_4(ctrlr, cc);
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cc.bits.shn = NVME_SHN_NORMAL;
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nvme_mmio_write_4(ctrlr, cc, cc.raw);
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csts.raw = nvme_mmio_read_4(ctrlr, csts);
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while (csts.bits.shst != NVME_SHST_COMPLETE) {
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DELAY(5);
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csts.raw = nvme_mmio_read_4(ctrlr, csts);
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}
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}
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free(devlist, M_TEMP);
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}
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static int
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nvme_modevent(module_t mod, int type, void *arg)
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{
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switch (type) {
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case MOD_LOAD:
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nvme_load();
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break;
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case MOD_UNLOAD:
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nvme_unload();
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break;
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case MOD_SHUTDOWN:
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nvme_shutdown();
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break;
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default:
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break;
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}
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return (0);
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}
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moduledata_t nvme_mod = {
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"nvme",
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(modeventhand_t)nvme_modevent,
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0
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};
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DECLARE_MODULE(nvme, nvme_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST);
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void
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nvme_dump_command(struct nvme_command *cmd)
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{
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printf("opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x "
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"mptr:%qx prp1:%qx prp2:%qx cdw:%x %x %x %x %x %x\n",
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cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid,
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cmd->rsvd2, cmd->rsvd3,
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(long long unsigned int)cmd->mptr,
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(long long unsigned int)cmd->prp1,
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(long long unsigned int)cmd->prp2,
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cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14,
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cmd->cdw15);
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}
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void
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nvme_dump_completion(struct nvme_completion *cpl)
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{
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printf("cdw0:%08x sqhd:%04x sqid:%04x "
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"cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n",
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cpl->cdw0, cpl->sqhd, cpl->sqid,
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cpl->cid, cpl->p, cpl->sf_sc, cpl->sf_sct, cpl->sf_m,
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cpl->sf_dnr);
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}
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void
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nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
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{
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struct nvme_tracker *tr;
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struct nvme_qpair *qpair;
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struct nvme_prp_list *prp_list;
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uint32_t cur_nseg;
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KASSERT(error == 0, ("nvme_payload_map error != 0\n"));
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tr = (struct nvme_tracker *)arg;
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qpair = tr->qpair;
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/*
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* Note that we specified PAGE_SIZE for alignment and max
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* segment size when creating the bus dma tags. So here
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* we can safely just transfer each segment to its
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* associated PRP entry.
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*/
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tr->cmd.prp1 = seg[0].ds_addr;
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if (nseg == 2) {
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tr->cmd.prp2 = seg[1].ds_addr;
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} else if (nseg > 2) {
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KASSERT(tr->prp_list,
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("prp_list needed but not attached to tracker\n"));
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cur_nseg = 1;
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prp_list = tr->prp_list;
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tr->cmd.prp2 = (uint64_t)prp_list->bus_addr;
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while (cur_nseg < nseg) {
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prp_list->prp[cur_nseg-1] =
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(uint64_t)seg[cur_nseg].ds_addr;
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cur_nseg++;
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}
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}
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nvme_qpair_submit_cmd(qpair, tr);
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}
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struct nvme_tracker *
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nvme_allocate_tracker(struct nvme_controller *ctrlr, boolean_t is_admin,
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nvme_cb_fn_t cb_fn, void *cb_arg, uint32_t payload_size, void *payload)
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{
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struct nvme_tracker *tr;
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struct nvme_qpair *qpair;
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uint32_t modulo, offset, num_prps;
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boolean_t alloc_prp_list = FALSE;
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if (is_admin) {
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qpair = &ctrlr->adminq;
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} else {
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if (ctrlr->per_cpu_io_queues)
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qpair = &ctrlr->ioq[curcpu];
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else
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qpair = &ctrlr->ioq[0];
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}
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num_prps = payload_size / PAGE_SIZE;
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modulo = payload_size % PAGE_SIZE;
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offset = (uint32_t)((uintptr_t)payload % PAGE_SIZE);
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if (modulo || offset)
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num_prps += 1 + (modulo + offset - 1) / PAGE_SIZE;
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if (num_prps > 2)
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alloc_prp_list = TRUE;
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tr = nvme_qpair_allocate_tracker(qpair, alloc_prp_list);
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memset(&tr->cmd, 0, sizeof(tr->cmd));
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tr->qpair = qpair;
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tr->cb_fn = cb_fn;
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tr->cb_arg = cb_arg;
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tr->payload_size = payload_size;
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return (tr);
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}
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static int
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nvme_attach(device_t dev)
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{
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struct nvme_controller *ctrlr = DEVICE2SOFTC(dev);
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int status;
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status = nvme_ctrlr_construct(ctrlr, dev);
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if (status != 0)
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return (status);
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/*
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* Reset controller twice to ensure we do a transition from cc.en==1
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* to cc.en==0. This is because we don't really know what status
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* the controller was left in when boot handed off to OS.
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*/
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status = nvme_ctrlr_reset(ctrlr);
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if (status != 0)
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return (status);
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status = nvme_ctrlr_reset(ctrlr);
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if (status != 0)
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return (status);
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ctrlr->config_hook.ich_func = nvme_ctrlr_start;
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ctrlr->config_hook.ich_arg = ctrlr;
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config_intrhook_establish(&ctrlr->config_hook);
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return (0);
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}
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static int
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nvme_detach (device_t dev)
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{
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struct nvme_controller *ctrlr = DEVICE2SOFTC(dev);
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struct nvme_namespace *ns;
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int i;
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if (ctrlr->taskqueue) {
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taskqueue_drain(ctrlr->taskqueue, &ctrlr->task);
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taskqueue_free(ctrlr->taskqueue);
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}
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for (i = 0; i < NVME_MAX_NAMESPACES; i++) {
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ns = &ctrlr->ns[i];
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if (ns->cdev)
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destroy_dev(ns->cdev);
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}
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if (ctrlr->cdev)
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destroy_dev(ctrlr->cdev);
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for (i = 0; i < ctrlr->num_io_queues; i++) {
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nvme_io_qpair_destroy(&ctrlr->ioq[i]);
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}
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free(ctrlr->ioq, M_NVME);
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nvme_admin_qpair_destroy(&ctrlr->adminq);
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if (ctrlr->resource != NULL) {
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bus_release_resource(dev, SYS_RES_MEMORY,
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ctrlr->resource_id, ctrlr->resource);
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}
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#ifdef CHATHAM2
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if (ctrlr->chatham_resource != NULL) {
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bus_release_resource(dev, SYS_RES_MEMORY,
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ctrlr->chatham_resource_id, ctrlr->chatham_resource);
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}
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#endif
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if (ctrlr->tag)
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bus_teardown_intr(ctrlr->dev, ctrlr->res, ctrlr->tag);
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if (ctrlr->res)
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bus_release_resource(ctrlr->dev, SYS_RES_IRQ,
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rman_get_rid(ctrlr->res), ctrlr->res);
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if (ctrlr->msix_enabled)
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pci_release_msi(dev);
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return (0);
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}
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static void
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nvme_notify_consumer(struct nvme_consumer *consumer)
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{
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device_t *devlist;
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struct nvme_controller *ctrlr;
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int dev, ns, devcount;
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if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
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return;
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for (dev = 0; dev < devcount; dev++) {
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ctrlr = DEVICE2SOFTC(devlist[dev]);
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for (ns = 0; ns < ctrlr->cdata.nn; ns++)
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(*consumer->cb_fn)(consumer->cb_arg, &ctrlr->ns[ns]);
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}
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free(devlist, M_TEMP);
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}
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struct nvme_consumer *
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nvme_register_consumer(nvme_consumer_cb_fn_t cb_fn, void *cb_arg)
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{
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int i;
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/*
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* TODO: add locking around consumer registration. Not an issue
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* right now since we only have one nvme consumer - nvd(4).
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*/
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for (i = 0; i < NVME_MAX_CONSUMERS; i++)
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if (nvme_consumer[i].cb_fn == NULL) {
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nvme_consumer[i].cb_fn = cb_fn;
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nvme_consumer[i].cb_arg = cb_arg;
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nvme_notify_consumer(&nvme_consumer[i]);
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return (&nvme_consumer[i]);
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}
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printf("nvme(4): consumer not registered - no slots available\n");
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return (NULL);
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}
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void
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nvme_unregister_consumer(struct nvme_consumer *consumer)
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{
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consumer->cb_fn = NULL;
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consumer->cb_arg = NULL;
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}
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