9f28abd980
This includes: o All directories named *ia64* o All files named *ia64* o All ia64-specific code guarded by __ia64__ o All ia64-specific makefile logic o Mention of ia64 in comments and documentation This excludes: o Everything under contrib/ o Everything under crypto/ o sys/xen/interface o sys/sys/elf_common.h Discussed at: BSDcan
164 lines
5.5 KiB
Groff
164 lines
5.5 KiB
Groff
.\" Copyright (c) 1997
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.\" Steve Passe <fsmp@FreeBSD.org>. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. The name of the developer may NOT be used to endorse or promote products
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.\" derived from this software without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd May 7, 2008
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.Dt SMP 4
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.Os
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.Sh NAME
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.Nm SMP
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.Nd description of the FreeBSD Symmetric Multi-Processor kernel
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.Sh SYNOPSIS
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.Cd options SMP
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.Sh DESCRIPTION
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The
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.Nm
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kernel implements symmetric multi-processor support.
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.Sh COMPATIBILITY
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Support for multi-processor systems is present for all Tier-1
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architectures on
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.Fx .
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Currently, this includes amd64, i386 and sparc64.
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Support is enabled using
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.Cd options SMP .
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It is permissible to use the SMP kernel configuration on non-SMP equipped
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motherboards.
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.Sh I386 NOTES
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For i386 systems, the
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.Nm
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kernel supports motherboards that follow the Intel MP specification,
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version 1.4.
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In addition to
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.Cd options SMP ,
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i386 also requires
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.Cd device apic .
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The
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.Xr mptable 1
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command may be used to view the status of multi-processor support.
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.Pp
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The number of CPUs detected by the system is available in
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the read-only sysctl variable
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.Va hw.ncpu .
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.Pp
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.Fx
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allows specific CPUs on a multi-processor system to be disabled.
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This can be done using the
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.Va hint.lapic.X.disabled
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tunable, where X is the APIC ID of a CPU.
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Setting this tunable to 1 will result in the corresponding CPU being
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disabled.
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.Pp
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The
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.Xr sched_ule 4
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scheduler implements CPU topology detection and adjusts the scheduling
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algorithms to make better use of modern multi-core CPUs.
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The sysctl variable
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.Va kern.sched.topology_spec
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reflects the detected CPU hardware in a parsable XML format.
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The top level XML tag is <groups>, which encloses one or more <group> tags
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containing data about individual CPU groups.
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A CPU group contains CPUs that are detected to be "close" together, usually
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by being cores in a single multi-core processor.
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Attributes available in a <group> tag are "level", corresponding to the
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nesting level of the CPU group and "cache-level", corresponding to the
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level of CPU caches shared by the CPUs in the group.
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The <group> tag contains the <cpu> and <flags> tags.
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The <cpu> tag describes CPUs in the group.
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Its attributes are "count", corresponding to the number of CPUs in the
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group and "mask", corresponding to the integer binary mask in which
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each bit position set to 1 signifies a CPU belonging to the group.
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The contents (CDATA) of the <cpu> tag is the comma-delimited list
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of CPU indexes (derived from the "mask" attribute).
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The <flags> tag contains special tags (if any) describing the relation
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of the CPUs in the group.
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The possible flags are currently "HTT" and "SMT", corresponding to
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the various implementations of hardware multithreading.
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An example topology_spec output for a system consisting of
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two quad-core processors is:
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.Bd -literal
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<groups>
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<group level="1" cache-level="0">
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<cpu count="8" mask="0xff">0, 1, 2, 3, 4, 5, 6, 7</cpu>
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<flags></flags>
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<children>
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<group level="2" cache-level="0">
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<cpu count="4" mask="0xf">0, 1, 2, 3</cpu>
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<flags></flags>
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</group>
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<group level="2" cache-level="0">
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<cpu count="4" mask="0xf0">4, 5, 6, 7</cpu>
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<flags></flags>
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</group>
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</children>
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</group>
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</groups>
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.Ed
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.Pp
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This information is used internally by the kernel to schedule related
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tasks on CPUs that are closely grouped together.
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.Pp
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.Fx
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supports hyperthreading on Intel CPU's on the i386 and AMD64 platforms.
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Because using logical CPUs can cause performance penalties under certain loads,
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the logical CPUs can be disabled by setting the
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.Va machdep.hyperthreading_allowed
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tunable to zero.
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.Sh SEE ALSO
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.Xr cpuset 1 ,
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.Xr mptable 1 ,
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.Xr sched_4bsd 4 ,
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.Xr sched_ule 4 ,
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.Xr loader 8 ,
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.Xr sysctl 8 ,
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.Xr condvar 9 ,
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.Xr msleep 9 ,
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.Xr mtx_pool 9 ,
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.Xr mutex 9 ,
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.Xr rwlock 9 ,
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.Xr sema 9 ,
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.Xr sx 9
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.Sh HISTORY
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The
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.Nm
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kernel's early history is not (properly) recorded.
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It was developed
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in a separate CVS branch until April 26, 1997, at which point it was
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merged into 3.0-current.
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By this date 3.0-current had already been
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merged with Lite2 kernel code.
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.Pp
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.Fx 5.0
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introduced support for a host of new synchronization primitives, and
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a move towards fine-grained kernel locking rather than reliance on
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a Giant kernel lock.
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The SMPng Project relied heavily on the support of BSDi, who provided
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reference source code from the fine-grained SMP implementation found
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in
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.Bsx .
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.Pp
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.Fx 5.0
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also introduced support for SMP on the sparc64 architecture.
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.Sh AUTHORS
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.An Steve Passe Aq Mt fsmp@FreeBSD.org
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