560 lines
14 KiB
C
560 lines
14 KiB
C
/* $FreeBSD$ */
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/* $Id: isp_pci.c,v 1.1 1998/04/22 18:10:34 mjacob Exp $ */
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/*
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* PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
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* FreeBSD Version.
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*
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*---------------------------------------
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* Copyright (c) 1997, 1998 by Matthew Jacob
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* NASA/Ames Research Center
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* All rights reserved.
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*---------------------------------------
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <pci.h>
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#if NPCI > 0
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#include <dev/isp/isp_freebsd.h>
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#include <dev/isp/asm_pci.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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static u_int16_t isp_pci_rd_reg __P((struct ispsoftc *, int));
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static void isp_pci_wr_reg __P((struct ispsoftc *, int, u_int16_t));
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static int isp_pci_mbxdma __P((struct ispsoftc *));
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static int isp_pci_dmasetup __P((struct ispsoftc *, ISP_SCSI_XFER_T *,
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ispreq_t *, u_int8_t *, u_int8_t));
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static void isp_pci_reset1 __P((struct ispsoftc *));
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static void isp_pci_dumpregs __P((struct ispsoftc *));
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static struct ispmdvec mdvec = {
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isp_pci_rd_reg,
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isp_pci_wr_reg,
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isp_pci_mbxdma,
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isp_pci_dmasetup,
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NULL,
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NULL,
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isp_pci_reset1,
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isp_pci_dumpregs,
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ISP_RISC_CODE,
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ISP_CODE_LENGTH,
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ISP_CODE_ORG,
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ISP_CODE_VERSION,
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BIU_PCI_CONF1_FIFO_64 | BIU_BURST_ENABLE,
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60 /* MAGIC- all known PCI card implementations are 60MHz */
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};
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static struct ispmdvec mdvec_2100 = {
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isp_pci_rd_reg,
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isp_pci_wr_reg,
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isp_pci_mbxdma,
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isp_pci_dmasetup,
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NULL,
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NULL,
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isp_pci_reset1,
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isp_pci_dumpregs,
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ISP2100_RISC_CODE,
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ISP2100_CODE_LENGTH,
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ISP2100_CODE_ORG,
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ISP2100_CODE_VERSION,
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BIU_PCI_CONF1_FIFO_64 | BIU_BURST_ENABLE,
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60 /* MAGIC- all known PCI card implementations are 60MHz */
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};
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#ifndef PCIM_CMD_INVEN
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#define PCIM_CMD_INVEN 0x10
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#endif
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#ifndef PCIM_CMD_BUSMASTEREN
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#define PCIM_CMD_BUSMASTEREN 0x0004
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#endif
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#ifndef PCI_VENDOR_QLOGIC
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#define PCI_VENDOR_QLOGIC 0x1077
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#endif
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#ifndef PCI_PRODUCT_QLOGIC_ISP1020
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#define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
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#endif
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#define PCI_QLOGIC_ISP \
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((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
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#ifndef PCI_PRODUCT_QLOGIC_ISP2100
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#define PCI_PRODUCT_QLOGIC_ISP2100 0x2100
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#endif
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#define PCI_QLOGIC_ISP2100 \
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((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC)
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#define IO_MAP_REG 0x10
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#define MEM_MAP_REG 0x14
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static char *isp_pci_probe __P((pcici_t tag, pcidi_t type));
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static void isp_pci_attach __P((pcici_t config_d, int unit));
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#define I386_BUS_SPACE_IO 0
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#define I386_BUS_SPACE_MEM 1
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typedef int bus_space_tag_t;
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typedef u_long bus_space_handle_t;
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#define bus_space_read_2(st, sh, offset) \
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(st == I386_BUS_SPACE_IO)? \
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inw((u_int16_t)sh + offset) : *((u_int16_t *) sh)
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#define bus_space_write_2(st, sh, offset, val) \
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if (st == I386_BUS_SPACE_IO) outw((u_int16_t)sh + offset, val); else \
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*((u_int16_t *) sh) = val
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struct isp_pcisoftc {
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struct ispsoftc pci_isp;
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pcici_t pci_id;
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bus_space_tag_t pci_st;
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bus_space_handle_t pci_sh;
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union {
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sdparam _x;
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struct {
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fcparam _a;
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char _b[ISP2100_SCRLEN];
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} _y;
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} _z;
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};
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static u_long isp_unit;
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struct pci_device isp_pci_driver = {
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"isp",
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isp_pci_probe,
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isp_pci_attach,
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&isp_unit,
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NULL
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};
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DATA_SET (pcidevice_set, isp_pci_driver);
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static char *
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isp_pci_probe(tag, type)
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pcici_t tag;
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pcidi_t type;
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{
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static int oneshot = 1;
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char *x;
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switch (type) {
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case PCI_QLOGIC_ISP:
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x = "Qlogic ISP 10X0 PCI SCSI Adapter";
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break;
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case PCI_QLOGIC_ISP2100:
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x = "Qlogic ISP 2100 PCI FC-AL Adapter";
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break;
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default:
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return (NULL);
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}
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if (oneshot) {
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oneshot = 0;
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printf("***Qlogic ISP Driver, FreeBSD NonCam Version\n***%s\n",
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ISP_VERSION_STRING);
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}
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return (x);
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}
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static void
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isp_pci_attach(config_id, unit)
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pcici_t config_id;
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int unit;
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{
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int mapped;
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u_int16_t io_port;
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u_int32_t data;
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struct isp_pcisoftc *pcs;
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struct ispsoftc *isp;
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vm_offset_t vaddr, paddr;
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ISP_LOCKVAL_DECL;
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pcs = malloc(sizeof (struct isp_pcisoftc), M_DEVBUF, M_NOWAIT);
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if (pcs == NULL) {
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printf("isp%d: cannot allocate softc\n", unit);
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return;
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}
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bzero(pcs, sizeof (struct isp_pcisoftc));
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vaddr = paddr = NULL;
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mapped = 0;
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data = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG);
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if (mapped == 0 && (data & PCI_COMMAND_IO_ENABLE)) {
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if (pci_map_port(config_id, PCI_MAP_REG_START, &io_port)) {
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pcs->pci_st = I386_BUS_SPACE_IO;
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pcs->pci_sh = io_port;
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mapped++;
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}
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}
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if (mapped == 0 && (data & PCI_COMMAND_MEM_ENABLE)) {
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if (pci_map_mem(config_id, PCI_MAP_REG_START, &vaddr, &paddr)) {
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pcs->pci_st = I386_BUS_SPACE_MEM;
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pcs->pci_sh = vaddr;
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mapped++;
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}
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}
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if (mapped == 0) {
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printf("isp%d: unable to map any ports!\n", unit);
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free(pcs, M_DEVBUF);
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return;
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}
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printf("isp%d: using %s space register mapping\n", unit,
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pcs->pci_st == I386_BUS_SPACE_IO? "I/O" : "Memory");
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isp = &pcs->pci_isp;
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(void) sprintf(isp->isp_name, "isp%d", unit);
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isp->isp_osinfo.unit = unit;
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data = pci_conf_read(config_id, PCI_ID_REG);
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if (data == PCI_QLOGIC_ISP) {
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isp->isp_mdvec = &mdvec;
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isp->isp_type = ISP_HA_SCSI_UNKNOWN;
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isp->isp_param = &pcs->_z._x;
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} else if (data == PCI_QLOGIC_ISP2100) {
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isp->isp_mdvec = &mdvec_2100;
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isp->isp_type = ISP_HA_FC_2100;
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isp->isp_param = &pcs->_z._y._a;
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ISP_LOCK;
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data = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG);
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data |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_INVEN;
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pci_conf_write(config_id, PCI_COMMAND_STATUS_REG, data);
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/*
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* Wierd- we need to clear the lsb in offset 0x30 to take the
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* chip out of reset state.
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*/
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data = pci_conf_read(config_id, 0x30);
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data &= ~1;
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pci_conf_write(config_id, 0x30, data);
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ISP_UNLOCK;
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} else {
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free(pcs, M_DEVBUF);
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return;
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}
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if (pci_map_int(config_id, (void (*)(void *))isp_intr,
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(void *)isp, &IMASK) == 0) {
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printf("%s: could not map interrupt\n", isp->isp_name);
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free(pcs, M_DEVBUF);
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return;
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}
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pcs->pci_id = config_id;
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ISP_LOCK;
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isp_reset(isp);
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if (isp->isp_state != ISP_RESETSTATE) {
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ISP_UNLOCK;
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free(pcs, M_DEVBUF);
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return;
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}
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isp_init(isp);
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if (isp->isp_state != ISP_INITSTATE) {
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isp_uninit(isp);
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ISP_UNLOCK;
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free(pcs, M_DEVBUF);
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return;
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}
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isp_attach(isp);
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if (isp->isp_state != ISP_RUNSTATE) {
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isp_uninit(isp);
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ISP_UNLOCK;
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free(pcs, M_DEVBUF);
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return;
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}
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ISP_UNLOCK;
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}
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#define PCI_BIU_REGS_OFF BIU_REGS_OFF
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static u_int16_t
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isp_pci_rd_reg(isp, regoff)
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struct ispsoftc *isp;
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int regoff;
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{
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u_int16_t rv;
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struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
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int offset, oldsxp = 0;
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if ((regoff & BIU_BLOCK) != 0) {
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offset = PCI_BIU_REGS_OFF;
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} else if ((regoff & MBOX_BLOCK) != 0) {
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if (isp->isp_type & ISP_HA_SCSI)
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offset = PCI_MBOX_REGS_OFF;
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else
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offset = PCI_MBOX_REGS2100_OFF;
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} else if ((regoff & SXP_BLOCK) != 0) {
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offset = PCI_SXP_REGS_OFF;
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/*
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* We will assume that someone has paused the RISC processor.
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*/
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oldsxp = isp_pci_rd_reg(isp, BIU_CONF1);
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isp_pci_wr_reg(isp, BIU_CONF1, oldsxp & ~BIU_PCI_CONF1_SXP);
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} else {
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offset = PCI_RISC_REGS_OFF;
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}
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regoff &= 0xff;
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offset += regoff;
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rv = bus_space_read_2(pcs->pci_st, pcs->pci_sh, offset);
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if ((regoff & SXP_BLOCK) != 0) {
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isp_pci_wr_reg(isp, BIU_CONF1, oldsxp);
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}
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return (rv);
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}
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static void
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isp_pci_wr_reg(isp, regoff, val)
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struct ispsoftc *isp;
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int regoff;
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u_int16_t val;
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{
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struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
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int offset, oldsxp = 0;
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if ((regoff & BIU_BLOCK) != 0) {
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offset = PCI_BIU_REGS_OFF;
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} else if ((regoff & MBOX_BLOCK) != 0) {
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if (isp->isp_type & ISP_HA_SCSI)
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offset = PCI_MBOX_REGS_OFF;
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else
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offset = PCI_MBOX_REGS2100_OFF;
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} else if ((regoff & SXP_BLOCK) != 0) {
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offset = PCI_SXP_REGS_OFF;
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/*
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* We will assume that someone has paused the RISC processor.
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*/
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oldsxp = isp_pci_rd_reg(isp, BIU_CONF1);
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isp_pci_wr_reg(isp, BIU_CONF1, oldsxp & ~BIU_PCI_CONF1_SXP);
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} else {
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offset = PCI_RISC_REGS_OFF;
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}
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regoff &= 0xff;
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offset += regoff;
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bus_space_write_2(pcs->pci_st, pcs->pci_sh, offset, val);
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if ((regoff & SXP_BLOCK) != 0) {
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isp_pci_wr_reg(isp, BIU_CONF1, oldsxp);
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}
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}
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static int
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isp_pci_mbxdma(isp)
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struct ispsoftc *isp;
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{
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struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp;
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u_int32_t len;
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int rseg;
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/* XXXX CHECK FOR ALIGNMENT */
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/*
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* Allocate and map the request queue.
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*/
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len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
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isp->isp_rquest = malloc(len, M_DEVBUF, M_NOWAIT);
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if (isp->isp_rquest == NULL) {
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printf("%s: cannot malloc request queue\n", isp->isp_name);
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return (1);
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}
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isp->isp_rquest_dma = vtophys(isp->isp_rquest);
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#if 0
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printf("RQUEST=0x%x (0x%x)...", isp->isp_rquest, isp->isp_rquest_dma);
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#endif
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/*
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* Allocate and map the result queue.
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*/
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len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
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isp->isp_result = malloc(len, M_DEVBUF, M_NOWAIT);
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if (isp->isp_result == NULL) {
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free(isp->isp_rquest, M_DEVBUF);
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printf("%s: cannot malloc result queue\n", isp->isp_name);
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return (1);
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}
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isp->isp_result_dma = vtophys(isp->isp_result);
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#if 0
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printf("RESULT=0x%x (0x%x)\n", isp->isp_result, isp->isp_result_dma);
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#endif
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if (isp->isp_type & ISP_HA_FC) {
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fcparam *fcp = isp->isp_param;
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len = ISP2100_SCRLEN;
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fcp->isp_scratch = (volatile caddr_t) &pci->_z._y._b;
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fcp->isp_scdma = vtophys(fcp->isp_scratch);
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}
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return (0);
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}
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static int
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isp_pci_dmasetup(isp, xs, rq, iptrp, optr)
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struct ispsoftc *isp;
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ISP_SCSI_XFER_T *xs;
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ispreq_t *rq;
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u_int8_t *iptrp;
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u_int8_t optr;
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{
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struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp;
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ispcontreq_t *crq;
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vm_offset_t vaddr;
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int drq, seglim;
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u_int32_t paddr, nextpaddr, datalen, size, *ctrp;
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if (xs->datalen == 0) {
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rq->req_seg_count = 1;
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return (0);
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}
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if (xs->flags & SCSI_DATA_IN) {
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drq = REQFLAG_DATA_IN;
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} else {
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drq = REQFLAG_DATA_OUT;
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}
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if (isp->isp_type & ISP_HA_FC) {
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seglim = ISP_RQDSEG_T2;
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((ispreqt2_t *)rq)->req_totalcnt = xs->datalen;
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((ispreqt2_t *)rq)->req_flags |= drq;
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} else {
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seglim = ISP_RQDSEG;
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rq->req_flags |= drq;
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}
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datalen = xs->datalen;;
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vaddr = (vm_offset_t) xs->data;
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paddr = vtophys(vaddr);
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while (datalen != 0 && rq->req_seg_count < seglim) {
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if (isp->isp_type & ISP_HA_FC) {
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ispreqt2_t *rq2 = (ispreqt2_t *)rq;
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rq2->req_dataseg[rq2->req_seg_count].ds_base = paddr;
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ctrp = &rq2->req_dataseg[rq2->req_seg_count].ds_count;
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} else {
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rq->req_dataseg[rq->req_seg_count].ds_base = paddr;
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ctrp = &rq->req_dataseg[rq->req_seg_count].ds_count;
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}
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nextpaddr = paddr;
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*(ctrp) = 0;
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while (datalen != 0 && paddr == nextpaddr) {
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nextpaddr = (paddr & (~PAGE_MASK)) + PAGE_SIZE;
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size = nextpaddr - paddr;
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if (size > datalen)
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size = datalen;
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*(ctrp) += size;
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vaddr += size;
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datalen -= size;
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if (datalen != 0)
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paddr = vtophys(vaddr);
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}
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#if 0
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if (isp->isp_type & ISP_HA_FC) {
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ispreqt2_t *rq2 = (ispreqt2_t *)rq;
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printf("%s: seg0[%d] cnt 0x%x paddr 0x%08x\n",
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isp->isp_name, rq->req_seg_count,
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rq2->req_dataseg[rq2->req_seg_count].ds_count,
|
|
rq2->req_dataseg[rq2->req_seg_count].ds_base);
|
|
} else {
|
|
printf("%s: seg0[%d] cnt 0x%x paddr 0x%08x\n",
|
|
isp->isp_name, rq->req_seg_count,
|
|
rq->req_dataseg[rq->req_seg_count].ds_count,
|
|
rq->req_dataseg[rq->req_seg_count].ds_base);
|
|
}
|
|
#endif
|
|
rq->req_seg_count++;
|
|
}
|
|
|
|
|
|
|
|
if (datalen == 0)
|
|
return (0);
|
|
|
|
paddr = vtophys(vaddr);
|
|
while (datalen > 0) {
|
|
crq = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, *iptrp);
|
|
*iptrp = (*iptrp + 1) & (RQUEST_QUEUE_LEN(isp) - 1);
|
|
if (*iptrp == optr) {
|
|
printf("%s: Request Queue Overflow\n", isp->isp_name);
|
|
return (EFBIG);
|
|
}
|
|
rq->req_header.rqs_entry_count++;
|
|
bzero((void *)crq, sizeof (*crq));
|
|
crq->req_header.rqs_entry_count = 1;
|
|
crq->req_header.rqs_entry_type = RQSTYPE_DATASEG;
|
|
|
|
for (seglim = 0; datalen != 0 && seglim < ISP_CDSEG; seglim++) {
|
|
crq->req_dataseg[seglim].ds_base = paddr;
|
|
ctrp = &crq->req_dataseg[seglim].ds_count;
|
|
*(ctrp) = 0;
|
|
nextpaddr = paddr;
|
|
while (datalen != 0 && paddr == nextpaddr) {
|
|
nextpaddr = (paddr & (~PAGE_MASK)) + PAGE_SIZE;
|
|
size = nextpaddr - paddr;
|
|
if (size > datalen)
|
|
size = datalen;
|
|
|
|
*(ctrp) += size;
|
|
vaddr += size;
|
|
datalen -= size;
|
|
if (datalen != 0)
|
|
paddr = vtophys(vaddr);
|
|
}
|
|
#if 0
|
|
printf("%s: seg%d[%d] cnt 0x%x paddr 0x%08x\n",
|
|
isp->isp_name, rq->req_header.rqs_entry_count-1,
|
|
seglim, crq->req_dataseg[seglim].ds_count,
|
|
crq->req_dataseg[seglim].ds_base);
|
|
#endif
|
|
rq->req_seg_count++;
|
|
}
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
isp_pci_reset1(isp)
|
|
struct ispsoftc *isp;
|
|
{
|
|
/* Make sure the BIOS is disabled */
|
|
isp_pci_wr_reg(isp, HCCR, PCI_HCCR_CMD_BIOS);
|
|
}
|
|
|
|
static void
|
|
isp_pci_dumpregs(isp)
|
|
struct ispsoftc *isp;
|
|
{
|
|
struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp;
|
|
printf("%s: PCI Status Command/Status=%lx\n", pci->pci_isp.isp_name,
|
|
pci_conf_read(pci->pci_id, PCI_COMMAND_STATUS_REG));
|
|
}
|
|
#endif
|