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freebsd-skq/sys/amd64/amd64
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Bjoern A. Zeeb 52bf2041ac Make sure that the primary native brandinfo always gets added 
first and the native ia32 compat as middle (before other things).
o(ld)brandinfo as well as third party like linux, kfreebsd, etc.
stays on SI_ORDER_ANY coming last.

The reason for this is only to make sure that even in case we would
overflow the MAX_BRANDS sized array, the native FreeBSD brandinfo
would still be there and the system would be operational.

Reviewed by:	kib
MFC after:	1 month
2009-10-03 11:57:21 +00:00
..
amd64_mem.c Initial suspend/resume support for amd64. 2009-03-17 00:48:11 +00:00
apic_vector.S Save and restore segment registers on amd64 when entering and leaving 2009-04-01 13:09:26 +00:00
atomic.c
autoconf.c
bios.c
bpf_jit_machdep.c Move empty filter handling to MI source. 2008-08-26 21:06:31 +00:00
bpf_jit_machdep.h Fix a typo in copyrights. 2008-08-25 20:43:13 +00:00
busdma_machdep.c Reduce the number of bounce zones (and thus the number of bounce pages 2009-04-23 20:24:19 +00:00
cpu_switch.S Restore the segment registers and segment base MSRs for amd64 syscall 2009-07-09 09:34:11 +00:00
db_disasm.c Decode some more "exotic" instructions including: fxsave, fxrstor, ldmxcsr, 2008-08-11 20:19:42 +00:00
db_interface.c Save and restore segment registers on amd64 when entering and leaving 2009-04-01 13:09:26 +00:00
db_trace.c Save and restore segment registers on amd64 when entering and leaving 2009-04-01 13:09:26 +00:00
dump_machdep.c Place hostnames and similar information fully under the prison system. 2009-05-29 21:27:12 +00:00
elf_machdep.c Make sure that the primary native brandinfo always gets added 2009-10-03 11:57:21 +00:00
exception.S When amd64 CPU cannot load segment descriptor during trap return to 2009-07-10 10:29:16 +00:00
fpu.c Fix a few nits in the earlier changes to prevent local information leakage 2009-03-25 22:08:30 +00:00
gdb_machdep.c Sync with i386: Map exceptions to signals in gdb_cpu_signal() so 2006-04-04 03:00:20 +00:00
genassym.c Restore the segment registers and segment base MSRs for amd64 syscall 2009-07-09 09:34:11 +00:00
identcpu.c Consolidate CPUID to CPU family/model macros for amd64 and i386 to reduce 2009-09-10 17:27:36 +00:00
in_cksum.c
initcpu.c As a workaround, for Intel CPUs, do not use CLFLUSH in 2009-10-01 12:52:48 +00:00
intr_machdep.c Improve the handling of cpuset with interrupts. 2009-07-01 17:20:07 +00:00
io_apic.c After the per-CPU IDT changes, the IDT vector of an interrupt could change 2009-07-06 18:23:00 +00:00
io.c Sweep kernel replacing suser(9) calls with priv(9) calls, assigning 2006-11-06 13:42:10 +00:00
legacy.c Rework how the nexus(4) device works on x86 to better handle the idea of 2008-03-13 20:39:04 +00:00
local_apic.c Don't attempt to bind the current thread to the CPU an IRQ is bound to 2009-09-02 00:39:59 +00:00
locore.S
machdep.c - Split the logic to parse an SMAP entry out into a separate function on 2009-09-22 16:51:00 +00:00
mca.c Don't bother reading the initial value of the machine check banks during 2009-05-20 16:11:22 +00:00
mem.c Replace all calls to minor() with dev2unit(). 2008-09-27 08:51:18 +00:00
minidump_machdep.c Place hostnames and similar information fully under the prison system. 2009-05-29 21:27:12 +00:00
mp_machdep.c * Completely Remove the option STOP_NMI from the kernel. This option 2009-08-13 17:09:45 +00:00
mp_watchdog.c Add a new 'why' argument to kdb_enter(), and a set of constants to use 2007-12-25 17:52:02 +00:00
mpboot.S
mptable_pci.c Revamp the MSI/MSI-X code a bit to achieve two main goals: 2007-05-02 17:50:36 +00:00
mptable.c In keeping with style(9)'s recommendations on macros, use a ';' 2008-03-16 10:58:09 +00:00
msi.c Consolidate CPUID to CPU family/model macros for amd64 and i386 to reduce 2009-09-10 17:27:36 +00:00
nexus.c Implement a BUS_BIND_INTR() method in the bus interface to bind an IRQ 2008-03-20 21:24:32 +00:00
pmap.c Temporarily disable the use of 1GB page mappings by the direct map. There 2009-09-28 17:10:27 +00:00
prof_machdep.c Turn off CPU frequency change notifiers when the TSC is P-state invariant 2008-10-21 00:38:00 +00:00
sigtramp.S
stack_machdep.c Break out stack(9) from ddb(4): 2007-12-02 20:40:35 +00:00
support.S Put intrcnt, eintrcnt, intrnames and eintrnames into the .data section. 2009-06-05 20:23:29 +00:00
sys_machdep.c Restore the segment registers and segment base MSRs for amd64 syscall 2009-07-09 09:34:11 +00:00
trap.c Add a backtrace to the "fpudna in kernel mode!" case, to help track down 2009-09-24 14:26:42 +00:00
tsc.c Turn off CPU frequency change notifiers when the TSC is P-state invariant 2008-10-21 00:38:00 +00:00
uio_machdep.c
uma_machdep.c It has been observed on the mailing lists that the different categories 2007-09-15 18:47:02 +00:00
vm_machdep.c Restore the segment registers and segment base MSRs for amd64 syscall 2009-07-09 09:34:11 +00:00