7b8253c3eb
OFW device tree for PCI bridges and add a new one for PCI Express. While at it, take advantage of the former for the rman(9) work- around in jbusppm(4).
73 lines
2.5 KiB
C
73 lines
2.5 KiB
C
/*-
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* Copyright (c) 1999, 2000 Matthew R. Green
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* Copyright (c) 2001, 2003 by Thomas Moestl <tmm@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: NetBSD: psychoreg.h,v 1.8 2001/09/10 16:17:06 eeh Exp
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*
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* $FreeBSD$
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*/
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#ifndef _SPARC64_PCI_OFW_PCI_H_
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#define _SPARC64_PCI_OFW_PCI_H_
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#include <dev/ofw/ofw_bus_subr.h>
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typedef uint32_t ofw_pci_intr_t;
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/* PCI range child spaces. XXX: are these MI? */
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#define OFW_PCI_CS_CONFIG 0x00
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#define OFW_PCI_CS_IO 0x01
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#define OFW_PCI_CS_MEM32 0x02
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#define OFW_PCI_CS_MEM64 0x03
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/* OFW device types */
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#define OFW_TYPE_PCI "pci"
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#define OFW_TYPE_PCIE "pciex"
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struct ofw_pci_ranges {
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uint32_t cspace;
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uint32_t child_hi;
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uint32_t child_lo;
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uint32_t phys_hi;
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uint32_t phys_lo;
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uint32_t size_hi;
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uint32_t size_lo;
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};
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#define OFW_PCI_RANGE_CHILD(r) \
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(((uint64_t)(r)->child_hi << 32) | (uint64_t)(r)->child_lo)
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#define OFW_PCI_RANGE_PHYS(r) \
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(((uint64_t)(r)->phys_hi << 32) | (uint64_t)(r)->phys_lo)
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#define OFW_PCI_RANGE_SIZE(r) \
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(((uint64_t)(r)->size_hi << 32) | (uint64_t)(r)->size_lo)
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#define OFW_PCI_RANGE_CS(r) (((r)->cspace >> 24) & 0x03)
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/* default values */
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#define OFW_PCI_LATENCY 64
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#endif /* ! _SPARC64_PCI_OFW_PCI_H_ */
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