d67164f24c
TNT5004 IC. This involved a major rewrite of a number of things, as this chip no longer supports the NAT7210 legacy mode but requires the host to use the (more modern) FIFO mode. In theory, this also ought to work on the older TNT4882C chip. I'll probably add this as optional support (perhaps by a device.hints flag) later on. By now, FIFO mode is *only* activates iff a TNT5004 chip has been detected (where the old code didn't work at all), while everything else is supposed to use the old code. MFC after: 2 weeks
78 lines
2.0 KiB
C
78 lines
2.0 KiB
C
/*-
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* Copyright (c) 2010 Joerg Wunsch
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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enum tnt4882reg {
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dir = 0x00,
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cdor = 0x00,
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isr1 = 0x02,
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imr1 = 0x02,
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isr2 = 0x04,
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imr2 = 0x04,
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accwr = 0x05,
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spsr = 0x06,
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spmr = 0x06,
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intr = 0x07,
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adsr = 0x08,
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admr = 0x08,
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cnt2 = 0x09,
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cptr = 0x0a,
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auxmr = 0x0a,
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tauxcr = 0x0a, /* 9914 mode register */
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cnt3 = 0x0b,
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adr0 = 0x0c,
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adr = 0x0c,
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hssel = 0x0d,
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adr1 = 0x0e,
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eosr = 0x0e,
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sts1 = 0x10,
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cfg = 0x10,
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dsr = 0x11,
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sh_cnt = 0x11,
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imr3 = 0x12,
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hier = 0x13,
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cnt0 = 0x14,
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misc = 0x15,
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cnt1 = 0x16,
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csr = 0x17,
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keyreg = 0x17,
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fifob = 0x18,
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fifoa = 0x19,
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isr3 = 0x1a,
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ccr = 0x1a,
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sasr = 0x1b,
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dcr = 0x1b,
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sts2 = 0x1c,
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cmdr = 0x1c,
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isr0 = 0x1d,
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imr0 = 0x1d,
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timer = 0x1e,
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bsr = 0x1f,
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bcr = 0x1f
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};
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