Jake Burkholder
025c284b8d
Add a support macro to convert the 5-bit packed register field of ...
a floating point instruction into a 6-bit register number for
double and quad arguments.
Make use of the new INSFPdq_RN macro where apporpriate; this
is required for correctly handling the "high" fp registers
(>= %f32).
Fix a number of bugs related to the handling of the high registers
which were caused by using __fpu_[gs]etreg() where __fpu_[gs]etreg64()
should be used (the former can only access the low, single-precision,
registers).
Submitted by: tmm
2002-05-11 21:20:05 +00:00
2002-04-18 13:24:35 +00:00
2002-05-11 17:45:03 +00:00
2001-12-18 16:13:45 +00:00
2002-03-22 09:22:15 +00:00
2002-03-22 18:34:52 +00:00
2002-05-11 21:20:05 +00:00
2002-05-11 08:13:42 +00:00
2001-10-01 16:09:29 +00:00
2002-04-23 23:58:20 +00:00
2002-03-21 23:39:28 +00:00
2002-04-09 22:32:59 +00:00
2001-10-03 05:25:07 +00:00
2002-03-21 23:39:28 +00:00
2002-03-25 13:52:45 +00:00
2002-04-22 13:44:47 +00:00
2002-03-29 22:43:43 +00:00
2002-03-25 13:52:45 +00:00
2001-11-03 06:33:08 +00:00
2001-09-30 21:41:46 +00:00
2002-04-19 04:46:24 +00:00
2002-03-21 23:39:28 +00:00
2002-02-04 19:18:23 +00:00
2002-05-11 08:13:42 +00:00
2002-04-07 04:47:58 +00:00
2002-04-10 17:01:55 +00:00
2002-02-17 22:01:40 +00:00
2001-10-03 16:33:00 +00:00
2002-04-20 05:35:02 +00:00
2002-03-21 23:39:28 +00:00
2001-10-25 04:02:25 +00:00
2002-03-22 00:12:20 +00:00
2002-05-08 00:54:29 +00:00
2002-05-11 08:13:42 +00:00
2002-05-11 01:27:27 +00:00
2001-11-03 06:26:15 +00:00
2002-03-21 23:54:04 +00:00
2002-01-06 08:47:19 +00:00
2002-02-17 22:01:40 +00:00
2001-12-20 16:21:47 +00:00
2002-02-17 22:05:07 +00:00
2002-02-17 22:05:07 +00:00
2002-04-13 22:09:53 +00:00
2001-10-01 16:09:29 +00:00
2001-11-30 22:37:28 +00:00
2002-03-28 18:44:25 +00:00
2002-05-08 14:52:32 +00:00
2001-12-21 18:26:01 +00:00
2001-11-03 06:24:23 +00:00
2002-05-08 00:48:39 +00:00
2002-03-31 23:47:52 +00:00
2002-03-26 11:59:29 +00:00
2002-03-21 23:39:28 +00:00
2002-05-11 17:51:04 +00:00
025c284b8d