030b156bf0
register controlled the trigger mode and polarity of EISA interrupts. However, it appears that most (all?) PCI systems use the ELCR to manage the trigger mode and polarity of ISA interrupts as well since ISA IRQs used to route PCI interrupts need to be level triggered with active low polarity. We check to see if the ELCR exists by sanity checking the value we get back ensuring that IRQS 0 (8254), 1 (atkbd), 2 (the link from the slave PIC), and 8 (RTC) are all clear indicating edge trigger and active high polarity. This mini-driver will be used by the atpic driver to manage the trigger and polarity of ISA IRQs. Also, the mptable parsing code will use this mini driver rather than examining the ELCR directly.
97 lines
3.3 KiB
C
97 lines
3.3 KiB
C
/*-
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* Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __MACHINE_INTR_MACHDEP_H__
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#define __MACHINE_INTR_MACHDEP_H__
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#ifdef _KERNEL
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/* With I/O APIC's we can have up to 191 interrupts. */
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#define NUM_IO_INTS 191
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#define INTRCNT_COUNT (1 + NUM_IO_INTS * 2)
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#ifndef LOCORE
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typedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
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#define IDTVEC(name) __CONCAT(X,name)
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struct intsrc;
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/*
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* Methods that a PIC provides to mask/unmask a given interrupt source,
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* "turn on" the interrupt on the CPU side by setting up an IDT entry, and
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* return the vector associated with this source.
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*/
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struct pic {
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void (*pic_enable_source)(struct intsrc *);
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void (*pic_disable_source)(struct intsrc *);
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void (*pic_eoi_source)(struct intsrc *);
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void (*pic_enable_intr)(struct intsrc *);
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int (*pic_vector)(struct intsrc *);
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int (*pic_source_pending)(struct intsrc *);
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void (*pic_suspend)(struct intsrc *);
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void (*pic_resume)(struct intsrc *);
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};
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/*
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* An interrupt source. The upper-layer code uses the PIC methods to
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* control a given source. The lower-layer PIC drivers can store additional
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* private data in a given interrupt source such as an interrupt pin number
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* or an I/O APIC pointer.
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*/
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struct intsrc {
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struct pic *is_pic;
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struct ithd *is_ithread;
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u_long *is_count;
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u_long *is_straycount;
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u_int is_index;
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};
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struct intrframe;
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extern struct mtx icu_lock;
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/* XXX: The elcr_* prototypes probably belong somewhere else. */
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int elcr_probe(void);
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enum intr_trigger elcr_read_trigger(u_int irq);
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void elcr_resume(void);
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void elcr_write_trigger(u_int irq, enum intr_trigger trigger);
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int intr_add_handler(const char *name, int vector, driver_intr_t handler,
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void *arg, enum intr_type flags, void **cookiep);
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void intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe);
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struct intsrc *intr_lookup_source(int vector);
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int intr_register_source(struct intsrc *isrc);
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int intr_remove_handler(void *cookie);
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void intr_resume(void);
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void intr_suspend(void);
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#endif /* !LOCORE */
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#endif /* _KERNEL */
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#endif /* !__MACHINE_INTR_MACHDEP_H__ */
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