0677ff9cef
Summary: Some drivers need special memory requirements. X86 solves this with a pmap_change_attr() API, which DRM uses for changing the mapping of the GART and other memory regions. Implement the same function for PowerPC. AIM currently does not need this, but will in the future for DRM, so a default is added for that, for business as usual. Book-E has some drivers coming down that do require non-default memory coherency. In this case, the Datapath Acceleration Architecture (DPAA) based ethernet controller has 2 regions for the buffer portals: cache-inhibited, and cache-enabled. By default, device memory is cache-inhibited. If the cache-enabled memory regions are mapped cache-inhibited, an alignment exception is thrown on access. Test Plan: Tested with a new driver to be added after this (DPAA dTSEC ethernet driver). No alignment exceptions thrown, driver works as expected with this. Reviewed By: nwhitehorn Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5471
267 lines
9.2 KiB
C
267 lines
9.2 KiB
C
/*-
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* Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
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* All rights reserved.
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*
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* Adapted for Freescale's e500 core CPUs.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*-
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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* Copyright (C) 1995, 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* from: $NetBSD: pmap.h,v 1.17 2000/03/30 16:18:24 jdolecek Exp $
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*/
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#ifndef _MACHINE_PMAP_H_
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#define _MACHINE_PMAP_H_
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#include <sys/queue.h>
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#include <sys/tree.h>
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#include <sys/_cpuset.h>
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#include <sys/_lock.h>
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#include <sys/_mutex.h>
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#include <machine/sr.h>
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#include <machine/pte.h>
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#include <machine/slb.h>
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#include <machine/tlb.h>
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#if defined(AIM)
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#if !defined(NPMAPS)
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#define NPMAPS 32768
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#endif /* !defined(NPMAPS) */
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struct slbtnode;
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struct pmap;
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typedef struct pmap *pmap_t;
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struct pvo_entry {
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LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */
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#ifndef __powerpc64__
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LIST_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */
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#endif
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RB_ENTRY(pvo_entry) pvo_plink; /* Link to pmap entries */
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struct {
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#ifndef __powerpc64__
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/* 32-bit fields */
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struct pte pte;
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#endif
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/* 64-bit fields */
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uintptr_t slot;
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vm_paddr_t pa;
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vm_prot_t prot;
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} pvo_pte;
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pmap_t pvo_pmap; /* Owning pmap */
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vm_offset_t pvo_vaddr; /* VA of entry */
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uint64_t pvo_vpn; /* Virtual page number */
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};
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LIST_HEAD(pvo_head, pvo_entry);
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RB_HEAD(pvo_tree, pvo_entry);
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int pvo_vaddr_compare(struct pvo_entry *, struct pvo_entry *);
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RB_PROTOTYPE(pvo_tree, pvo_entry, pvo_plink, pvo_vaddr_compare);
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/* Used by 32-bit PMAP */
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#define PVO_PTEGIDX_MASK 0x007UL /* which PTEG slot */
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#define PVO_PTEGIDX_VALID 0x008UL /* slot is valid */
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/* Used by 64-bit PMAP */
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#define PVO_HID 0x008UL /* PVO entry in alternate hash*/
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/* Used by both */
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#define PVO_WIRED 0x010UL /* PVO entry is wired */
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#define PVO_MANAGED 0x020UL /* PVO entry is managed */
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#define PVO_BOOTSTRAP 0x080UL /* PVO entry allocated during
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bootstrap */
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#define PVO_DEAD 0x100UL /* waiting to be deleted */
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#define PVO_LARGE 0x200UL /* large page */
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#define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF)
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#define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK)
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#define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID)
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#define PVO_PTEGIDX_CLR(pvo) \
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((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK)))
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#define PVO_PTEGIDX_SET(pvo, i) \
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((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID))
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#define PVO_VSID(pvo) ((pvo)->pvo_vpn >> 16)
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struct pmap {
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struct mtx pm_mtx;
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#ifdef __powerpc64__
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struct slbtnode *pm_slb_tree_root;
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struct slb **pm_slb;
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int pm_slb_len;
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#else
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register_t pm_sr[16];
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#endif
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cpuset_t pm_active;
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struct pmap *pmap_phys;
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struct pmap_statistics pm_stats;
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struct pvo_tree pmap_pvo;
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};
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struct md_page {
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volatile int32_t mdpg_attrs;
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vm_memattr_t mdpg_cache_attrs;
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struct pvo_head mdpg_pvoh;
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};
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#define pmap_page_get_memattr(m) ((m)->md.mdpg_cache_attrs)
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#define pmap_page_is_mapped(m) (!LIST_EMPTY(&(m)->md.mdpg_pvoh))
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/*
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* Return the VSID corresponding to a given virtual address.
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* If no VSID is currently defined, it will allocate one, and add
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* it to a free slot if available.
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*
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* NB: The PMAP MUST be locked already.
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*/
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uint64_t va_to_vsid(pmap_t pm, vm_offset_t va);
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/* Lock-free, non-allocating lookup routines */
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uint64_t kernel_va_to_slbv(vm_offset_t va);
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struct slb *user_va_to_slb_entry(pmap_t pm, vm_offset_t va);
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uint64_t allocate_user_vsid(pmap_t pm, uint64_t esid, int large);
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void free_vsid(pmap_t pm, uint64_t esid, int large);
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void slb_insert_user(pmap_t pm, struct slb *slb);
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void slb_insert_kernel(uint64_t slbe, uint64_t slbv);
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struct slbtnode *slb_alloc_tree(void);
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void slb_free_tree(pmap_t pm);
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struct slb **slb_alloc_user_cache(void);
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void slb_free_user_cache(struct slb **);
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#else
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struct pmap {
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struct mtx pm_mtx; /* pmap mutex */
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tlbtid_t pm_tid[MAXCPU]; /* TID to identify this pmap entries in TLB */
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cpuset_t pm_active; /* active on cpus */
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struct pmap_statistics pm_stats; /* pmap statistics */
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/* Page table directory, array of pointers to page tables. */
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pte_t *pm_pdir[PDIR_NENTRIES];
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/* List of allocated ptbl bufs (ptbl kva regions). */
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TAILQ_HEAD(, ptbl_buf) pm_ptbl_list;
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};
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typedef struct pmap *pmap_t;
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struct pv_entry {
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pmap_t pv_pmap;
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vm_offset_t pv_va;
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TAILQ_ENTRY(pv_entry) pv_link;
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};
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typedef struct pv_entry *pv_entry_t;
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struct md_page {
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TAILQ_HEAD(, pv_entry) pv_list;
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};
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#define pmap_page_get_memattr(m) VM_MEMATTR_DEFAULT
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#define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list))
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#endif /* AIM */
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extern struct pmap kernel_pmap_store;
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#define kernel_pmap (&kernel_pmap_store)
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#ifdef _KERNEL
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#define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx)
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#define PMAP_LOCK_ASSERT(pmap, type) \
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mtx_assert(&(pmap)->pm_mtx, (type))
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#define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx)
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#define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, \
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(pmap == kernel_pmap) ? "kernelpmap" : \
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"pmap", NULL, MTX_DEF)
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#define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx)
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#define PMAP_MTX(pmap) (&(pmap)->pm_mtx)
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#define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx)
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#define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx)
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#define pmap_page_is_write_mapped(m) (((m)->aflags & PGA_WRITEABLE) != 0)
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void pmap_bootstrap(vm_offset_t, vm_offset_t);
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void pmap_kenter(vm_offset_t va, vm_paddr_t pa);
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void pmap_kenter_attr(vm_offset_t va, vm_offset_t pa, vm_memattr_t);
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void pmap_kremove(vm_offset_t);
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void *pmap_mapdev(vm_paddr_t, vm_size_t);
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void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, vm_memattr_t);
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void pmap_unmapdev(vm_offset_t, vm_size_t);
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void pmap_page_set_memattr(vm_page_t, vm_memattr_t);
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int pmap_change_attr(vm_offset_t, vm_size_t, vm_memattr_t);
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void pmap_deactivate(struct thread *);
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vm_paddr_t pmap_kextract(vm_offset_t);
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int pmap_dev_direct_mapped(vm_paddr_t, vm_size_t);
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boolean_t pmap_mmu_install(char *name, int prio);
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#define vtophys(va) pmap_kextract((vm_offset_t)(va))
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#define PHYS_AVAIL_SZ 256 /* Allows up to 16GB Ram on pSeries with
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* logical memory block size of 64MB.
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* For more Ram increase the lmb or this value.
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*/
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extern vm_paddr_t phys_avail[PHYS_AVAIL_SZ];
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extern vm_offset_t virtual_avail;
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extern vm_offset_t virtual_end;
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extern vm_offset_t msgbuf_phys;
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extern int pmap_bootstrapped;
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vm_offset_t pmap_early_io_map(vm_paddr_t pa, vm_size_t size);
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#endif
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#endif /* !_MACHINE_PMAP_H_ */
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