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* Registers TRNG source for random(4) * Finds available queues, LSBs; allocates static objects * Allocates a shared MSI-X for all queues. The hardware does not have separate interrupts per queue. Working interrupt mode driver. * Computes SHA hashes, HMAC. Passes cryptotest.py, cryptocheck tests. * Does AES-CBC, CTR mode, and XTS. cryptotest.py and cryptocheck pass. * Support for "authenc" (AES + HMAC). (SHA1 seems to result in "unaligned" cleartext inputs from cryptocheck -- which the engine cannot handle. SHA2 seems to work fine.) * GCM passes for block-multiple AAD, input lengths Largely based on ccr(4), part of cxgbe(4). Rough performance averages on AMD Ryzen 1950X (4kB buffer): aesni: SHA1: ~8300 Mb/s SHA256: ~8000 Mb/s ccp: ~630 Mb/s SHA256: ~660 Mb/s SHA512: ~700 Mb/s cryptosoft: ~1800 Mb/s SHA256: ~1800 Mb/s SHA512: ~2700 Mb/s As you can see, performance is poor in comparison to aesni(4) and even cryptosoft (due to high setup cost). At a larger buffer size (128kB), throughput is a little better (but still worse than aesni(4)): aesni: SHA1:~10400 Mb/s SHA256: ~9950 Mb/s ccp: ~2200 Mb/s SHA256: ~2600 Mb/s SHA512: ~3800 Mb/s cryptosoft: ~1750 Mb/s SHA256: ~1800 Mb/s SHA512: ~2700 Mb/s AES performance has a similar story: aesni: 4kB: ~11250 Mb/s 128kB: ~11250 Mb/s ccp: ~350 Mb/s 128kB: ~4600 Mb/s cryptosoft: ~1750 Mb/s 128kB: ~1700 Mb/s This driver is EXPERIMENTAL. You should verify cryptographic results on typical and corner case inputs from your application against a known- good implementation. Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12723
100 lines
2.9 KiB
C
100 lines
2.9 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2017 Conrad Meyer <cem@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <sys/sysctl.h>
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#include <opencrypto/xform.h>
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#include "ccp.h"
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#include "ccp_lsb.h"
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void
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ccp_queue_decode_lsb_regions(struct ccp_softc *sc, uint64_t lsbmask,
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unsigned queue)
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{
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struct ccp_queue *qp;
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unsigned i;
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qp = &sc->queues[queue];
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qp->lsb_mask = 0;
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for (i = 0; i < MAX_LSB_REGIONS; i++) {
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if (((1 << queue) & lsbmask) != 0)
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qp->lsb_mask |= (1 << i);
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lsbmask >>= MAX_HW_QUEUES;
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}
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/*
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* Ignore region 0, which has special entries that cannot be used
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* generally.
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*/
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qp->lsb_mask &= ~(1 << 0);
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}
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/*
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* Look for a private LSB for each queue. There are 7 general purpose LSBs
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* total and 5 queues. PSP will reserve some of both. Firmware limits some
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* queues' access to some LSBs; we hope it is fairly sane and just use a dumb
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* greedy algorithm to assign LSBs to queues.
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*/
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void
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ccp_assign_lsb_regions(struct ccp_softc *sc, uint64_t lsbmask)
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{
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unsigned q, i;
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for (q = 0; q < nitems(sc->queues); q++) {
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if (((1 << q) & sc->valid_queues) == 0)
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continue;
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sc->queues[q].private_lsb = -1;
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/* Intentionally skip specialized 0th LSB */
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for (i = 1; i < MAX_LSB_REGIONS; i++) {
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if ((lsbmask &
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(1ull << (q + (MAX_HW_QUEUES * i)))) != 0) {
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sc->queues[q].private_lsb = i;
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lsbmask &= ~(0x1Full << (MAX_HW_QUEUES * i));
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break;
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}
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}
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if (i == MAX_LSB_REGIONS) {
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device_printf(sc->dev,
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"Ignoring queue %u with no private LSB\n", q);
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sc->valid_queues &= ~(1 << q);
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}
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}
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}
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