dim c31e7aae74 In cxgb(4), in function iwch_reregister_phys_mem(), initialize the ... 'npages' variable to zero, to avoid using it uninitialized in certain cases. Found by: clang Reviewed by: np MFC after: 1 week		2012-08-06 18:51:14 +00:00
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common	- Updated TOE support in the kernel.	2012-06-19 07:34:13 +00:00
sys	- Updated TOE support in the kernel.	2012-06-19 07:34:13 +00:00
ulp	In cxgb(4), in function iwch_reregister_phys_mem(), initialize the	2012-08-06 18:51:14 +00:00
bin2h.pl
cxgb_adapter.h	cxgb(4): IPv6 rx/tx hw checksum, IPv6 TSO and LRO too.	2012-06-30 02:11:53 +00:00
cxgb_include.h
cxgb_ioctl.h	Add support for hardware filters to cxgb(4). The T3 chip can inspect	2010-05-05 00:41:40 +00:00
cxgb_main.c	cxgb(4): IPv6 rx/tx hw checksum, IPv6 TSO and LRO too.	2012-06-30 02:11:53 +00:00
cxgb_offload.h	- Updated TOE support in the kernel.	2012-06-19 07:34:13 +00:00
cxgb_osdep.h	- Updated TOE support in the kernel.	2012-06-19 07:34:13 +00:00
cxgb_sge.c	cxgb(4): IPv6 rx/tx hw checksum, IPv6 TSO and LRO too.	2012-06-30 02:11:53 +00:00
cxgb_t3fw.c
cxgb_t3fw.h	Update T3 firmware to 7.11.0	2011-03-25 20:53:02 +00:00
t3b_protocol_sram.h
t3b_tp_eeprom.h
t3c_protocol_sram.h
t3c_tp_eeprom.h