mav 1efe697292 Make DMAR allow Intel NTB device to access its own BAR0. ... I have no good explanation why it happens, but I found that in B2B mode at least Xeon v4 NTB leaks accesses to its configuration memory at BAR0 originated from the link side to its host side. DMAR predictably blocks those, making access to remote scratchpad registers in B2B mode impossible. This change creates identity mapping in DMAR covering the BAR0 addresses, making the NTB work fine with DMAR enabled. It seems like allowing single 4KB range at 32KB offset may be enough, but I don't see a reason to be so specific. MFC after: 1 week Sponsored by: iXsystems, Inc.		2019-11-28 02:40:12 +00:00
..
if_ntb	Extract eventfilter declarations to sys/_eventfilter.h	2019-05-20 00:38:23 +00:00
ntb_hw	Make DMAR allow Intel NTB device to access its own BAR0.	2019-11-28 02:40:12 +00:00
test	NTB Tool: Test driver for NTB hardware drivers.	2019-08-16 20:14:37 +00:00
ntb_if.m	Add driver for NTB in AMD SoC.	2019-07-02 05:25:18 +00:00
ntb_transport.c	Add compact scraptchpad protocol for ntb_transport(4).	2019-11-10 03:37:45 +00:00
ntb_transport.h
ntb.c	Make ntb(4) send bus_get_dma_tag() requests to parent buses passing real	2019-11-14 04:34:58 +00:00
ntb.h	Make ntb(4) send bus_get_dma_tag() requests to parent buses passing real	2019-11-14 04:34:58 +00:00