0757a4afb5
The PQ3 is a high performance integrated communications processing system based on the e500 core, which is an embedded RISC processor that implements the 32-bit Book E definition of the PowerPC architecture. For details refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E This port was tested and successfully run on the following members of the PQ3 family: MPC8533, MPC8541, MPC8548, MPC8555. The following major integrated peripherals are supported: * On-chip peripherals bus * OpenPIC interrupt controller * UART * Ethernet (TSEC) * Host/PCI bridge * QUICC engine (SCC functionality) This commit brings the main functionality and will be followed by individual drivers that are logically separate from this base. Approved by: cognet (mentor) Obtained from: Juniper, Semihalf MFp4: e500 |
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uart_bus_acpi.c | ||
uart_bus_ebus.c | ||
uart_bus_isa.c | ||
uart_bus_ocp.c | ||
uart_bus_pccard.c | ||
uart_bus_pci.c | ||
uart_bus_puc.c | ||
uart_bus_scc.c | ||
uart_bus.h | ||
uart_core.c | ||
uart_cpu_amd64.c | ||
uart_cpu_i386.c | ||
uart_cpu_ia64.c | ||
uart_cpu_pc98.c | ||
uart_cpu_powerpc.c | ||
uart_cpu_sparc64.c | ||
uart_cpu.h | ||
uart_dbg.c | ||
uart_dev_ns8250.c | ||
uart_dev_sab82532.c | ||
uart_dev_z8530.c | ||
uart_if.m | ||
uart_kbd_sun_tables.h | ||
uart_kbd_sun.c | ||
uart_kbd_sun.h | ||
uart_subr.c | ||
uart_tty.c | ||
uart.h |