5fdc748d8c
Submitted by: The FreeBSD(98) Development Team Obtained from: NetBSD/pc98 based on NetBSD 1.2
156 lines
4.4 KiB
C
156 lines
4.4 KiB
C
/*
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* [NetBSD for NEC PC98 series]
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* Copyright (c) 1996 NetBSD/pc98 porting staff.
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* Copyright (c) 1996 Naofumi Honda
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _WD33C93REG_H_
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#define _WD33C93REG_H_
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/* wd33c93 register */
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#define wd3s_oid 0x00
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#define IDR_FS_15_20 0x80
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#define IDR_FS_12_15 0x40
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#define IDR_FS_8_10 0x00
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#define IDR_EHP 0x10
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#define IDR_EAF 0x08
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#define IDR_IDM 0x07
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#define wd3s_ctrl 0x01
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#define CR_DMA 0x80
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#define CR_DMAD 0x40
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#define CR_HLT_HOST_PARITY 0x10
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#define CR_DIS_INT 0x08
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#define CR_IDIS_INT 0x04
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#define CR_HLT_ATN 0x02
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#define CR_HLT_BUS_PARITY 0x01
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#define CR_DEFAULT (CR_DIS_INT | CR_IDIS_INT)
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#define CR_DEFAULT_HP (CR_DEFAULT | CR_HLT_BUS_PARITY)
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#define wd3s_tout 0x02
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#define wd3s_cdb 0x03
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#define wd3s_lun 0x0f
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#define wd3s_cph 0x10
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#define wd3s_synch 0x11
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#define wd3s_cnt 0x12
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#define wd3s_did 0x15
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#define wd3s_sid 0x16
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#define SIDR_RESEL 0x80
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#define SIDR_SEL 0x40
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#define SIDR_VALID 0x08
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#define SIDR_IDM 0x07
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#define wd3s_stat 0x17
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#define BSR_CM 0xf0
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#define BSR_CMDCPL 0x10
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#define BSR_CMDABT 0x20
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#define BSR_CMDERR 0x40
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#define BSR_CMDREQ 0x80
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#define BSR_SM 0x0f
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#define BSR_PM 0x07
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#define BSR_PHVALID 0x08
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#define BSR_IOR 0x01
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#define BSR_DATAOUT 0x00
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#define BSR_DATAIN 0x01
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#define BSR_CMDOUT 0x02
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#define BSR_STATIN 0x03
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#define BSR_UNSPINFO0 0x04
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#define BSR_UNSPINFO1 0x05
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#define BSR_MSGOUT 0x06
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#define BSR_MSGIN 0x07
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#define BSR_SELECTED 0x11
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#define BSR_SATFIN 0x16
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#define BSR_ACKREQ 0x20
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#define BSR_SATSDP 0x21
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#define BSR_RESEL 0x80
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#define BSR_DISC 0x85
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#define wd3s_cmd 0x18
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#define wd3s_data 0x19
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#define wd3s_qtag 0x1a
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#define wd3s_mbank 0x30
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#define MBR_RST 0x02
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#define MBR_IEN 0x04
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#define wd3s_mwin 0x31
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#define wd3s_auxc 0x33
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#define AUXCR_HIDM 0x07
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#define AUXCR_INTM 0x38
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#define AUXCR_RRST 0x80
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/* status port */
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#define STR_INT 0x80
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#define STR_LCI 0x40
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#define STR_BSY 0x20
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#define STR_CIP 0x10
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#define STR_PE 0x02
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#define STR_DBR 0x01
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#define STR_BUSY 0xf0
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/* cmd port */
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#define CMDP_DMES 0x01
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#define CMDP_DMER 0x02
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#define CMDP_TCMS 0x04
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#define CMDP_TCMR 0x08
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#define CMDP_TCIR 0x10
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/* wd33c93 chip cmds */
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#define WD3S_SBT 0x80
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#define WD3S_RESET 0x00
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#define WD3S_ABORT 0x01
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#define WD3S_ASSERT_ATN 0x02
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#define WD3S_NEGATE_ACK 0x03
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#define WD3S_DISCONNECT 0x04
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#define WD3S_RESELECT 0x05
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#define WD3S_SELECT_ATN 0x06
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#define WD3S_SELECT_NO_ATN 0x07
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#define WD3S_SELECT_ATN_TFR 0x08
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#define WD3S_SELECT_NO_ATN_TFR 0x09
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#define WD3S_RESELECT_RCV_DATA 0x0a
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#define WD3S_RESELECT_SEND_DATA 0x0b
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#define WD3S_WAIT_SELECT_RCV 0x0c
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#define WD3S_CMD_COMPSEQ 0x0d
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#define WD3S_SEND_DISC_MSG 0x0e
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#define WD3S_SET_IDI 0x0f
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#define WD3S_RCV_CMD 0x10
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#define WD3S_RCV_DATA 0x11
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#define WD3S_RCV_MSG_OUT 0x12
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#define WD3S_RCV_UNSP_INFO_OUT 0x13
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#define WD3S_SEND_STATUS 0x14
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#define WD3S_SEND_DATA 0x15
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#define WD3S_SEND_MSG_IN 0x16
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#define WD3S_SEND_UNSP_INFO_IN 0x17
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#define WD3S_TRANSLATE_ADDRESS 0x18
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#define WD3S_TFR_INFO 0x20
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#endif /* !_WD33C93REG_H_ */
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